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    MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
    1.
    发明申请
    MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE 有权
    半导体器件的制造方法

    公开(公告)号：US20110059562A1

    公开(公告)日：2011-03-10

    申请号：US12944841

    申请日：2010-11-12

    申请人： Shunpei YAMAZAKI ,  Sachiaki TEDUKA ,  Satoshi TORIUMI ,  Makoto FURUNO ,  Yasuhiro JINBO ,  Koji DAIRIKI ,  Hideaki KUWABARA

    发明人： Shunpei YAMAZAKI ,  Sachiaki TEDUKA ,  Satoshi TORIUMI ,  Makoto FURUNO ,  Yasuhiro JINBO ,  Koji DAIRIKI ,  Hideaki KUWABARA

    IPC分类号： H01L21/336

    CPC分类号： C23C16/515 ,  C23C16/509 ,  H01L27/1288 ,  H01L29/04 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/78696

    摘要： An object is to provide a manufacturing method of a microcrystalline semiconductor film with favorable quality over a large-area substrate. After forming a gate insulating film over a gate electrode, in order to improve quality of a microcrystalline semiconductor film formed in an initial stage, glow discharge plasma is generated by supplying high-frequency powers with different frequencies, and a lower part of the film near an interface with the gate insulating film is formed under a first film formation condition, which is low in film formation rate but results in a good quality film. Thereafter, an upper part of the film is deposited under a second film formation condition with higher film formation rate, and further, a buffer layer is stacked on the microcrystalline semiconductor film.

    摘要翻译： 本发明的目的是提供一种在大面积基板上具有优良质量的微晶半导体膜的制造方法。 在栅电极上形成栅极绝缘膜之后，为了提高在初始阶段形成的微晶半导体膜的质量，通过提供具有不同频率的高频功率并且膜的下部附近产生辉光放电等离子体 在第一成膜条件下形成具有栅极绝缘膜的界面，其成膜速率低，但是导致良好的膜质量。 此后，在成膜速度较高的第二成膜条件下沉积膜的上部，并且还在微晶半导体膜上层叠缓冲层。

    METHOD OF MANUFACTURING DISPLAY DEVICE
    2.
    发明申请
    METHOD OF MANUFACTURING DISPLAY DEVICE 有权
    制造显示装置的方法

    公开(公告)号：US20090047758A1

    公开(公告)日：2009-02-19

    申请号：US12186001

    申请日：2008-08-05

    申请人： Shunpei YAMAZAKI ,  Sachiaki TEDUKA ,  Makoto FURUNO ,  Satoshi TORIUMI ,  Yasuhiro JINBO ,  Koji DAIRIKI

    发明人： Shunpei YAMAZAKI ,  Sachiaki TEDUKA ,  Makoto FURUNO ,  Satoshi TORIUMI ,  Yasuhiro JINBO ,  Koji DAIRIKI

    IPC分类号： H01L21/336

    CPC分类号： H01L29/04 ,  H01L21/0262 ,  H01L27/1222 ,  H01L27/127 ,  H01L29/41733 ,  H01L29/66765 ,  H01L29/78696

    摘要： In a case of forming a bottom-gate thin film transistor, a step of forming a microcrystalline semiconductor film over a gate insulating film by a plasma CVD method, and a step of forming an amorphous semiconductor film over the microcrystalline semiconductor film are performed. In the step of forming the microcrystalline semiconductor film, the pressure in the reaction chamber is set at or below 10−5 Pa once, the substrate temperature is set in the range of 120° C. to 220° C., plasma is generated by introducing hydrogen and a silicon gas, hydrogen plasma is made to act on a reaction product formed on a surface of the gate insulating film to perform removal while performing film formation. Moreover, the plasma is generated by applying a first high-frequency electric power of an HF band a second high-frequency electric power of a VHF band superimposed on each other.

    摘要翻译： 在形成底栅极薄膜晶体管的情况下，进行通过等离子体CVD法在栅极绝缘膜上形成微晶半导体膜的步骤，以及在微晶半导体膜上形成非晶半导体膜的步骤。 在形成微晶半导体膜的步骤中，反应室中的压力设定为10-5Pa以下，基板温度设定在120℃〜220℃的范围内，等离子体由 引入氢气和硅气体，使氢等离子体作用于形成在栅极绝缘膜的表面上的反应产物，以在进行成膜的同时进行除去。 此外，通过施加VHF频带的第一高频电力，VHF频带的第二高频电力彼此叠加而产生等离子体。

    THIN FILM TRANSISTOR
    3.
    发明申请
    THIN FILM TRANSISTOR 有权
    薄膜晶体管

    公开(公告)号：US20090321737A1

    公开(公告)日：2009-12-31

    申请号：US12490447

    申请日：2009-06-24

    申请人： Toshiyuki ISA ,  Yasuhiro JINBO ,  Sachiaki TEZUKA ,  Koji DAIRIKI ,  Hidekazu MIYAIRI ,  Shunpei YAMAZAKI ,  Takuya HIROHASHI

    发明人： Toshiyuki ISA ,  Yasuhiro JINBO ,  Sachiaki TEZUKA ,  Koji DAIRIKI ,  Hidekazu MIYAIRI ,  Shunpei YAMAZAKI ,  Takuya HIROHASHI

    IPC分类号： H01L29/04

    CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78696

    摘要： A thin film transistor includes, as a buffer layer, a semiconductor layer which contains nitrogen and includes crystal regions in an amorphous structure between a gate insulating layer and source and drain regions, at least on the source and drain regions side. As compared to a thin film transistor in which an amorphous semiconductor is included in a channel formation region, on-current of a thin film transistor can be increased. In addition, as compared to a thin film transistor in which a microcrystalline semiconductor is included in a channel formation region, off-current of a thin film transistor can be reduced.

    摘要翻译： 至少在源区和漏区侧，薄膜晶体管包括作为缓冲层的半导体层，该半导体层含有氮并且包括在栅极绝缘层和源极和漏极区之间的非晶结构中的晶体区域。 与在沟道形成区域中包含非晶半导体的薄膜晶体管相比，可以提高薄膜晶体管的导通电流。 此外，与在沟道形成区域中包含微晶半导体的薄膜晶体管相比，可以减小薄膜晶体管的截止电流。

    THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME
    5.
    发明申请
    THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME 有权
    薄膜晶体管及其制造方法

    公开(公告)号：US20090261328A1

    公开(公告)日：2009-10-22

    申请号：US12423123

    申请日：2009-04-14

    申请人： Hidekazu MIYAIRI ,  Koji DAIRIKI ,  Yuji EGI ,  Yasuhiro JINBO ,  Toshiyuki ISA

    发明人： Hidekazu MIYAIRI ,  Koji DAIRIKI ,  Yuji EGI ,  Yasuhiro JINBO ,  Toshiyuki ISA

    IPC分类号： H01L29/786 ,  H01L21/336

    CPC分类号： H01L27/1288 ,  C23C16/0272 ,  C23C16/24 ,  C23C16/4404 ,  H01L27/1214 ,  H01L29/04 ,  H01L29/41733 ,  H01L29/66765 ,  H01L29/78621 ,  H01L29/78669 ,  H01L29/78678 ,  H01L29/78696

    摘要： Disclosed is a thin film transistor which includes, over a substrate having an insulating surface, a gate insulating layer covering a gate electrode; a semiconductor layer which functions as a channel formation region; and a semiconductor layer including an impurity element imparting one conductivity type. The semiconductor layer exists in a state that a plurality of crystalline particles is dispersed in an amorphous silicon and that the crystalline particles have an inverted conical or inverted pyramidal shape. The crystalline particles grow approximately radially in a direction in which the semiconductor layer is deposited. Vertexes of the inverted conical or inverted pyramidal crystal particles are located apart from an interface between the gate insulating layer and the semiconductor layer.

    摘要翻译： 公开了一种薄膜晶体管，其在具有绝缘表面的衬底上方包括覆盖栅电极的栅绝缘层; 用作沟道形成区域的半导体层; 以及包含赋予一种导电型的杂质元素的半导体层。 半导体层以多个结晶粒子分散在非晶硅中的状态存在，并且结晶粒子具有倒锥形或倒棱锥形状。 晶体颗粒沿半导体层沉积的方向大致径向生长。 倒锥形或倒锥形晶体颗粒的顶点位于与栅极绝缘层和半导体层之间的界面之外。

    SEMICONDUCTOR DEVICE
    6.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20110220907A1

    公开(公告)日：2011-09-15

    申请号：US13045951

    申请日：2011-03-11

    申请人： Hidekazu MIYAIRI ,  Koji DAIRIKI ,  Satoshi TORIUMI

    发明人： Hidekazu MIYAIRI ,  Koji DAIRIKI ,  Satoshi TORIUMI

    IPC分类号： H01L29/786

    CPC分类号： H01L29/78648 ,  H01L29/66742 ,  H01L29/78618 ,  H01L29/78687 ,  H01L29/78696

    摘要： In an inverted staggered thin film transistor, a microcrystalline silicon film and a pair of silicon carbide films are provided between a gate insulating film and wirings serving as a source wiring and a drain wiring. The microcrystalline silicon film is formed on the gate insulating film side and the pair of silicon carbide films are formed on the wiring side. In such a manner, a semiconductor device having favorable electric characteristics can be manufactured with high productivity.

    摘要翻译： 在倒置交错薄膜晶体管中，在栅极绝缘膜和用作源极布线和漏极布线的布线之间提供微晶硅膜和一对碳化硅膜。 在栅极绝缘膜侧形成微晶硅膜，在布线侧形成一对碳化硅膜。 以这种方式，可以以高生产率制造具有良好电特性的半导体器件。

    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
    8.
    发明申请
    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开
    半导体器件及其制造方法

    公开(公告)号：US20120298999A1

    公开(公告)日：2012-11-29

    申请号：US13477353

    申请日：2012-05-22

    申请人： Yasuhiro JINBO ,  Koji DAIRIKI ,  Hidekazu MIYAIRI ,  Tomohiro KIMURA ,  Yoshitaka YAMAMOTO

    发明人： Yasuhiro JINBO ,  Koji DAIRIKI ,  Hidekazu MIYAIRI ,  Tomohiro KIMURA ,  Yoshitaka YAMAMOTO

    IPC分类号： H01L29/786 ,  H01L21/336

    CPC分类号： H01L29/04 ,  H01L29/78618 ,  H01L29/78648 ,  H01L29/78678

    摘要： An object is to reduce off-state leakage current between a source electrode and a drain electrode. One embodiment of the present invention is a semiconductor device including a gate electrode, gate insulating films and formed to cover the gate electrode, an active layer formed over the gate insulating films and located above the gate electrode, silicon layers and formed over side surfaces of the active layer and the gate insulating films, and a source electrode and a drain electrode formed over the silicon layers. The active layer is not in contact with each of the source electrode and the drain electrode.

    摘要翻译： 目的是减少源极和漏电极之间的截止状态漏电流。 本发明的一个实施例是一种半导体器件，包括栅电极和栅极绝缘膜，形成为覆盖栅电极，形成在栅极绝缘膜上并位于栅电极上方的有源层，硅层并形成在 有源层和栅极绝缘膜，以及形成在硅层上的源电极和漏电极。 有源层不与源电极和漏电极中的每一个接触。

    SEMICONDUCTOR DEVICE
    9.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20120298997A1

    公开(公告)日：2012-11-29

    申请号：US13473643

    申请日：2012-05-17

    申请人： Hidekazu MIYAIRI ,  Koji DAIRIKI ,  Yasuhiro JINBO ,  Tomohiro KIMURA ,  Yoshitaka YAMAMOTO

    发明人： Hidekazu MIYAIRI ,  Koji DAIRIKI ,  Yasuhiro JINBO ,  Tomohiro KIMURA ,  Yoshitaka YAMAMOTO

    IPC分类号： H01L29/786

    CPC分类号： H01L29/04 ,  H01L29/41733 ,  H01L29/78618 ,  H01L29/78672 ,  H01L29/78678 ,  H01L29/78696

    摘要： One embodiment of the present invention is a semiconductor device which includes a gate electrode; a gate insulating film formed to cover the gate electrode; a semiconductor layer formed over the gate insulating film and placed above the gate electrode; a second insulating film formed over the semiconductor layer; a first insulating film formed over a top surface and a side surface of the second insulating film, a side surface of the semiconductor layer, and the gate insulating film; silicon layers and which are formed over the first insulating film and electrically connected to the semiconductor layer; and a source electrode and a drain electrode which are formed over the silicon layers. The source electrode and the drain electrode are electrically separated from each other over the first insulating film. The semiconductor layer is not in contact with each of the source electrode and the drain electrode.

    摘要翻译： 本发明的一个实施例是包括栅电极的半导体器件; 形成为覆盖所述栅电极的栅极绝缘膜; 形成在所述栅极绝缘膜上并位于所述栅极电极上方的半导体层; 形成在所述半导体层上的第二绝缘膜; 形成在第二绝缘膜的顶表面和侧表面上的第一绝缘膜，半导体层的侧表面和栅极绝缘膜; 硅层，其形成在第一绝缘膜上并电连接到半导体层; 以及形成在硅层上的源电极和漏电极。 源电极和漏电极在第一绝缘膜上彼此电分离。 半导体层不与源电极和漏电极中的每一个接触。

    THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME
    10.
    发明申请
    THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME 有权
    薄膜晶体管及其制造方法

    公开(公告)号：US20100096631A1

    公开(公告)日：2010-04-22

    申请号：US12423111

    申请日：2009-04-14

    申请人： Hidekazu MIYAIRI ,  Koji DAIRIKI ,  Yuji EGI ,  Yasuhiro JINBO ,  Toshiyuki ISA

    发明人： Hidekazu MIYAIRI ,  Koji DAIRIKI ,  Yuji EGI ,  Yasuhiro JINBO ,  Toshiyuki ISA

    IPC分类号： H01L29/786 ,  H01L21/336

    CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L29/04 ,  H01L29/41733 ,  H01L29/66765 ,  H01L29/78621 ,  H01L29/78669 ,  H01L29/78678 ,  H01L29/78696

    摘要： A thin film transistor includes, over a substrate having an insulating surface, a gate insulating layer covering a gate electrode; a semiconductor layer which includes a plurality of crystalline regions in an amorphous structure and which forms a channel formation region, in contact with the gate insulating layer; a semiconductor layer including an impurity element imparting one conductivity type, which forms source and drain regions; and a buffer layer including an amorphous semiconductor between the semiconductor layer and the semiconductor layer including an impurity element imparting one conductivity type. The crystalline regions have an inverted conical or inverted pyramidal crystal particle which grows approximately radially in a direction in which the semiconductor layer is deposited, from a position away from an interface between the gate insulating layer and the semiconductor layer.

    摘要翻译： 薄膜晶体管包括在具有绝缘表面的衬底上，覆盖栅电极的栅绝缘层; 半导体层，其包括与所述栅极绝缘层接触的非晶结构中的多个结晶区域，并形成沟道形成区域; 包含赋予一种导电类型的杂质元素的半导体层，其形成源区和漏区; 以及包括在半导体层和半导体层之间的非晶半导体的缓冲层，其包括赋予一种导电类型的杂质元素。 晶体区域具有从远离栅极绝缘层和半导体层之间的界面的位置沿着沉积半导体层的方向大致径向生长的倒锥形或倒棱锥晶体颗粒。