OVENIZED MEMS
    6.
    发明申请

    公开(公告)号:US20220360218A1

    公开(公告)日:2022-11-10

    申请号:US17824389

    申请日:2022-05-25

    摘要: One or more heating elements are provided to heat a MEMS component (such as a resonator) to a temperature higher than an ambient temperature range in which the MEMS component is intended to operate—in effect, heating the MEMS component and optionally related circuitry to a steady-state “oven” temperature above that which would occur naturally during component operation and thereby avoiding temperature-dependent performance variance/instability (frequency, voltage, propagation delay, etc.). In a number of embodiments, an IC package is implemented with distinct temperature-isolated and temperature-interfaced regions, the former bearing or housing the MEMS component and subject to heating (i.e., to oven temperature) by the one or more heating elements while the latter is provided with (e.g., disposed adjacent) one or more heat dissipation paths to discharge heat generated by transistor circuitry (i.e., expel heat from the integrated circuit package).

    Bonding process with inhibited oxide formation

    公开(公告)号:US11488930B1

    公开(公告)日:2022-11-01

    申请号:US17138255

    申请日:2020-12-30

    IPC分类号: H01L23/00 H01L25/00

    摘要: First and second contacts are formed on first and second wafers from disparate first and second conductive materials, at least one of which is subject to surface oxidation when exposed to air. A layer of oxide-inhibiting material is disposed over a bonding surface of the first contact and the first and second wafers are positioned relative to one another such that a bonding surface of the second contact is in physical contact with the layer of oxide-inhibiting material. Thereafter, the first and second contacts and the layer of oxide-inhibiting material are heated to a temperature that renders the first and second contacts and the layer of oxide-inhibiting material to liquid phases such that at least the first and second contacts alloy into a eutectic bond.

    MEMS CAVITY WITH NON-CONTAMINATING SEAL
    9.
    发明申请

    公开(公告)号:US20180257929A1

    公开(公告)日:2018-09-13

    申请号:US15897135

    申请日:2018-02-14

    IPC分类号: B81C1/00 B81B7/00

    摘要: A semiconductor device includes a first silicon layer disposed between second and third silicon layers and separated therefrom by respective first and second oxide layers. A cavity within the first silicon layer is bounded by interior surfaces of the second and third silicon layers, and a passageway extends through the second silicon layer to enable material removal from within the semiconductor device to form the cavity. A metal feature is disposed within the passageway to hermetically seal the cavity.