PROCESSING APPARATUS AND METHOD FOR FORMING SEMICONDUCTOR STRUCTURE

    公开(公告)号:US20230018022A1

    公开(公告)日:2023-01-19

    申请号:US17377601

    申请日:2021-07-16

    摘要: A processing apparatus is provided. The processing apparatus includes a chamber and a carrier that is positioned in the chamber for holding a substrate. The processing apparatus further includes a gas inlet connected to the chamber. The gas inlet is configured to supply a process gas into the chamber. The processing apparatus also includes a coil module positioned around the chamber and configured to transfer the process gas into plasma. In addition, the processing apparatus includes a filter disposed in the chamber. The coil module is configured to change a position of the plasma between a first position and a second position, the first position is located between the gas inlet and the filter, and the second position is located between the filter and the carrier.

    METHOD OF PATTERNING
    4.
    发明申请

    公开(公告)号:US20220367201A1

    公开(公告)日:2022-11-17

    申请号:US17873113

    申请日:2022-07-25

    摘要: A method of reducing corner rounding during patterning of a substrate to form a prescribed pattern comprising a corner includes dividing the pattern into a first pattern and a second pattern, the first pattern forming a first edge of the corner and the second pattern forming a second edge of the corner. At least a portion of the second pattern overlaps the first pattern such that the first edge intersects with the second edge to form a corner of the prescribed pattern. The method further includes forming the first pattern in a first mask layer disposed on a substrate to expose the substrate and forming the second pattern in the first mask layer to expose the substrate. The substrate exposed through the first mask layer is then etched to obtain the pattern.

    METHOD FOR SEMICONDUCTOR DEVICE STRUCTURE

    公开(公告)号:US20220336635A1

    公开(公告)日:2022-10-20

    申请号:US17854615

    申请日:2022-06-30

    摘要: A method for forming a semiconductor device structure is provided. The method includes forming first semiconductor layers and second semiconductor layers on a substrate, and the first semiconductor layers and the second semiconductor layers are alternately stacked. The method includes forming a dummy gate structure over the first semiconductor layers and the second semiconductor layers, and removing a portion of the first semiconductor layers and second semiconductor layers to form a S/D trench. The method also includes removing the second semiconductor layers to form a recess connected to the S/D trench. The method includes forming a dummy dielectric layer in the recess after the dummy gate structure is formed, and the dummy dielectric layer is exposed by the S/D trench. The method includes removing a portion of the dummy dielectric layer to form a cavity and forming an inner spacer layer in the cavity.

    METHOD OF FABRICATING A SEMICONDUCTOR DEVICE

    公开(公告)号:US20220029002A1

    公开(公告)日:2022-01-27

    申请号:US17498645

    申请日:2021-10-11

    摘要: A method for fabricating a semiconductor device comprises forming a gate electrode structure over a first region of a semiconductor substrate, and forming a source/drain region on a second region of the semiconductor substrate. The gate electrode structure comprises a metal gate electrode layer, a gate dielectric layer, and gate sidewalls. The second region of the semiconductor substrate is on an opposing side of the metal gate electrode layer. The method for fabricating a semiconductor device further comprises forming an interlayer dielectric layer over the source/drain regions and the gate sidewall, and forming an oxide layer over the source/drain region and the gate sidewall without substantially forming the second oxide layer on the gate electrode layer.