Integrated circuits and fabrication thereof

    公开(公告)号:US3571918A

    公开(公告)日:1971-03-23

    申请号:US3571918D

    申请日:1969-03-28

    Inventor: HABERECHT ROLF R

    Abstract: This specification discloses a method of forming an integrated circuit characterized by: 1. Forming on a given substrate, respectively and without the usual complex, multihandling operations; A. A FIRST BLOCK OF SEMICONDUCTOR MATERIAL, B. A SECOND BLOCK OF A REDUCIBLE DIELECTRIC MATERIAL; C. A THIRD BLOCK OF FERRITE, AND D. AN INSULATING FILM COVERING THE SUBSTRATE INTERMEDIATE THE FIRST, SECOND AND THIRD BLOCKS; 2. Forming a semiconductor device in the first block; 3. Forming a resistor in the second block; and 4. Forming a capacitor or an inductor in the third block. An electron beam below a maximum power level is employed to effect the desired depositions and components with the substrate maintained in one reaction chamber. Various vaporous, or gaseous, reactants are flowed past the substrate during the respective operations but external contamination is avoided. Specific materials, reactants, and operations are given.

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