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公开(公告)号：US09714166B2
公开(公告)日：2017-07-25
申请号：US14332461
申请日：2014-07-16
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Shao-Chi Yu , Hsiang-Fu Chen , Hsin-Ting Huang , Chia-Ming Hung , Wen-Chuan Tai
CPC classification number: B81C1/00293 , B81B2207/092 , B81B2207/095 , B81B2207/096 , B81C2203/0109 , B81C2203/0136
Abstract: The present disclosure relates to a MEMS device with a hermetic sealing structure, and an associated method. In some embodiments, a first die and a second die are bonded at a bond interface region to form a chamber. A conformal thin film structure is disposed covering an outer sidewall of the bond interface region to provide hermetic sealing. In some embodiments, the conformal thin film structure is a continuous thin layer covering an outer surface of the second die and a top surface of the first die. In some other embodiments, the conformal thin film structure comprises several discrete thin film patches disposed longitudinal.
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公开(公告)号：US20170121174A1
公开(公告)日：2017-05-04
申请号：US15406915
申请日：2017-01-16
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Chia-Ming Hung , Shao-Chi Yu , Hsiang-Fu Chen , Wen-Chuan Tai , Hsin-Ting Huang
CPC classification number: B81C1/00238 , B81B7/0038 , B81B7/0061 , B81B2201/0264 , B81B2203/0315 , B81C2203/0136 , B81C2203/0145 , B81C2203/019 , B81C2203/036
Abstract: A method for manufacturing a microelectromechanical systems (MEMS) device is provided. According to some embodiments of the method, a semiconductor structure is provided. The semiconductor structure includes an integrated circuit (IC) substrate, a dielectric layer arranged over the IC substrate, and a MEMS substrate arranged over the IC substrate and the dielectric layer to define a cavity between the MEMS substrate and the IC substrate. The MEMS substrate includes a MEMS hole in fluid communication with the cavity and extending through the MEMS substrate. A sealing layer is formed over or lining the MEMS hole to hermetically seal the cavity with a reference pressure while the semiconductor structure is arranged within a vacuum having the reference pressure. The semiconductor structure resulting from application of the method is also provided.
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3.发明授权Microelectrochemical systems (MEMS) device having a seal layer arranged over or lining a hole in fluid communication with a cavity of the MEMS device 有权具有密封层的微电化学系统（MEMS）装置，该密封层布置在与MEMS装置的空腔流体连通的孔中或衬里公开(公告)号：US09567204B2
公开(公告)日：2017-02-14
申请号：US14472636
申请日：2014-08-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Chia-Ming Hung , Shao-Chi Yu , Hsiang-Fu Chen , Wen-Chuan Tai , Hsin-Ting Huang
CPC classification number: B81C1/00238 , B81B7/0038 , B81B7/0061 , B81B2201/0264 , B81B2203/0315 , B81C2203/0136 , B81C2203/0145 , B81C2203/019 , B81C2203/036
Abstract: A method for manufacturing a microelectromechanical systems (MEMS) device is provided. According to the method, a semiconductor structure is provided. The semiconductor structure includes an integrated circuit (IC) substrate, a dielectric layer arranged over the IC substrate, and a MEMS substrate arranged over the IC substrate and the dielectric layer to define a cavity between the MEMS substrate and the IC substrate. The MEMS substrate includes a MEMS hole in fluid communication with the cavity and extending through the MEMS substrate. A sealing layer is formed over or lining the MEMS hole to hermetically seal the cavity with a reference pressure while the semiconductor structure is arranged within a vacuum having the reference pressure. The semiconductor structure resulting from application of the method is also provided.
Abstract translation: 提供了一种用于制造微机电系统（MEMS）装置的方法。 根据该方法，提供半导体结构。 半导体结构包括集成电路（IC）衬底，布置在IC衬底上的电介质层和布置在IC衬底和电介质层上的MEMS衬底，以在MEMS衬底和IC衬底之间限定空腔。 MEMS衬底包括与空腔流体连通并延伸穿过MEMS衬底的MEMS孔。 在半导体结构布置在具有参考压力的真空中之前，密封层形成在MEMS孔的上方或衬套上，以密封空腔与参考压力。 还提供了由应用该方法得到的半导体结构。
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公开(公告)号：US10392244B2
公开(公告)日：2019-08-27
申请号：US15406915
申请日：2017-01-16
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Chia-Ming Hung , Shao-Chi Yu , Hsiang-Fu Chen , Wen-Chuan Tai , Hsin-Ting Huang
Abstract: A method for manufacturing a microelectromechanical systems (MEMS) device is provided. According to some embodiments of the method, a semiconductor structure is provided. The semiconductor structure includes an integrated circuit (IC) substrate, a dielectric layer arranged over the IC substrate, and a MEMS substrate arranged over the IC substrate and the dielectric layer to define a cavity between the MEMS substrate and the IC substrate. The MEMS substrate includes a MEMS hole in fluid communication with the cavity and extending through the MEMS substrate. A sealing layer is formed over or lining the MEMS hole to hermetically seal the cavity with a reference pressure while the semiconductor structure is arranged within a vacuum having the reference pressure. The semiconductor structure resulting from application of the method is also provided.
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5.发明申请MONOLITHIC MEMS PLATFORM FOR INTEGRATED PRESSURE, TEMPERATURE, AND GAS SENSOR 有权用于一体化压力，温度和气体传感器的单片MEMS平台公开(公告)号：US20160266061A1
公开(公告)日：2016-09-15
申请号：US14645826
申请日：2015-03-12
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Shao-Chi Yu , Chia-Ming Hung , Hsin-Ting Huang , Hsiang-Fu Chen , Wen-Chuan Tai
CPC classification number: B81C1/00269 , B81B7/02 , B81B2201/0214 , B81B2201/0264 , B81B2201/0278 , B81B2207/096 , B81C2203/0109 , G01K13/00 , G01L9/0073 , G01L19/0092 , G01N27/221 , G01N2027/222
Abstract: The present disclosure is directed to a monolithic MEMS (micro-electromechanical system) platform having a temperature sensor, a pressure sensor and a gas sensor, and an associated method of formation. In some embodiments, the MEMS platform includes a semiconductor substrate having one or more transistor devices and a temperature sensor. A dielectric layer is disposed over the semiconductor substrate. A cavity is disposed within an upper surface of the dielectric layer. A MEMS substrate is arranged onto the upper surface of the dielectric layer and has a first section and a second section. A pressure sensor has a first pressure sensor electrode that is vertically separated by the cavity from a second pressure sensor electrode within the first section of a MEMS substrate. A gas sensor has a polymer disposed between a first gas sensor electrode within the second section of a MEMS substrate and a second gas sensor electrode.
Abstract translation: 本公开涉及具有温度传感器，压力传感器和气体传感器的单片MEMS（微机电系统）平台以及相关联的形成方法。 在一些实施例中，MEMS平台包括具有一个或多个晶体管器件和温度传感器的半导体衬底。 电介质层设置在半导体衬底上。 空腔设置在电介质层的上表面内。 MEMS基板被布置在电介质层的上表面上并且具有第一部分和第二部分。 压力传感器具有第一压力传感器电极，其在MEMS衬底的第一部分内由空腔与第二压力传感器电极垂直分隔。 气体传感器具有设置在MEMS基板的第二部分内的第一气体传感器电极和第二气体传感器电极之间的聚合物。
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Patent Agency Ranking
6.发明申请公开(公告)号：US20160130137A1
公开(公告)日：2016-05-12
申请号：US14557513
申请日：2014-12-02
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Hsin-Ting Huang , Hsiang-Fu Chen , Wen-Chuan Tai , Shao-Chi Yu , Chia-Ming Hung , Allen Timothy Chang , Bruce C.S. Chou , Chin-Min Lin
CPC classification number: B81C1/00285 , B81B7/02 , B81B2201/0235 , B81B2201/0242 , B81B2207/095 , B81B2207/096 , B81C2203/0145
Abstract: Some embodiments relate to multiple MEMS devices that are integrated together on a single substrate. A device substrate comprising first and second micro-electro mechanical system (MEMS) devices is bonded to a capping structure. The capping structure comprises a first cavity arranged over the first MEMS device and a second cavity arranged over the second MEMS device. The first cavity is filled with a first gas at a first gas pressure. The second cavity is filled with a second gas at a second gas pressure, which is different from the first gas pressure. A recess is arranged within a lower surface of the capping structure. The recess abuts the second cavity. A vent is arranged within the capping structure. The vent extends from a top of the recess to the upper surface of the capping structure. A lid is arranged within the vent and configured to seal the second cavity.
Abstract translation: 一些实施例涉及在单个基板上集成在一起的多个MEMS器件。 包括第一和第二微机电系统（MEMS）装置的装置基板被结合到封盖结构。 封盖结构包括布置在第一MEMS器件上的第一腔和布置在第二MEMS器件上的第二腔。 第一腔体以第一气体压力填充第一气体。 第二腔体以与第一气体压力不同的第二气体压力填充第二气体。 凹口布置在封盖结构的下表面内。 凹槽邻接第二腔。 在封盖结构内设有排气口。 通气孔从凹槽的顶部延伸到封盖结构的上表面。 盖子布置在通气口内并构造成密封第二腔体。
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公开(公告)号：US20160060103A1
公开(公告)日：2016-03-03
申请号：US14472636
申请日：2014-08-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Chia-Ming Hung , Shao-Chi Yu , Hsiang-Fu Chen , Wen-Chuan Tai , Hsin-Ting Huang
CPC classification number: B81C1/00238 , B81B7/0038 , B81B7/0061 , B81B2201/0264 , B81B2203/0315 , B81C2203/0136 , B81C2203/0145 , B81C2203/019 , B81C2203/036
Abstract: A method for manufacturing a microelectromechanical systems (MEMS) device is provided. According to the method, a semiconductor structure is provided. The semiconductor structure includes an integrated circuit (IC) substrate, a dielectric layer arranged over the IC substrate, and a MEMS substrate arranged over the IC substrate and the dielectric layer to define a cavity between the MEMS substrate and the IC substrate. The MEMS substrate includes a MEMS hole in fluid communication with the cavity and extending through the MEMS substrate. A sealing layer is formed over or lining the MEMS hole to hermetically seal the cavity with a reference pressure while the semiconductor structure is arranged within a vacuum having the reference pressure. The semiconductor structure resulting from application of the method is also provided.
Abstract translation: 提供了一种用于制造微机电系统（MEMS）装置的方法。 根据该方法，提供半导体结构。 半导体结构包括集成电路（IC）衬底，布置在IC衬底上的电介质层和布置在IC衬底和电介质层上的MEMS衬底，以在MEMS衬底和IC衬底之间限定空腔。 MEMS衬底包括与空腔流体连通并延伸穿过MEMS衬底的MEMS孔。 在半导体结构布置在具有参考压力的真空中之前，密封层形成在MEMS孔的上方或衬套上，以密封空腔与参考压力。 还提供了由应用该方法得到的半导体结构。
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公开(公告)号：US11491510B2
公开(公告)日：2022-11-08
申请号：US15930570
申请日：2020-05-13
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： I-Hsuan Chiu , Chia-Ming Hung , Li-Chun Peng , Hsiang-Fu Chen
Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device includes an interconnect structure disposed over a semiconductor substrate. A dielectric structure is disposed over the interconnect structure. A plurality of cavities are disposed in the dielectric structure. A microelectromechanical system (MEMS) substrate is disposed over the dielectric structure, where the MEMS substrate comprises a plurality of movable membranes, and where the movable membranes overlie the cavities, respectively. A plurality of fluid communication channels are disposed in the dielectric structure, where each of the fluid communication channels extend laterally between two neighboring cavities of the cavities, such that each of the cavities are in fluid communication with one another.
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公开(公告)号：US11292715B2
公开(公告)日：2022-04-05
申请号：US16601749
申请日：2019-10-15
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Hung-Hua Lin , Chia-Ming Hung , Xin-Hua Huang , Yuan-Chih Hsieh
Abstract: Various embodiments of the present disclosure are directed towards a microelectromechanical system (MEMS) device including a conductive bonding structure disposed between a substrate and a MEMS substrate. An interconnect structure overlies the substrate. The MEMS substrate overlies the interconnect structure and includes a moveable membrane. A dielectric structure is disposed between the interconnect structure and the MEMS substrate. The conductive bonding structure is sandwiched between the interconnect structure and the MEMS substrate. The conductive bonding structure is spaced laterally between sidewalls of the dielectric structure. The conductive bonding structure, the MEMS substrate, and the interconnect structure at least partially define a cavity. The moveable membrane overlies the cavity and is spaced laterally between sidewalls of the conductive bonding structure.
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10.发明授权公开(公告)号：US10131540B2
公开(公告)日：2018-11-20
申请号：US14645650
申请日：2015-03-12
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Shao-Chi Yu , Chia-Ming Hung , Hsin-Ting Huang , Hsiang-Fu Chen , Allen Timothy Chang , Wen-Chuan Tai
Abstract: The present disclosure relates to a wafer level chip scale package (WLCSP) with a stress absorbing cap substrate. The cap substrate is bonded to a die through a bond ring and a bond pad arranged on an upper surface of the cap substrate. A through substrate via (TSV) extends from the bond pad, through the cap substrate, to a lower surface of the cap substrate. Further, recesses in the upper surface extend around the bond pad and along sidewalls of the bond ring. The recesses absorb induced stress, thereby mitigating any device offset in the die.
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