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    Method for manufacturing a MEMS device by first hybrid bonding a CMOS wafer to a MEMS wafer
    1.
    发明授权
    Method for manufacturing a MEMS device by first hybrid bonding a CMOS wafer to a MEMS wafer 有权

    公开(公告)号：US11279615B2

    公开(公告)日：2022-03-22

    申请号：US16384066

    申请日：2019-04-15

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Hung-Hua Lin ,  Chang-Ming Wu ,  Chung-Yi Yu ,  Ping-Yin Liu ,  Jung-Huei Peng

    IPC: B81C1/00 ,  B81B7/00 ,  H01L23/00

    Abstract: A microelectromechanical system (MEMS) structure and method of forming the MEMS device, including forming a first metallization structure over a complementary metal-oxide-semiconductor (CMOS) wafer, where the first metallization structure includes a first sacrificial oxide layer and a first metal contact pad. A second metallization structure is formed over a MEMS wafer, where the second metallization structure includes a second sacrificial oxide layer and a second metal contact pad. The first metallization structure and second metallization structure are then bonded together. After the first metallization structure and second metallization structure are bonded together, patterning and etching the MEMS wafer to form a MEMS element over the second sacrificial oxide layer. After the MEMS element is formed, removing the first sacrificial oxide layer and second sacrificial oxide layer to allow the MEMS element to move freely about an axis.

    METHOD TO PROTECT ELECTRODES FROM OXIDATION IN A MEMS DEVICE
    2.
    发明申请
    METHOD TO PROTECT ELECTRODES FROM OXIDATION IN A MEMS DEVICE 有权

    公开(公告)号：US20210265557A1

    公开(公告)日：2021-08-26

    申请号：US17319628

    申请日：2021-05-13

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Yi-Ren Wang ,  Hung-Hua Lin ,  Yuan-Chih Hsieh

    IPC: H01L41/29 ,  B81C1/00 ,  B81B3/00 ,  H01L41/047

    Abstract: In some embodiments, the present disclosure relates to a piezomicroelectromechanical system (piezoMEMS) device that includes a second piezoelectric layer arranged over the first electrode layer. A second electrode layer is arranged over the second piezoelectric layer. A first contact is arranged over and extends through the second electrode layer and the second piezoelectric layer to contact the first electrode layer. A dielectric liner layer is arranged directly between the first contact and inner sidewalls of the second electrode layer and the second piezoelectric layer. A second contact is arranged over and electrically coupled to the second electrode layer, wherein the second contact is electrically isolated from the first contact.

    METHOD OF IMPROVING GETTER EFFICIENCY BY INCREASING SUPERFICIAL AREA
    4.
    发明申请
    METHOD OF IMPROVING GETTER EFFICIENCY BY INCREASING SUPERFICIAL AREA 有权
    通过增加超级区域提高效率的方法

    公开(公告)号：US20160101976A1

    公开(公告)日：2016-04-14

    申请号：US14967663

    申请日：2015-12-14

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Yuan-Chih Hsieh ,  Li-Cheng Chu ,  Hung-Hua Lin ,  Chih-Jen Chan ,  Lan-Lin Chao

    IPC: B81B7/00

    CPC classification number: B81B7/0038 ,  B81B7/0025 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2203/0315 ,  B81C1/00285 ,  B81C2203/0118 ,  H01L21/3223 ,  H01L23/26 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: In some embodiments, the present disclosure relates to a MEMs (micro-electromechanical system) package device having a getter layer. The MEMs package includes a first substrate having a cavity located within an upper surface of the first substrate. The cavity has roughened interior surfaces. A getter layer is arranged onto the roughened interior surfaces of the cavity. A bonding layer is arranged on the upper surface of the first substrate on opposing sides of the cavity, and a second substrate bonded to the first substrate by the bonding layer. The second substrate is arranged over the cavity. The roughened interior surfaces of the cavity enables more effective absorption of residual gases, thereby increasing the efficiency of a gettering process.

    Abstract translation: 在一些实施例中，本公开涉及具有吸气剂层的MEM（微机电系统）包装装置。 MEM包装包括具有位于第一衬底的上表面内的空腔的第一衬底。 腔内表面粗糙。 吸气剂层布置在空腔的粗糙化的内表面上。 在空腔的相对侧的第一基板的上表面上配置有接合层，通过接合层与第一基板接合的第二基板。 第二基板布置在空腔上方。 空腔的粗糙化的内表面能够更有效地吸收残留气体，从而提高吸气过程的效率。

    Method of improving getter efficiency by increasing superficial area
    5.
    发明授权
    Method of improving getter efficiency by increasing superficial area 有权
    通过增加表面积来提高吸气效率的方法

    公开(公告)号：US09242853B2

    公开(公告)日：2016-01-26

    申请号：US14053751

    申请日：2013-10-15

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Yuan-Chih Hsieh ,  Li-Cheng Chu ,  Hung-Hua Lin ,  Chih-Jen Chan ,  Lan-Lin Chao

    IPC: H01L23/31 ,  B81C1/00 ,  H01L23/26 ,  H01L21/322 ,  B81B7/00

    CPC classification number: B81B7/0038 ,  B81B7/0025 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2203/0315 ,  B81C1/00285 ,  B81C2203/0118 ,  H01L21/3223 ,  H01L23/26 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: The present disclosure relates to a method of gettering that provides for a high efficiency gettering process by depositing a gettering material on a roughened substrate surface, and an associated apparatus. In some embodiments, the method is performed by providing a substrate into a processing chamber having residual gases. One or more cavities are formed in the substrate at locations between bonding areas on a top surface of the substrate. Respective cavities have roughened interior surfaces that vary in a plurality of directions. A getter layer is deposited into the one or more cavities. The roughened interior surfaces of the one or more cavities enable the substrate to more effectively absorb the residual gases, thereby increasing the efficiency of the gettering process.

    Abstract translation: 本公开涉及一种吸气方法，其通过在粗糙化的基底表面上沉积吸气材料和相关联的装置来提供高效吸气过程。 在一些实施例中，通过将衬底提供到具有残留气体的处理室中来执行该方法。 在衬底的顶部表面上的结合区域之间的位置处形成一个或多个空腔。 相应的空腔具有在多个方向上变化的内表面的粗糙化。 吸气剂层沉积到一个或多个空腔中。 一个或多个空腔的粗糙化的内表面使得基底能够更有效地吸收残余气体，从而提高吸气过程的效率。

    METHOD TO PROTECT ELECTRODES FROM OXIDATION IN A MEMS DEVICE
    7.
    发明申请
    METHOD TO PROTECT ELECTRODES FROM OXIDATION IN A MEMS DEVICE 审中-公开

    公开(公告)号：US20200313073A1

    公开(公告)日：2020-10-01

    申请号：US16371421

    申请日：2019-04-01

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Yi-Ren Wang ,  Hung-Hua Lin ,  Yuan-Chih Hsieh

    IPC: H01L41/29 ,  B81C1/00 ,  H01L41/047 ,  B81B3/00

    Abstract: In some embodiments, the present disclosure relates to a method for forming a microelectromechanical system (MEMS) device, including depositing a first electrode layer over a first piezoelectric layer. A hard mask layer is then deposited over the first electrode layer. A photoresist mask is formed on the hard mask layer with a first-electrode pattern. Using the photoresist mask, a first etch is performed into the hard mask layer to transfer the first-electrode pattern to the hard mask layer. The photoresist mask is then removed. A second etch is performed using the hard mask layer to transfer the first-electrode pattern to the first electrode layer, and the hard mask layer is removed.

    Method of Selectively Removing an Anti-Stiction Layer on a Eutectic Bonding Area
    8.
    发明申请
    Method of Selectively Removing an Anti-Stiction Layer on a Eutectic Bonding Area 审中-公开
    选择性地去除共晶接合区域上的抗静电层的方法

    公开(公告)号：US20160185592A1

    公开(公告)日：2016-06-30

    申请号：US14583269

    申请日：2014-12-26

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Yuan-Chih Hsieh ,  Hung-Hua Lin ,  Wen-Chuan Tai ,  Hsiang-Fu Chen

    IPC: B81B7/00 ,  C23C16/50 ,  B81C99/00 ,  C23C16/04 ,  B81B3/00 ,  B81C1/00

    CPC classification number: B81C1/00841 ,  B81B3/0005 ,  B81C1/00269 ,  B81C99/0025 ,  B81C2201/112 ,  B81C2203/0109 ,  C23C16/50

    Abstract: A microelectromechanical systems (MEMS) package includes a eutectic bonding structure free of a native oxide layer and an anti-stiction layer, while also including a MEMS device having a top surface and sidewalls lined with the anti-stiction layer. The MEMS device is arranged within a MEMS substrate having a first eutectic bonding substructure arranged thereon. A cap substrate having a second eutectic bonding substructure arranged thereon is eutectically bonded to the MEMS substrate with a eutectic bond at the interface of the first and second eutectic bonding substructures. The anti-stiction layer lines a top surface and sidewalls of the MEMS device, but not the first and second eutectic bonding substructures. A method for manufacturing the MEMS package and a process system for selective plasma treatment are also provided.

    Abstract translation: 微机电系统（MEMS）封装包括没有自然氧化物层和抗静电层的共晶接合结构，同时还包括具有顶表面和衬有抗静电层的侧壁的MEMS器件。 MEMS器件布置在具有布置在其上的第一共晶结合子结构的MEMS衬底内。 具有布置在其上的第二共晶结合子结构的盖基板在第一和第二共晶结合子结构的界面处共晶结合到MEMS基板上，并具有共晶键。 抗静电层将MEMS器件的顶表面和侧壁排列，而不是第一和第二共晶结合子结构。 还提供了用于制造MEMS封装的方法和用于选择性等离子体处理的工艺系统。

    Method to protect electrodes from oxidation in a MEMS device
    9.
    发明授权
    Method to protect electrodes from oxidation in a MEMS device 有权

    公开(公告)号：US11050012B2

    公开(公告)日：2021-06-29

    申请号：US16371421

    申请日：2019-04-01

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Yi-Ren Wang ,  Hung-Hua Lin ,  Yuan-Chih Hsieh

    IPC: H01L41/29 ,  B81C1/00 ,  B81B3/00 ,  H01L41/047

    Abstract: In some embodiments, the present disclosure relates to a method for forming a microelectromechanical system (MEMS) device, including depositing a first electrode layer over a first piezoelectric layer. A hard mask layer is then deposited over the first electrode layer. A photoresist mask is formed on the hard mask layer with a first-electrode pattern. Using the photoresist mask, a first etch is performed into the hard mask layer to transfer the first-electrode pattern to the hard mask layer. The photoresist mask is then removed. A second etch is performed using the hard mask layer to transfer the first-electrode pattern to the first electrode layer, and the hard mask layer is removed.

    a method for manufacturing a mems device by first hybrid bonding a cmos wafer to a mems wafer
    10.
    发明申请
    a method for manufacturing a mems device by first hybrid bonding a cmos wafer to a mems wafer 审中-公开

    公开(公告)号：US20190092627A1

    公开(公告)日：2019-03-28

    申请号：US15855449

    申请日：2017-12-27

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Hung-Hua Lin ,  Chang-Ming Wu ,  Chung-Yi Yu ,  Ping-Yin Liu ,  Jung-Huei Peng

    IPC: B81C1/00 ,  B81B7/00 ,  H01L23/00

    Abstract: A microelectromechanical system (MEMS) structure and method of forming the MEMS device, including forming a first metallization structure over a complementary metal-oxide-semiconductor (CMOS) wafer, where the first metallization structure includes a first sacrificial oxide layer and a first metal contact pad. A second metallization structure is formed over a MEMS wafer, where the second metallization structure includes a second sacrificial oxide layer and a second metal contact pad. The first metallization structure and second metallization structure are then bonded together. After the first metallization structure and second metallization structure are bonded together, patterning and etching the MEMS wafer to form a MEMS element over the second sacrificial oxide layer. After the MEMS element is formed, removing the first sacrificial oxide layer and second sacrificial oxide layer to allow the MEMS element to move freely about an axis.

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