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    Semiconductor device and programming method
    1.
    发明申请
    Semiconductor device and programming method 有权
    半导体器件和编程方法

    公开(公告)号：US20070015366A1

    公开(公告)日：2007-01-18

    申请号：US11480207

    申请日：2006-06-29

    申请人： Takayuki Enda ,  Masayuki Moriya

    发明人： Takayuki Enda ,  Masayuki Moriya

    IPC分类号： H01L21/461 ,  H01L21/302

    CPC分类号： H01L21/31053 ,  H01L21/3081 ,  H01L21/31111 ,  H01L21/32139 ,  H01L21/76224

    摘要： The present invention provides a method of fabricating a semiconductor device including forming stop layers (32) that include silicon oxy-nitride films above a semiconductor substrate, forming a cover film (34) between and on the stop layers, in which a top surface of the cover film above a region between the stop layers is higher than top surfaces of the stop layers, and polishing the cover film to the stop layers by using ceria slurry, and also provides a semiconductor device including metal layers (30) provided above a semiconductor substrate, silicon oxy-nitride films (32) provided on the metal layers, and an embedded layer (36) provided between the metal layers to have a top surface substantially coplanar with top surfaces of the silicon oxy-nitride films. According to the present invention, it is possible to provide a semiconductor device having a film of excellent planarization on a surface thereof and fabrication method therefor.

    摘要翻译： 本发明提供一种制造半导体器件的方法，包括：形成在半导体衬底上方包含硅氮化物膜的阻挡层（32），在阻挡层之间和之间形成覆盖膜（34），其中顶表面 在止挡层之间的区域之上的覆盖膜高于止挡层的顶表面，并且通过使用二氧化铈浆料将盖膜抛光到止挡层，并且还提供包括设置在半导体上方的金属层（30）的半导体器件 衬底，设置在金属层上的硅氮化物膜（32）以及设置在金属层之间的嵌入层（36），以使顶表面与氮氧化硅膜的顶表面基本上共面。 根据本发明，可以提供一种在其表面上具有优异平坦化膜的半导体器件及其制造方法。

    Semiconductor device with stop layers and fabrication method using ceria slurry
    2.
    发明授权
    Semiconductor device with stop layers and fabrication method using ceria slurry 有权
    具有停止层的半导体器件和使用二氧化铈浆料的制造方法

    公开(公告)号：US09396959B2

    公开(公告)日：2016-07-19

    申请号：US13523568

    申请日：2012-06-14

    申请人： Takayuki Enda ,  Masayuki Moriya

    发明人： Takayuki Enda ,  Masayuki Moriya

    IPC分类号： H01L21/3105 ,  H01L21/308 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/762

    CPC分类号： H01L21/31053 ,  H01L21/3081 ,  H01L21/31111 ,  H01L21/32139 ,  H01L21/76224

    摘要： The present invention provides a method of fabricating a semiconductor device including forming stop layers (32) that include silicon oxy-nitride films above a semiconductor substrate, forming a cover film (34) between and on the stop layers, in which a top surface of the cover film above a region between the stop layers is higher than top surfaces of the stop layers, and polishing the cover film to the stop layers by using ceria slurry, and also provides a semiconductor device including metal layers (30) provided above a semiconductor substrate, silicon oxy-nitride films (32) provided on the metal layers, and an embedded layer (36) provided between the metal layers to have a top surface substantially coplanar with top surfaces of the silicon oxy-nitride films. According to the present invention, it is possible to provide a semiconductor device having a film of excellent planarization on a surface thereof and fabrication method therefor.

    摘要翻译： 本发明提供一种制造半导体器件的方法，包括：形成在半导体衬底上方包含硅氮化物膜的阻挡层（32），在阻挡层之间和之间形成覆盖膜（34），其中顶表面 在止挡层之间的区域之上的覆盖膜高于止挡层的顶表面，并且通过使用二氧化铈浆料将盖膜抛光到止挡层，并且还提供包括设置在半导体上方的金属层（30）的半导体器件 衬底，设置在金属层上的硅氮化物膜（32）以及设置在金属层之间的嵌入层（36），以使顶表面与氮氧化硅膜的顶表面基本上共面。 根据本发明，可以提供一种在其表面上具有优异平坦化膜的半导体器件及其制造方法。

    Semiconductor device with stop layers and fabrication method using ceria slurry
    3.
    发明授权
    Semiconductor device with stop layers and fabrication method using ceria slurry 有权
    具有停止层的半导体器件和使用二氧化铈浆料的制造方法

    公开(公告)号：US08222147B2

    公开(公告)日：2012-07-17

    申请号：US11480207

    申请日：2006-06-29

    申请人： Takayuki Enda ,  Masayuki Moriya

    发明人： Takayuki Enda ,  Masayuki Moriya

    IPC分类号： H01L21/311

    CPC分类号： H01L21/31053 ,  H01L21/3081 ,  H01L21/31111 ,  H01L21/32139 ,  H01L21/76224

    摘要： The present invention provides a method of fabricating a semiconductor device including forming stop layers (32) that include silicon oxy-nitride films above a semiconductor substrate, forming a cover film (34) between and on the stop layers, in which a top surface of the cover film above a region between the stop layers is higher than top surfaces of the stop layers, and polishing the cover film to the stop layers by using ceria slurry, and also provides a semiconductor device including metal layers (30) provided above a semiconductor substrate, silicon oxy-nitride films (32) provided on the metal layers, and an embedded layer (36) provided between the metal layers to have a top surface substantially coplanar with top surfaces of the silicon oxy-nitride films. According to the present invention, it is possible to provide a semiconductor device having a film of excellent planarization on a surface thereof and fabrication method therefor.

    摘要翻译： 本发明提供一种制造半导体器件的方法，包括：形成在半导体衬底上方包含硅氮化物膜的阻挡层（32），在阻挡层之间和之间形成覆盖膜（34），其中顶表面 在止挡层之间的区域之上的覆盖膜高于止挡层的顶表面，并且通过使用二氧化铈浆料将盖膜抛光到止挡层，并且还提供包括设置在半导体上方的金属层（30）的半导体器件 衬底，设置在金属层上的硅氮化物膜（32）以及设置在金属层之间的嵌入层（36），以使顶表面与氮氧化硅膜的顶表面基本上共面。 根据本发明，可以提供一种在其表面上具有优异平坦化膜的半导体器件及其制造方法。

    Semiconductor memory device and method of fabricating the same
    4.
    发明授权
    Semiconductor memory device and method of fabricating the same 失效
    半导体存储器件及其制造方法

    公开(公告)号：US07037780B2

    公开(公告)日：2006-05-02

    申请号：US10714909

    申请日：2003-11-18

    申请人： Hideo Takagi ,  Takayuki Enda ,  Miyuki Umetsu ,  Tsukasa Takamatsu

    发明人： Hideo Takagi ,  Takayuki Enda ,  Miyuki Umetsu ,  Tsukasa Takamatsu

    IPC分类号： H01L21/336

    CPC分类号： H01L27/11568 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11573

    摘要： A silicon nitride film for storing electric charge is formed on a semiconductor substrate while placing a tunnel oxide film in between, and the silicon nitride film is then subjected to hydrogen plasma treatment so as to effectively erase unnecessary charge stored therein during various process steps in fabrication of the semiconductor memory device, to thereby stabilize the threshold voltage (Vth) of the semiconductor memory device.

    摘要翻译： 在半导体衬底上形成用于存储电荷的氮化硅膜，同时在其间放置隧道氧化物膜，然后对氮化硅膜进行氢等离子体处理，以便在制造的各个工艺步骤期间有效地擦除不存在的电荷。 从而稳定半导体存储器件的阈值电压（V SUB）。

    Method of forming a damascene interconnect on a barrier layer
    6.
    发明授权
    Method of forming a damascene interconnect on a barrier layer 有权
    在阻挡层上形成镶嵌互连的方法

    公开(公告)号：US09570396B2

    公开(公告)日：2017-02-14

    申请号：US13217172

    申请日：2011-08-24

    申请人： Takayuki Enda

    发明人： Takayuki Enda

    IPC分类号： H01L23/532 ,  H01L21/768

    CPC分类号： H01L23/53238 ,  H01L21/32133 ,  H01L21/76802 ,  H01L21/76816 ,  H01L21/76829 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76877 ,  H01L21/76885 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor device includes a first metal layer provided above a semiconductor substrate, an interlayer insulating film provided above the first metal layer, a second metal layer that is provided in an opening formed in the interlayer insulating film and is in contact with an underlying layer, the second metal layer being connected to the first metal layer, and a first barrier layer that is provided between the second metal layer and the interlayer insulating film and has a different main composition from that of the underlying layer.

    摘要翻译： 半导体器件包括设置在半导体衬底上的第一金属层，设置在第一金属层上方的层间绝缘膜，设置在形成于层间绝缘膜中并与下层接触的开口中的第二金属层， 第二金属层连接到第一金属层，第一阻挡层设置在第二金属层和层间绝缘膜之间，并且具有与下层不同的主要成分。

    Semiconductor device
    8.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08008778B2

    公开(公告)日：2011-08-30

    申请号：US11479379

    申请日：2006-06-30

    申请人： Takayuki Enda

    发明人： Takayuki Enda

    IPC分类号： H01L23/48

    CPC分类号： H01L23/53238 ,  H01L21/32133 ,  H01L21/76802 ,  H01L21/76816 ,  H01L21/76829 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76877 ,  H01L21/76885 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor device includes a first metal layer provided above a semiconductor substrate, an interlayer insulating film provided above the first metal layer, a second metal layer that is provided in an opening formed in the interlayer insulating film and is in contact with an underlying layer, the second metal layer being connected to the first metal layer, and a first barrier layer that is provided between the second metal layer and the interlayer insulating film and has a different main composition from that of the underlying layer.

    摘要翻译： 半导体器件包括设置在半导体衬底上的第一金属层，设置在第一金属层上方的层间绝缘膜，设置在形成于层间绝缘膜中并与下层接触的开口中的第二金属层， 第二金属层连接到第一金属层，第一阻挡层设置在第二金属层和层间绝缘膜之间，并且具有与下层不同的主要成分。