专利检索 ap:("Vivek Subramanian" OR "James M. Cleeves") AND inv:"James M. Cleeves" 第 1 页

1.

发明授权
Vertically stacked field programmable nonvolatile memory and method of fabrication 有权
标题翻译：垂直堆叠现场可编程非易失性存储器和制造方法

公开(公告)号：US08208282B2

公开(公告)日：2012-06-26

申请号：US12899634

申请日：2010-10-07

申请人： Mark G. Johnson , Thomas H. Lee , Vivek Subramanian , Paul Michael Farmwald , James M. Cleeves

发明人： Mark G. Johnson , Thomas H. Lee , Vivek Subramanian , Paul Michael Farmwald , James M. Cleeves

IPC分类号： G11C11/36

CPC分类号： G11C17/06 , G11C11/5692 , G11C13/003 , G11C17/14 , G11C17/16 , G11C17/165 , G11C2213/71 , G11C2213/76 , H01L27/101 , H01L27/1021 , H01L27/2481 , H01L45/1233 , H01L45/16

摘要： A memory cell is provided that includes a first conductor, a second conductor, a steering element that is capable of providing substantially unidirectional current flow, and a state change element coupled in series with the steering element. The state change element is capable of retaining a programmed state, and the steering element and state change element are vertically aligned with one another. Other aspects are also provided.

摘要翻译： 提供了一种存储单元，其包括第一导体，第二导体，能够提供基本上单向电流的转向元件，以及与该转向元件串联耦合的状态变化元件。状态改变元件能够保持编程状态，并且转向元件和状态改变元件彼此垂直对准。还提供其他方面。

2.

发明申请
VERTICALLY STACKED FIELD PROGRAMMABLE NONVOLATILE MEMORY AND METHOD OF FABRICATION 有权
标题翻译：垂直堆叠现场可编程非易失性存储器和制造方法

公开(公告)号：US20110019467A1

公开(公告)日：2011-01-27

申请号：US12899634

申请日：2010-10-07

申请人： Mark G. Johnson , Thomas H. Lee , Vivek Subramanian , Paul Michael Farmwald , James M. Cleeves

发明人： Mark G. Johnson , Thomas H. Lee , Vivek Subramanian , Paul Michael Farmwald , James M. Cleeves

IPC分类号： G11C11/00

CPC分类号： G11C17/06 , G11C11/5692 , G11C13/003 , G11C17/14 , G11C17/16 , G11C17/165 , G11C2213/71 , G11C2213/76 , H01L27/101 , H01L27/1021 , H01L27/2481 , H01L45/1233 , H01L45/16

摘要： A memory cell is provided that includes a first conductor, a second conductor, a steering element that is capable of providing substantially unidirectional current flow, and a state change element coupled in series with the steering element. The state change element is capable of retaining a programmed state, and the steering element and state change element are vertically aligned with one another. Other aspects are also provided.

摘要翻译： 提供了一种存储单元，其包括第一导体，第二导体，能够提供基本上单向电流的转向元件，以及与该转向元件串联耦合的状态变化元件。状态改变元件能够保持编程状态，并且转向元件和状态改变元件彼此垂直对准。还提供其他方面。

3.

发明授权
Monolithic three dimensional array of charge storage devices containing a planarized surface 有权
标题翻译：包含平坦化表面的电荷存储装置的单片三维阵列

公开(公告)号：US06881994B2

公开(公告)日：2005-04-19

申请号：US09927648

申请日：2001-08-13

申请人： Thomas H. Lee , Vivek Subramanian , James M. Cleeves , Andrew J. Walker , Christopher J. Petti , Igor G. Kouznetzov , Mark G. Johnson , Paul Michael Farmwald , Brad Herner

发明人： Thomas H. Lee , Vivek Subramanian , James M. Cleeves , Andrew J. Walker , Christopher J. Petti , Igor G. Kouznetzov , Mark G. Johnson , Paul Michael Farmwald , Brad Herner

IPC分类号： H01L21/20 , H01L21/336 , H01L21/822 , H01L21/8246 , H01L21/8247 , H01L27/06 , H01L27/10 , H01L27/112 , H01L27/12 , H01L29/423 , H01L29/786 , H01L29/788 , H01L29/792 , H01L29/861 , H01L27/108 , H01L29/76 , H01L29/94 , H01L31/119 , H01L21/8242

CPC分类号： H01L27/11582 , G11C16/0466 , G11C16/10 , G11C16/14 , G11C16/26 , G11C16/3427 , G11C2211/5612 , H01L21/31053 , H01L21/76819 , H01L21/8221 , H01L23/528 , H01L23/5329 , H01L27/0688 , H01L27/112 , H01L27/11286 , H01L27/115 , H01L27/11521 , H01L27/11526 , H01L27/11551 , H01L27/11556 , H01L27/11558 , H01L27/11565 , H01L27/11568 , H01L27/11573 , H01L27/11578 , H01L27/1158 , H01L27/12 , H01L27/1203 , H01L29/0626 , H01L29/0661 , H01L29/16 , H01L29/1604 , H01L29/42324 , H01L29/42332 , H01L29/42364 , H01L29/511 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66825 , H01L29/66833 , H01L29/7391 , H01L29/78642 , H01L29/7881 , H01L29/7889 , H01L29/792 , H01L29/7926 , H01L29/861 , H01L29/8616

摘要： There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive device levels is planarized by chemical mechanical polishing.

摘要翻译： 提供了一种包括多个器件级的电荷存储器件的单片三维阵列，其中通过化学机械抛光将两个连续的器件级之间的至少一个表面平坦化。

4.

发明授权
Vertically stacked field programmable nonvolatile memory and method of fabrication 有权
标题翻译：垂直堆叠现场可编程非易失性存储器和制造方法

公开(公告)号：US06185122B2

公开(公告)日：2001-02-06

申请号：US09469658

申请日：1999-12-22

申请人： Mark G. Johnson , Thomas H. Lee , Vivek Subramanian , P. Michael Farmwald , James M. Cleeves

发明人： Mark G. Johnson , Thomas H. Lee , Vivek Subramanian , P. Michael Farmwald , James M. Cleeves

IPC分类号： G11C1700

CPC分类号： H01L27/1021 , G11C11/5678 , G11C11/5692 , G11C13/003 , G11C17/16 , G11C2213/71 , G11C2213/76

摘要： A very high density field programmable memory is disclosed. An array is formed vertically above a substrate using several layers, each layer of which includes vertically fabricated memory cells. The cell in an N level array may be formed with N+1 masking steps plus masking steps needed for contacts. Maximum use of self alignment techniques minimizes photolithographic limitations. In one embodiment the peripheral circuits are formed in a silicon substrate and an N level array is fabricated above the substrate.

摘要翻译： 公开了一种非常高密度的现场可编程存储器。阵列垂直地形成在衬底上方，使用几层，其各层包括垂直制造的存储单元。 N级阵列中的单元可以形成N + 1掩蔽步骤以及接触所需的掩蔽步骤。自动对准技术的最大限度地使光刻限制最小化。在一个实施例中，外围电路形成在硅衬底中，并且在衬底上方制造N电平阵列。

5.

发明申请
DENSE ARRAYS AND CHARGE STORAGE DEVICES 审中-公开
标题翻译：渗透阵列和充电存储设备

公开(公告)号：US20110156044A1

公开(公告)日：2011-06-30

申请号：US13027113

申请日：2011-02-14

申请人： Thomas H. Lee , Vivek Subramanian , James M. Cleeves , Andrew J. Walker , Christopher J. Petti , Igor G. Kouznetzov , Mark G. Johnson , Paul Michael Farmwald , Brad Herner

发明人： Thomas H. Lee , Vivek Subramanian , James M. Cleeves , Andrew J. Walker , Christopher J. Petti , Igor G. Kouznetzov , Mark G. Johnson , Paul Michael Farmwald , Brad Herner

IPC分类号： H01L29/786 , H01L29/78

CPC分类号： H01L27/11582 , G11C16/0466 , G11C16/10 , G11C16/14 , G11C16/26 , G11C16/3427 , G11C2211/5612 , H01L21/31053 , H01L21/76819 , H01L21/8221 , H01L23/528 , H01L23/5329 , H01L27/0688 , H01L27/112 , H01L27/11286 , H01L27/115 , H01L27/11521 , H01L27/11526 , H01L27/11551 , H01L27/11556 , H01L27/11558 , H01L27/11565 , H01L27/11568 , H01L27/11573 , H01L27/11578 , H01L27/1158 , H01L27/12 , H01L27/1203 , H01L29/0626 , H01L29/0661 , H01L29/16 , H01L29/1604 , H01L29/42324 , H01L29/42332 , H01L29/42364 , H01L29/511 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66825 , H01L29/66833 , H01L29/7391 , H01L29/78642 , H01L29/7881 , H01L29/7889 , H01L29/792 , H01L29/7926 , H01L29/861 , H01L29/8616

摘要： There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive device levels is planarized by chemical mechanical polishing.

摘要翻译： 提供了一种包括多个器件级的电荷存储器件的单片三维阵列，其中通过化学机械抛光将两个连续的器件级之间的至少一个表面平坦化。

6.

发明授权
Dense arrays and charge storage devices 有权

公开(公告)号：US07129538B2

公开(公告)日：2006-10-31

申请号：US10842008

申请日：2004-05-10

申请人： Thomas H. Lee , Vivek Subramanian , James M. Cleeves , Andrew J. Walker , Christopher Petti , Igor G. Kouznetzov , Mark G. Johnson , Paul M. Farmwald , Brad Herner

发明人： Thomas H. Lee , Vivek Subramanian , James M. Cleeves , Andrew J. Walker , Christopher Petti , Igor G. Kouznetzov , Mark G. Johnson , Paul M. Farmwald , Brad Herner

IPC分类号： H01L29/788

CPC分类号： H01L27/11582 , G11C16/0466 , G11C16/10 , G11C16/14 , G11C16/26 , G11C16/3427 , G11C2211/5612 , H01L21/31053 , H01L21/76819 , H01L21/8221 , H01L23/528 , H01L23/5329 , H01L27/0688 , H01L27/112 , H01L27/11286 , H01L27/115 , H01L27/11521 , H01L27/11526 , H01L27/11551 , H01L27/11556 , H01L27/11558 , H01L27/11565 , H01L27/11568 , H01L27/11573 , H01L27/11578 , H01L27/1158 , H01L27/12 , H01L27/1203 , H01L29/0626 , H01L29/0661 , H01L29/16 , H01L29/1604 , H01L29/42324 , H01L29/42332 , H01L29/42364 , H01L29/511 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66825 , H01L29/66833 , H01L29/7391 , H01L29/78642 , H01L29/7881 , H01L29/7889 , H01L29/792 , H01L29/7926 , H01L29/861 , H01L29/8616

摘要： There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive device levels is planarized by chemical mechanical polishing.

7.

发明授权
Thermal processing for three dimensional circuits 有权
标题翻译：三维电路热处理

公开(公告)号：US06770939B2

公开(公告)日：2004-08-03

申请号：US10256116

申请日：2002-09-26

申请人： Vivek Subramanian , James M. Cleeves , N. Johan Knall , Calvin K. Li , Michael A. Vyvoda

发明人： Vivek Subramanian , James M. Cleeves , N. Johan Knall , Calvin K. Li , Michael A. Vyvoda

IPC分类号： H01L2976

CPC分类号： H01L27/0688 , H01L2924/0002 , H01L2924/00

摘要： An apparatus including a circuit of n circuit levels formed over a substrate from a first level to a nth level, wherein n is greater than one, and each of the n circuit levels has a material parameter change that is at least in part caused by a thermal processing operation that is applied to more than one of the n circuit levels simultaneously. An apparatus including a circuit of a plurality of circuit levels, each of the plurality of circuit levels having substantially similar material parameters.

摘要翻译： 一种包括在从第一电平到第n电平的衬底上形成的n个电路电平的电路的装置，其中n大于1，并且n个电路电平中的每一个具有材料参数变化，其至少部分地由热处理操作同时应用于n个电路级中的一个以上。一种包括多个电路电平的电路的装置，所述多个电路电平中的每一个具有基本相似的材料参数。