公开(公告)号：US20050151268A1

公开(公告)日：2005-07-14

申请号：US10826713

申请日：2004-04-16

申请人： William Boyd ,  Chris Haga ,  Anthony Coyle ,  Leland Swanson ,  Quang Mai

发明人： William Boyd ,  Chris Haga ,  Anthony Coyle ,  Leland Swanson ,  Quang Mai

IPC分类号： H01L23/31 ,  H01L23/495 ,  H01L21/48 ,  H01L29/40

CPC分类号： H01L23/3114 ,  H01L23/4951 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/94 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/13019 ,  H01L2224/13082 ,  H01L2224/13099 ,  H01L2224/16245 ,  H01L2224/73253 ,  H01L2224/81193 ,  H01L2224/94 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00014

摘要： A method for assembling a whole semiconductor wafer (101) with a plurality of device units (120) having metal contact pads. Each contact pad has a patterned barrier metal layer and a metal stud (103, preferably copper or nickel) with an outer surface suitable to form metallurgical bonds without melting. A leadframe suitable for the whole wafer is provided, which has a plurality of segments groups (102), each group suitable for one device unit; each segment has first (102a) and second ends (102b) covered by solderable metal. A predetermined amount of solder paste (104) is placed on each of the first segment ends. The leadframe is then aligned with the wafer so that each of the paste-covered segment ends is aligned with the corresponding metal stud of the respective device unit. The leadframe is connected to the wafer and the whole wafer is encapsulated (105) so that the device units and the first segment ends are covered, while the second segment ends remain exposed. The encapsulated wafer is separated (110) into individual device units (120).

摘要翻译： 一种用于将整个半导体晶片（101）与具有金属接触焊盘的多个器件单元（120）组装的方法。 每个接触垫具有图案化的阻挡金属层和金属螺柱（103，优选铜或镍），其外表面适于形成冶金结合而不熔化。 提供了适用于整个晶片的引线框架，其具有多个段组（102），每个组适合于一个设备单元; 每个段具有由可焊接金属覆盖的第一（102a）和第二端（102b）。 将预定量的焊膏（104）放置在每个第一段末端上。 然后将引线框架与晶片对准，使得每个糊状覆盖的段端部与相应的器件单元的相应的金属钉对准。 引线框架连接到晶片，并且整个晶片被封装（105），使得器件单元和第一段端部被覆盖，而第二段端部保持暴露。 将封装的晶片分离成单独的器件单元（120）。

公开(公告)号：US20050280124A1

公开(公告)日：2005-12-22

申请号：US10871645

申请日：2004-06-18

申请人： Anthony Coyle ,  William Boyd ,  Chris Haga ,  Leland Swanson

发明人： Anthony Coyle ,  William Boyd ,  Chris Haga ,  Leland Swanson

IPC分类号： H01L23/433 ,  H01L23/495

CPC分类号： H01L23/4334 ,  H01L24/48 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device comprising a metallic leadframe (103) with a first surface (103a) and a second surface (103b). The leadframe includes a chip pad (104) and a plurality of segments (107); the chip pad is held by a plurality of straps (105), wherein each strap has a groove (106). A chip (101) is mounted on the chip pad and electrically connected to the segments. A heat spreader (110) is disposed on the first surface of the leadframe; the heat spreader has its central portion (110a) spaced above the chip connections (108), and also has positioning members (110b) extending outwardly from the edges of the central portion so that they rest in the grooves of the straps. Encapsulation material surrounds the chip, the electrical connections, and the spreader positioning members, and fills the space between the spreader and the chip, while leaving the second leadframe surface and the central spreader portion exposed.

摘要翻译： 一种半导体器件，包括具有第一表面（103a）和第二表面（103b）的金属引线框架（103）。 引线框架包括芯片焊盘（104）和多个段（107）; 芯片垫由多个带（105）保持，其中每个带具有凹槽（106）。 芯片（101）安装在芯片焊盘上并电连接到段上。 散热器（110）设置在引线框架的第一表面上; 散热器具有在芯片连接件（108）上方间隔开的中心部分（110a），并且还具有从中心部分的边缘向外延伸的定位构件（110b），使得它们搁置在带的凹槽中。 封装材料围绕芯片，电连接和扩展器定位构件，并且填充扩展器和芯片之间的空间，同时使第二引线框表面和中心扩展器部分露出。

公开(公告)号：US20060226521A1

公开(公告)日：2006-10-12

申请号：US11426166

申请日：2006-06-23

申请人： Anthony Coyle ,  William Boyd ,  Chris Haga ,  Leland Swanson

发明人： Anthony Coyle ,  William Boyd ,  Chris Haga ,  Leland Swanson

IPC分类号： H01L23/495

CPC分类号： H01L23/4334 ,  H01L24/48 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device comprising a metallic leadframe (103) with a first surface (103a) and a second surface (103b). The leadframe includes a chip pad (104) and a plurality of segments (107); the chip pad is held by a plurality of straps (105), wherein each strap has a groove (106). A chip (101) is mounted on the chip pad and electrically connected to the segments. A heat spreader (110) is disposed on the first surface of the leadframe; the heat spreader has its central portion (110a) spaced above the chip connections (108), and also has positioning members (110b) extending outwardly from the edges of the central portion so that they rest in the grooves of the straps. Encapsulation material surrounds the chip, the electrical connections, and the spreader positioning members, and fills the space between the spreader and the chip, while leaving the second leadframe surface and the central spreader portion exposed.

摘要翻译： 一种半导体器件，包括具有第一表面（103a）和第二表面（103b）的金属引线框架（103）。 引线框架包括芯片焊盘（104）和多个段（107）; 芯片垫由多个带（105）保持，其中每个带具有凹槽（106）。 芯片（101）安装在芯片焊盘上并电连接到段上。 散热器（110）设置在引线框架的第一表面上; 散热器具有在芯片连接件（108）上方间隔开的中心部分（110a），并且还具有从中心部分的边缘向外延伸的定位构件（110b），使得它们搁置在带的凹槽中。 封装材料围绕芯片，电连接和扩展器定位构件，并且填充扩展器和芯片之间的空间，同时使第二引线框表面和中心扩展器部分露出。

公开(公告)号：US07498203B2

公开(公告)日：2009-03-03

申请号：US11407836

申请日：2006-04-20

申请人： Chris Haga ,  Leland Swanson

发明人： Chris Haga ,  Leland Swanson

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L23/50 ,  H01L21/563 ,  H01L23/24 ,  H01L23/36 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/01057 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/3025 ,  H01L2924/00

摘要： The invention provides thermally enhanced BGAs and methods for their fabrication with a ground ring suitable for operably coupling to either the frontside or backside, or both, of an IC chip mounted on a substrate. The methods and devices of the invention disclosed include the fabrication of a ground ring on the surface of a BGA substrate prepared for receiving the frontside of the chip. A heat spreader has ground ring corresponding to substrate round ring and is attached at the backside of the chip with a conductive material. A conductive material is interposed between the heat spreader and substrate ground rings, electrically coupling them. Thus, the backside of the chip may be electrically connected to the ground ring as well as, or instead of, the frontside.

摘要翻译： 本发明提供了热增强的BGA及其制造方法，该接地环适用于可操作地耦合到安装在基板上的IC芯片的前侧或后侧或两者。 所公开的本发明的方法和装置包括在准备接收芯片前侧的BGA衬底的表面上制造接地环。 散热器具有对应于衬底圆环的接地环，并且用导电材料附接在芯片的背面。 在散热器和基板接地环之间插入导电材料，将它们电耦合。 因此，芯片的背面可以电连接到接地环，也可以或者代替前端。

公开(公告)号：US20070246823A1

公开(公告)日：2007-10-25

申请号：US11407836

申请日：2006-04-20

申请人： Chris Haga ,  Leland Swanson

发明人： Chris Haga ,  Leland Swanson

IPC分类号： H01L23/34

CPC分类号： H01L23/50 ,  H01L21/563 ,  H01L23/24 ,  H01L23/36 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/01057 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/3025 ,  H01L2924/00

摘要： The invention provides thermally enhanced BGAs and methods for their fabrication with a ground ring suitable for operably coupling to either the frontside or backside, or both, of an IC chip mounted on a substrate. The methods and devices of the invention disclosed include the fabrication of a ground ring on the surface of a BGA substrate prepared for receiving the frontside of the chip. A heat spreader has ground ring corresponding to substrate round ring and is attached at the backside of the chip with a conductive material. A conductive material is interposed between the heat spreader and substrate ground rings, electrically coupling them. Thus, the backside of the chip may be electrically connected to the ground ring as well as, or instead of, the frontside.

摘要翻译： 本发明提供了热增强的BGA及其制造方法，该接地环适用于可操作地耦合到安装在基板上的IC芯片的前侧或后侧或两者。 所公开的本发明的方法和装置包括在准备接收芯片前侧的BGA衬底的表面上制造接地环。 散热器具有对应于衬底圆环的接地环，并且用导电材料附接在芯片的背面。 在散热器和基板接地环之间插入导电材料，将它们电耦合。 因此，芯片的背面可以电连接到接地环，也可以或者代替前端。

公开(公告)号：US20050230842A1

公开(公告)日：2005-10-20

申请号：US10827836

申请日：2004-04-20

申请人： Leland Swanson ,  William Boyd

发明人： Leland Swanson ,  William Boyd

IPC分类号： H01L23/48 ,  H01L23/495 ,  H01L23/498 ,  H01L25/065 ,  H01L25/16

CPC分类号： H01L25/0655 ,  H01L23/49575 ,  H01L23/49861 ,  H01L25/162 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/15153 ,  H01L2924/15192

摘要： A method comprising coupling a substrate interconnect to a substrate pad, attaching at least two flip chips to said substrate interconnect to electrically connect together said chips, and coupling at least one lead to each of the chips.

摘要翻译： 一种方法，包括将衬底互连件耦合到衬底焊盘，将至少两个倒装芯片附接到所述衬底互连以将所述芯片电连接在一起，以及将至少一个引线耦合到每个芯片。

公开(公告)号：US20070249135A1

公开(公告)日：2007-10-25

申请号：US11406788

申请日：2006-04-19

申请人： Ming-Yeh Chuang ,  Leland Swanson

发明人： Ming-Yeh Chuang ,  Leland Swanson

IPC分类号： H01L21/331 ,  H01L21/8222

CPC分类号： H01L29/66272 ,  H01L21/8249 ,  H01L29/0821 ,  H01L29/6625

摘要： A bipolar transistor is formed in an integrated BiCMOS process. A buried layer is formed in a semiconductor body. An intrinsic dilute mask is formed over the buried layer that covers at least a portion of a selected region of a target deep well region. The intrinsic dilute mask is employed to implant a dopant into the target deep well region to form a deep well region with the selected region having a lowered dopant concentration. The lowered dopant concentration can yield a higher breakdown voltage for the bipolar device. The intrinsic dilute mask mitigates implantation within the selected region.

摘要翻译： 在集成BiCMOS工艺中形成双极晶体管。 掩埋层形成在半导体本体中。 在覆盖目标深井区域的选定区域的至少一部分的掩埋层上形成固有稀释掩模。 使用固有稀释掩模将掺杂剂注入到目标深阱区域中以形成具有降低的掺杂剂浓度的所选区域的深阱区域。 降低的掺杂剂浓度可以产生双极器件的更高的击穿电压。 固有稀释掩模减轻了所选区域内的植入。

公开(公告)号：US20070246800A1

公开(公告)日：2007-10-25

申请号：US11408775

申请日：2006-04-21

申请人： Leland Swanson ,  Gregory Howard

发明人： Leland Swanson ,  Gregory Howard

IPC分类号： H01L27/12

CPC分类号： H01L29/7322 ,  H01L29/0821

摘要： A transistor apparatus includes a silicon substrate and a barrier structure extending substantially from generally adjacent the silicon substrate to a locus displaced from the silicon substrate. The barrier structure generally surrounds a volume containing connection loci for the transistor apparatus and a buried layer in a silicon medium. The connection loci and the buried layer occupy a space generally presenting a first lateral expanse generally parallel with the silicon substrate. The volume presents a second lateral expanse generally parallel with the silicon substrate. The second lateral expanse is greater than the first lateral expanse within a predetermined distance of the substrate.

摘要翻译： 晶体管装置包括硅衬底和基本上从硅衬底基本上相邻延伸到从硅衬底移位的轨迹的阻挡结构。 阻挡结构通常围绕用于晶体管装置的连接轨迹和硅介质中的掩埋层的体积。 连接轨迹和埋层占据通常呈现与硅衬底大致平行的第一横向宽度的空间。 体积呈现与硅衬底大致平行的第二横向宽度。 第二横向宽度大于在衬底的预定距离内的第一横向宽度。

公开(公告)号：US20070152753A1

公开(公告)日：2007-07-05

申请号：US11325843

申请日：2006-01-05

申请人： Leland Swanson

发明人： Leland Swanson

IPC分类号： H03F3/45

CPC分类号： H03F3/45475 ,  H03F1/12 ,  H03F3/45183 ,  H03F2200/153 ,  H03F2203/45101 ,  H03F2203/45138 ,  H03F2203/45186 ,  H03F2203/45628 ,  H03F2203/45636

摘要： System and method for limiting an output signal of a differential amplifier. A preferred embodiment comprises a limit sense amplifier configured to detect when the output exceeds a permitted limit, a common mode bias current unit configured to increase a signal gain of a common mode amplifier in the differential operational amplifier when the limit sense amplifier detects that the output exceeded the permitted limit, and an output stage bias current unit configured to fix the output at a level substantially equal to the specified limit when the limit sense amplifier detects that the output exceeded the permitted limit. The clamping is achieved by changing the operation of circuitry within the differential amplifier and results in a smoother clamping that helps to maintain stable operation.

摘要翻译： 限制差分放大器输出信号的系统和方法。 优选实施例包括限制读出放大器，其被配置为检测何时输出超过允许极限;共模偏置电流单元，其被配置为当限位读出放大器检测到输出时增加差分运算放大器中的共模放大器的信号增益 以及输出级偏置电流单元，其配置为当限位读出放大器检测到输出超过允许极限时将输出固定在基本上等于指定极限的电平。 通过改变差分放大器内部电路的运行来实现钳位，从而实现更平滑的钳位，有助于保持稳定运行。

公开(公告)号：US20060151804A1

公开(公告)日：2006-07-13

申请号：US11031586

申请日：2005-01-07

申请人： Gregory Howard ,  Leland Swanson

发明人： Gregory Howard ,  Leland Swanson

IPC分类号： H01L29/423

CPC分类号： H01L29/808 ,  H01L29/0692

摘要： The present invention provides a system for providing a cross-lateral junction field effect transistor (114) having desired high-performance desired voltage, frequency or current characteristics. The cross-lateral transistor is formed on a commercial semiconductor substrate (102). A channel structure (124) is formed along the substrate, having source (120) and drain (122) structures laterally formed on opposites sides thereof. A first gate structure (116) is formed along the substrate, laterally adjoining the channel structure orthogonal to the source and drain structures. A second gate structure (118) is formed along the substrate, laterally adjoining the channel structure, orthogonal to the source and drain structures and opposite the first gate structure.

摘要翻译： 本发明提供了一种用于提供具有期望的高性能期望电压，频率或电流特性的横向结型场效应晶体管（114）的系统。 横向晶体管形成在商用半导体衬底（102）上。 沿着衬底形成通道结构（124），其具有在其相对侧上横向形成的源极（120）和漏极（122）结构。 第一栅极结构（116）沿着衬底形成，横向邻接与源极和漏极结构正交的沟道结构。 第二栅极结构（118）沿着衬底形成，横向邻接沟道结构，垂直于源极和漏极结构并与第一栅极结构相对。