Method for reliably removing excess metal during metal silicide formation
    3.
    发明授权
    Method for reliably removing excess metal during metal silicide formation 有权
    在金属硅化物形成期间可靠地去除多余金属的方法

    公开(公告)号:US07700481B2

    公开(公告)日:2010-04-20

    申请号:US11767723

    申请日:2007-06-25

    IPC分类号: H01L21/44

    摘要: A method for manufacturing a semiconductor device. The method comprises forming a metal layer on a silicon-containing layer located on a semiconductor substrate. The method also comprises reacting a portion of the metal layer with the silicon-containing layer to form a metal silicide layer. The method further comprises removing an unreacted portion of the metal layer on the metal silicide layer by a removal process. The removal process includes delivering a flow of an acidic solution to a surface of the unreacted portion of the metal layer, wherein the acidic solution delivered to the surface is substantially gas-free.

    摘要翻译: 一种半导体器件的制造方法。 该方法包括在位于半导体衬底上的含硅层上形成金属层。 该方法还包括使金属层的一部分与含硅层反应以形成金属硅化物层。 该方法还包括通过去除工艺去除金属硅化物层上的金属层的未反应部分。 去除方法包括将酸性溶液流传送到金属层的未反应部分的表面,其中输送到表面的酸性溶液基本上不含气体。

    Method of improving electromigration in semiconductor device manufacturing processes
    5.
    发明授权
    Method of improving electromigration in semiconductor device manufacturing processes 有权
    改善半导体器件制造工艺中电迁移的方法

    公开(公告)号:US06365503B1

    公开(公告)日:2002-04-02

    申请号:US09594189

    申请日:2000-06-14

    IPC分类号: H01L214763

    摘要: The present invention provides a method of forming an electromigration resisting layer in a semiconductor device. In an exemplary embodiment, the method comprises depositing a corrosion inhibitor comprising an organic ligand on a conductive layer of a semiconductor device wherein the conductive layer is susceptible to electromigration. The method further includes subjecting the corrosion inhibitor and the semiconductor device to a high temperature anneal to form an electromigration resisting layer on the conductive layer that reduces electromigration of the conductive layer.

    摘要翻译: 本发明提供一种在半导体器件中形成电迁移层的方法。 在一个示例性实施例中,该方法包括在半导体器件的导电层上沉积包含有机配体的腐蚀抑制剂,其中导电层易于电迁移。 该方法还包括使腐蚀抑制剂和半导体器件进行高温退火,以在导电层上形成减少导电层电迁移的电迁移层。

    Integrated circuit fabrication
    6.
    发明授权
    Integrated circuit fabrication 失效
    集成电路制造

    公开(公告)号:US5538921A

    公开(公告)日:1996-07-23

    申请号:US362616

    申请日:1994-12-22

    申请人: Yaw S. Obeng

    发明人: Yaw S. Obeng

    摘要: After multilayer conductive stacks are defined in a semiconductor processing sequence, rinsing with a dilute solution of surfactants is performed to remove halogen residues which may ultimately contribute to subsequent undesirable corrosion of the stack.

    摘要翻译: 在半导体处理顺序中定义多层导电叠层之后,用表面活性剂的稀溶液进行漂洗以除去可能最终有助于随后堆叠不期望的腐蚀的卤素残余物。

    FUSI integration method using SOG as a sacrificial planarization layer
    7.
    发明授权
    FUSI integration method using SOG as a sacrificial planarization layer 有权
    使用SOG作为牺牲平坦化层的FUSI积分方法

    公开(公告)号:US07732313B2

    公开(公告)日:2010-06-08

    申请号:US12348660

    申请日:2009-01-05

    IPC分类号: H01L21/44

    摘要: A method for making a transistor 20 that includes using a transition metal nitride layer 200 and/or a SOG layer 220 to protect the source/drain regions 60 from silicidation during the silicidation of the gate electrode 90. The SOG layer 210 is planarized to expose the transition metal nitride layer 200 or the gate electrode 93 before the gate silicidation process. If a transition metal nitride layer 200 is used, then it is removed from the top of the gate electrode 93 before the full silicidation of the gate electrode 90.

    摘要翻译: 一种制造晶体管20的方法,其包括使用过渡金属氮化物层200和/或SOG层220来保护源极/漏极区域60在栅电极90的硅化期间不被硅化。SOG层210被平坦化以暴露 在栅极硅化处理之前的过渡金属氮化物层200或栅电极93。 如果使用过渡金属氮化物层200,则在栅电极90完全硅化之前,从栅电极93的顶部去除它。

    Polishing pad composition and method of use
    9.
    发明授权
    Polishing pad composition and method of use 失效
    抛光垫组成及使用方法

    公开(公告)号:US06764574B1

    公开(公告)日:2004-07-20

    申请号:US09938150

    申请日:2001-08-22

    IPC分类号: H01L21302

    CPC分类号: B24B37/24 B24D3/28 B24D3/346

    摘要: The present invention is directed, in general, to packaged polishing pads for chemical mechanical polishing of semiconductor wafers and integrated circuits. More specifically, the invention is directed to a method of preparing and packing the pad and the packaging therefor. Prior to placing the pad on a platen and polishing with the pad, a polishing pad having an hygroscopic absorbency is soaked with an aqueous media for a time sufficient to equilibrate the pad. The pad maybe packaged by placement in a sealable moisture tight package after soaking or before soaking along with a sufficient quantity of aqueous media to allow the pad to equilibrate.

    摘要翻译: 本发明一般涉及用于半导体晶片和集成电路的化学机械抛光的封装抛光垫。 更具体地,本发明涉及一种制备和包装垫及其包装的方法。 在将垫放置在压板上并用垫抛光之前,将具有吸湿吸收性的抛光垫用水性介质浸泡足以平衡垫的时间。 在浸泡之后或在浸泡之前,通过放置在可密封的防潮包装中,垫可以包含足够量的水性介质以使垫平衡。

    Measuring the surface properties of polishing pads using ultrasonic reflectance
    10.
    发明授权
    Measuring the surface properties of polishing pads using ultrasonic reflectance 失效
    使用超声反射测量抛光垫的表面性能

    公开(公告)号:US06684704B1

    公开(公告)日:2004-02-03

    申请号:US10241985

    申请日:2002-09-12

    申请人: Yaw S. Obeng

    发明人: Yaw S. Obeng

    IPC分类号: G01N2910

    摘要: The present invention provides a system and method for measuring the surface properties of polishing pads using noncontact ultrasonic reflectance. An ultrasonic probe is located over the polishing surface and configured to both transmit an ultrasonic signal to the polishing surface and receive a modified ultrasonic signal from the polishing surface without contacting the polishing surface. A subsystem coupled to the ultrasonic probe is configured to determine a surface property of the polishing pad from the modified signal.

    摘要翻译: 本发明提供一种使用非接触式超声反射测量抛光垫的表面特性的系统和方法。 超声波探头位于抛光表面上方,并配置成将超声波信号传送到抛光表面,并从抛光表面接收经修改的超声信号,而不接触抛光表面。 耦合到超声波探头的子系统被配置为根据修改的信号确定抛光垫的表面特性。