-
公开(公告)号：US20060016072A1
公开(公告)日：2006-01-26
申请号：US11122369
申请日：2005-05-05
IPC分类号： H05K3/36
CPC分类号： H05K3/427 , H05K1/116 , H05K3/421 , H05K2201/09736 , H05K2203/0353 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165
摘要： An insulating substrate with metal foils on both sides thereof is prepared, and a through hole that passes through the metal foils and insulating substrate is formed. An electroless copper plating layer is formed on an inner surface of the through hole and a surface of each of the metal foils, followed by the formation of an electrolytic copper plating layer on the overall surface of the electroless copper plating layer. After removing the electrolytic copper plating layer except the portions on the inner surface and a peripheral region of the through hole, the metal foils are processed to form conductor patterns.
摘要翻译： 制备在其两侧具有金属箔的绝缘基板，并且形成穿过金属箔和绝缘基板的通孔。 在通孔的内表面和每个金属箔的表面上形成化学镀铜层，然后在无电镀铜层的整个表面上形成电解铜电镀层。 除去除了通孔的内表面和周边区域之外的电解铜电镀层，处理金属箔以形成导体图案。
-
公开(公告)号：US07281327B2
公开(公告)日：2007-10-16
申请号：US11122369
申请日：2005-05-05
IPC分类号： H01K3/10
CPC分类号： H05K3/427 , H05K1/116 , H05K3/421 , H05K2201/09736 , H05K2203/0353 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165
摘要： An insulating substrate with metal foils on both sides thereof is prepared, and a through hole that passes through the metal foils and insulating substrate is formed. An electroless copper plating layer is formed on an inner surface of the through hole and a surface of each of the metal foils, followed by the formation of an electrolytic copper plating layer on the overall surface of the electroless copper plating layer. After removing the electrolytic copper plating layer except the portions on the inner surface and a peripheral region of the through hole, the metal foils are processed to form conductor patterns.
摘要翻译： 制备在其两侧具有金属箔的绝缘基板，并且形成穿过金属箔和绝缘基板的通孔。 在通孔的内表面和每个金属箔的表面上形成化学镀铜层，然后在无电镀铜层的整个表面上形成电解铜电镀层。 除去除了通孔的内表面和周边区域之外的电解铜电镀层，处理金属箔以形成导体图案。
-
公开(公告)号：US20070190852A1
公开(公告)日：2007-08-16
申请号：US11705408
申请日：2007-02-13
申请人： Kazushi Ichikawa , Yuichi Takayoshi
发明人： Kazushi Ichikawa , Yuichi Takayoshi
IPC分类号： H01R13/60
CPC分类号： H05K1/0269 , H01L23/544 , H01L2223/5442 , H01L2223/54473 , H01L2223/54486 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H05K1/111 , H05K3/3452 , H05K2201/09781 , H05K2201/0989 , H05K2201/10674 , H05K2203/163 , H05K2203/166 , Y02P70/611 , H01L2924/00
摘要： A wired circuit board includes an insulating base layer, a conductive pattern formed on the insulating base layer, and an insulating cover layer formed on the insulating base layer for covering the conductive pattern. The conductive pattern includes terminal portions for connecting with external terminals. The insulating cover layer has an opening formed correspondingly for the respective terminal portions. A position determining zone for determining whether or not a margin of the insulating cover layer facing the opening is located in a proper position is provided in proximity of the terminal portions.
摘要翻译： 布线电路板包括绝缘基底层，形成在绝缘基底层上的导电图案，以及形成在绝缘基底层上用于覆盖导电图案的绝缘覆盖层。 导电图案包括用于与外部端子连接的端子部分。 绝缘覆盖层具有对应于各个端子部分形成的开口。 用于确定位于开口的绝缘覆盖层的边缘是否位于适当位置的位置确定区设置在端子部分附近。
-
公开(公告)号：US06280828B1
公开(公告)日：2001-08-28
申请号：US09526491
申请日：2000-03-15
IPC分类号： B32B300
CPC分类号： H05K3/244 , H01L23/4985 , H01L23/49866 , H01L24/85 , H01L2224/45124 , H01L2224/45144 , H01L2224/85203 , H01L2224/85205 , H01L2224/85444 , H01L2924/0002 , H01L2924/09701 , Y10T428/24917 , H01L2924/00
摘要： A flexible wiring board including a gold pad having dynamic Vickers hardness of not less than 50 or having a ratio of amount of nickel in a surface of the gold pad (atomic weight %) to thickness of gold (&mgr;m) of not more than 5 or having both the dynamic Vickers hardness of not less than 50 and the ratio of amount of nickel in the surface of the gold pad (atomic weight %) to thickness of gold (&mgr;m) of not more than 5, to provide a flexible wiring board that can substantially ensure the connection reliability when the board is connected with a semiconductor device by wiring bonding.
摘要翻译： 一种柔性布线板，包括动态维氏硬度不小于50的金垫或金垫表面的镍的量（原子量％）与金的厚度（mum）的比不大于5或者 具有不小于50的动态维氏硬度和金垫表面的镍的量（原子重量％）与金的厚度（mum）的比率不大于5，以提供柔性布线板， 当基板通过布线接合与半导体器件连接时，可以基本上确保连接的可靠性。
-
公开(公告)号：US20090025963A1
公开(公告)日：2009-01-29
申请号：US12068501
申请日：2008-02-07
IPC分类号： H05K1/03
CPC分类号： H05K1/0269 , H05K1/111 , H05K3/303 , H05K3/3452 , H05K2201/094 , H05K2201/09781 , H05K2201/09918 , H05K2203/163 , H05K2203/166 , Y02P70/611 , Y10T29/49126 , Y10T29/4913 , Y10T29/49155
摘要： A wired circuit board that can provide improved reliability on connection between the terminal portions and the external terminals while ensuring high productivity and cost reduction, and a production method thereof. After a conductive pattern 3 including terminal portions 6 to connect with external terminals 22 of an electronic component 21 and criterion marks 8 to determine presence or absence of an inhibitory portion 23 that may be formed due to formation of an insulating cover layer 4 to inhibit connection between the terminal portions 6 and the external terminals 22 are formed on the insulating base layer 2 simultaneously, the insulating cover layer 4 to cover the conductive pattern 3 and an opening 7 from which the terminal portions 6 and the criterion marks 8 are exposed is formed. Thereafter, the presence or absence of the inhibitory portion 23 is determined with reference to the criterion marks 8 exposed from the opening 7 of the insulating cover layer 4.
摘要翻译： 一种能够在确保高生产率和成本降低的同时，在端子部与外部端子之间的连接方面提高可靠性的布线电路板及其制造方法。 在包括与电子部件21的外部端子22连接的端子部分6的导电图案3和标准标记8之间以确定由于形成绝缘覆盖层4而形成的抑制部分23的存在或不存在以禁止连接 在绝缘基底层2上同时形成端子部分6和外部端子22之间，覆盖导电图案3的绝缘覆盖层4和端子部分6和标准标记8暴露的开口7形成 。 此后，参照从绝缘覆盖层4的开口部7露出的基准标记8来确定抑制部23的有无。
-
公开(公告)号：US20090025212A1
公开(公告)日：2009-01-29
申请号：US12068502
申请日：2008-02-07
IPC分类号： H05K3/30
CPC分类号： H05K1/0269 , H05K1/111 , H05K3/303 , H05K3/3452 , H05K2201/094 , H05K2201/09781 , H05K2201/09918 , H05K2203/163 , H05K2203/166 , Y02P70/611 , Y10T29/49126 , Y10T29/4913 , Y10T29/49155
摘要： A wired circuit board that can provide improved reliability on connection between the terminal portions and the external terminals while ensuring high productivity and cost reduction, and a production method thereof. After a conductive pattern 3 including terminal portions 6 to connect with external terminals 22 of an electronic component 21 and criterion marks 8 to determine presence or absence of an inhibitory portion 23 that may be formed due to formation of an insulating cover layer 4 to inhibit connection between the terminal portions 6 and the external terminals 22 are formed on the insulating base layer 2 simultaneously, the insulating cover layer 4 to cover the conductive pattern 3 and an opening 7 from which the terminal portions 6 and the criterion marks 8 are exposed is formed. Thereafter, the presence or absence of the inhibitory portion 23 is determined with reference to the criterion marks 8 exposed from the opening 7 of the insulating cover layer 4.
-
公开(公告)号：US07629540B2
公开(公告)日：2009-12-08
申请号：US12068501
申请日：2008-02-07
IPC分类号： H05K1/03
CPC分类号： H05K1/0269 , H05K1/111 , H05K3/303 , H05K3/3452 , H05K2201/094 , H05K2201/09781 , H05K2201/09918 , H05K2203/163 , H05K2203/166 , Y02P70/611 , Y10T29/49126 , Y10T29/4913 , Y10T29/49155
摘要： A wired circuit board that can provide improved reliability on connection between the terminal portions and the external terminals while ensuring high productivity and cost reduction, and a production method thereof. After a conductive pattern 3 including terminal portions 6 to connect with external terminals 22 of an electronic component 21 and criterion marks 8 to determine presence or absence of an inhibitory portion 23 that may be formed due to formation of an insulating cover layer 4 to inhibit connection between the terminal portions 6 and the external terminals 22 are formed on the insulating base layer 2 simultaneously, the insulating cover layer 4 to cover the conductive pattern 3 and an opening 7 from which the terminal portions 6 and the criterion marks 8 are exposed is formed. Thereafter, the presence or absence of the inhibitory portion 23 is determined with reference to the criterion marks 8 exposed from the opening 7 of the insulating cover layer 4.
-
公开(公告)号：US07407386B2
公开(公告)日：2008-08-05
申请号：US11705408
申请日：2007-02-13
申请人： Kazushi Ichikawa , Yuichi Takayoshi
发明人： Kazushi Ichikawa , Yuichi Takayoshi
IPC分类号： H01R12/00
CPC分类号： H05K1/0269 , H01L23/544 , H01L2223/5442 , H01L2223/54473 , H01L2223/54486 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H05K1/111 , H05K3/3452 , H05K2201/09781 , H05K2201/0989 , H05K2201/10674 , H05K2203/163 , H05K2203/166 , Y02P70/611 , H01L2924/00
摘要： A wired circuit board includes an insulating base layer, a conductive pattern formed on the insulating base layer, and an insulating cover layer formed on the insulating base layer for covering the conductive pattern. The conductive pattern includes terminal portions for connecting with external terminals. The insulating cover layer has an opening formed correspondingly for the respective terminal portions. A position determining zone for determining whether or not a margin of the insulating cover layer facing the opening is located in a proper position is provided in proximity of the terminal portions.
摘要翻译： 布线电路板包括绝缘基底层，形成在绝缘基底层上的导电图案，以及形成在绝缘基底层上用于覆盖导电图案的绝缘覆盖层。 导电图案包括用于与外部端子连接的端子部分。 绝缘覆盖层具有对应于各个端子部分形成的开口。 用于确定位于开口的绝缘覆盖层的边缘是否位于适当位置的位置确定区设置在端子部分附近。
-
公开(公告)号：US07067912B2
公开(公告)日：2006-06-27
申请号：US10860493
申请日：2004-06-04
CPC分类号： H01L23/49833 , H01L23/49827 , H01L2924/0002 , H01L2924/3011 , H05K1/0237 , H05K1/056 , H05K1/141 , H05K1/147 , H05K3/108 , H05K3/363 , H05K2201/0367 , H05K2201/0715 , H05K2201/093 , H05K2201/0969 , H01L2924/00
摘要： A wired circuit board can control characteristic impedance at connection points between wires of a suspension board with circuit and terminal portions of the wired circuit board connected thereto with a simple structure, to improve signal transmission efficiency even for fine pitch wiring or for high frequency signals. The wired circuit board includes a relay flexible wiring circuit board formed by a first wired circuit board including a first metal substrate, a first insulating base layer, a first conductor layer and a first insulating cover layer which is substantially identical in layer structure with the suspension board with circuit and a second wired circuit board connected with the first wired circuit board for connecting with a control circuit board. Since the suspension board with circuit and the first wired circuit board are rendered substantially identical in layer structure, both characteristic impedances at these connection points can be matched.
摘要翻译： 布线电路板可以通过简单的结构来控制悬挂板的导线之间的连接点处的特性阻抗，其电路和与其连接的布线电路板的端子部分，以便即使对于细间距布线或高频信号来提高信号传输效率。 布线电路板包括由第一布线电路板形成的中继柔性布线电路板，第一布线电路板包括第一金属基板，第一绝缘基底层，第一导体层和第一绝缘覆盖层，其与悬浮液的层结构基本相同 与第一布线电路板连接的第二布线电路板用于与控制电路板连接。 由于具有电路的悬架板和第一布线电路板的层结构基本相同，所以这些连接点的两个特性阻抗都可以匹配。
-
公开(公告)号：US07971353B2
公开(公告)日：2011-07-05
申请号：US12068502
申请日：2008-02-07
CPC分类号： H05K1/0269 , H05K1/111 , H05K3/303 , H05K3/3452 , H05K2201/094 , H05K2201/09781 , H05K2201/09918 , H05K2203/163 , H05K2203/166 , Y02P70/611 , Y10T29/49126 , Y10T29/4913 , Y10T29/49155
摘要： A wired circuit board that can provide improved reliability on connection between the terminal portions and the external terminals while ensuring high productivity and cost reduction, and a production method thereof. After a conductive pattern 3 including terminal portions 6 to connect with external terminals 22 of an electronic component 21 and criterion marks 8 to determine presence or absence of an inhibitory portion 23 that may be formed due to formation of an insulating cover layer 4 to inhibit connection between the terminal portions 6 and the external terminals 22 are formed on the insulating base layer 2 simultaneously, the insulating cover layer 4 to cover the conductive pattern 3 and an opening 7 from which the terminal portions 6 and the criterion marks 8 are exposed is formed. Thereafter, the presence or absence of the inhibitory portion 23 is determined with reference to the criterion marks 8 exposed from the opening 7 of the insulating cover layer 4.
摘要翻译： 一种能够在确保高生产率和成本降低的同时，在端子部与外部端子之间的连接方面提高可靠性的布线电路板及其制造方法。 在包括与电子部件21的外部端子22连接的端子部分6的导电图案3和标准标记8之间以确定由于形成绝缘覆盖层4而形成的抑制部分23的存在或不存在以禁止连接 在绝缘基底层2上同时形成端子部分6和外部端子22之间，覆盖导电图案3的绝缘覆盖层4和端子部分6和标准标记8暴露的开口7形成 。 此后，参照从绝缘覆盖层4的开口部7露出的基准标记8来确定抑制部23的有无。
-
-
-
-
-
-
-
-
-
搜索结果
12 条记录 (耗时 0.027 秒)
