公开(公告)号：US20120295403A1

公开(公告)日：2012-11-22

申请号：US13564421

申请日：2012-08-01

申请人： Yung-Hui Wang ,  Ying-Te Ou

发明人： Yung-Hui Wang ,  Ying-Te Ou

IPC分类号： H01L21/50

CPC分类号： H01L23/49827 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15153 ,  H01L2924/1517 ,  H05K1/185 ,  H05K1/188 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/09536 ,  H05K2201/10674 ,  H05K2203/063 ,  Y10T29/4913 ,  Y10T29/49204 ,  Y10T29/49213

摘要： An embedded chip substrate includes a first insulation layer, a core layer, a chip, a second insulation layer, a first circuit layer, and a second circuit layer. The core layer disposed on the first insulation layer has an opening that exposes a portion of the first insulation layer. The chip is adhered into a recess constructed by the opening and the first insulation layer. The second insulation layer is disposed on the core layer for covering the chip. The first circuit layer is disposed at the outer side of the first insulation layer located between the first circuit layer and the core layer. The second circuit layer is disposed at the outer side of the second insulation layer located between the second circuit layer and the core layer. The first circuit layer is electrically connected to the second circuit layer that is electrically connected to the chip.

摘要翻译： 嵌入式芯片基板包括第一绝缘层，芯层，芯片，第二绝缘层，第一电路层和第二电路层。 设置在第一绝缘层上的芯层具有露出第一绝缘层的一部分的开口。 芯片被粘合到由开口和第一绝缘层构成的凹槽中。 第二绝缘层设置在芯层上以覆盖芯片。 第一电路层设置在位于第一电路层和芯层之间的第一绝缘层的外侧。 第二电路层设置在位于第二电路层和芯层之间的第二绝缘层的外侧。 第一电路层电连接到电连接到芯片的第二电路层。

公开(公告)号：US20100006330A1

公开(公告)日：2010-01-14

申请号：US12493065

申请日：2009-06-26

申请人： Chieh-Chen Fu ,  Ying-Te Ou ,  Yung-Hui Wang

发明人： Chieh-Chen Fu ,  Ying-Te Ou ,  Yung-Hui Wang

IPC分类号： H05K1/16 ,  H05K13/00

CPC分类号： H05K1/185 ,  H01L21/486 ,  H01L21/6835 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L25/105 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/18162 ,  H05K1/056 ,  H05K3/445 ,  H05K3/4608 ,  H05K2201/09536 ,  H05K2201/10674 ,  Y10T29/49172

摘要： A process of an embedded chip package structure includes following steps. Firstly, a metal core layer having a first surface, a second surface opposite to the first surface, an opening, and a number of through holes are provided. The opening and the through holes connect the first surface and the second surface. A chip is then disposed in the opening. Next, a dielectric layer is formed in the opening and the through holes to fix the chip in the opening. Thereafter, a number of conductive vias are respectively formed in the through holes and insulated from the metal core layer by a portion of the dielectric layer located in the through holes. A circuit structure is then formed on the first surface of the metal core layer by performing a build-up process, and the circuit structure electrically connects the chip and the conductive vias.

摘要翻译： 嵌入式芯片封装结构的处理包括以下步骤。 首先，提供具有第一表面，与第一表面相对的第二表面，开口和多个通孔的金属芯层。 开口和通孔连接第一表面和第二表面。 然后将芯片设置在开口中。 接下来，在开口和通孔中形成电介质层，以将芯片固定在开口中。 此后，多个导电通孔分别形成在通孔中并且通过位于通孔中的介电层的一部分与金属芯层绝缘。 然后通过执行积聚过程在金属芯层的第一表面上形成电路结构，并且电路结构将芯片和导电通孔电连接。

公开(公告)号：US09253887B2

公开(公告)日：2016-02-02

申请号：US13564421

申请日：2012-08-01

申请人： Yung-Hui Wang ,  Ying-Te Ou

发明人： Yung-Hui Wang ,  Ying-Te Ou

IPC分类号： H01L21/50 ,  H05K1/18 ,  H01L23/538 ,  H01L23/00 ,  H05K3/42 ,  H05K3/46

CPC分类号： H01L23/49827 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15153 ,  H01L2924/1517 ,  H05K1/185 ,  H05K1/188 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/09536 ,  H05K2201/10674 ,  H05K2203/063 ,  Y10T29/4913 ,  Y10T29/49204 ,  Y10T29/49213

摘要： An embedded chip substrate includes a first insulation layer, a core layer, a chip, a second insulation layer, a first circuit layer, and a second circuit layer. The core layer disposed on the first insulation layer has an opening that exposes a portion of the first insulation layer. The chip is adhered into a recess constructed by the opening and the first insulation layer. The second insulation layer is disposed on the core layer for covering the chip. The first circuit layer is disposed at the outer side of the first insulation layer located between the first circuit layer and the core layer. The second circuit layer is disposed at the outer side of the second insulation layer located between the second circuit layer and the core layer. The first circuit layer is electrically connected to the second circuit layer that is electrically connected to the chip.

摘要翻译： 嵌入式芯片基板包括第一绝缘层，芯层，芯片，第二绝缘层，第一电路层和第二电路层。 设置在第一绝缘层上的芯层具有露出第一绝缘层的一部分的开口。 芯片被粘合到由开口和第一绝缘层构成的凹槽中。 第二绝缘层设置在芯层上以覆盖芯片。 第一电路层设置在位于第一电路层和芯层之间的第一绝缘层的外侧。 第二电路层设置在位于第二电路层和芯层之间的第二绝缘层的外侧。 第一电路层电连接到电连接到芯片的第二电路层。

公开(公告)号：US20080180878A1

公开(公告)日：2008-07-31

申请号：US11942487

申请日：2007-11-19

申请人： Yung-Hui Wang ,  Ying-Te Ou ,  Chih-Pin Hung

发明人： Yung-Hui Wang ,  Ying-Te Ou ,  Chih-Pin Hung

IPC分类号： H01L21/283 ,  H01G4/228

CPC分类号： H01G4/228 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/50 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/19041 ,  H05K1/162 ,  H05K3/4611 ,  H05K2201/09981 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A package structure with an embedded capacitor, a fabricating process thereof and applications of the same are provided, wherein the package structure includes a dielectric layer, a first conductive layer, a second conductive layer, a first embedded plate and a second embedded plate. The dielectric layer has a thickness. The first conductive layer with a first potential is located on one side of the dielectric layer. The second conductive layer with a second potential is located on the dielectric layer at the other side thereof opposite to the first conductive layer. The first embedded plate and the second embedded plate that are embedded in the dielectric layer are separated at a distance, wherein the first embedded plate is electrically connected with the first conductive layer, and the second embedded plate is electrically connected with the second conductive layer.

摘要翻译： 提供具有嵌入式电容器的封装结构及其制造方法及其应用，其中封装结构包括电介质层，第一导电层，第二导电层，第一嵌入板和第二嵌入板。 电介质层具有厚度。 具有第一电位的第一导电层位于电介质层的一侧。 具有第二电位的第二导电层位于与第一导电层相对的另一侧的电介质层上。 嵌入在电介质层中的第一嵌入板和第二嵌入板被隔开一段距离，其中第一嵌入板与第一导电层电连接，第二嵌入板与第二导电层电连接。

公开(公告)号：US20080164562A1

公开(公告)日：2008-07-10

申请号：US11939797

申请日：2007-11-14

申请人： Yung-Hui Wang ,  Ying-Te Ou ,  Chih-Pin Hung

发明人： Yung-Hui Wang ,  Ying-Te Ou ,  Chih-Pin Hung

IPC分类号： H01L21/441 ,  H01L29/92

CPC分类号： H05K1/162 ,  H01L23/49822 ,  H01L23/50 ,  H01L2924/0002 ,  H05K3/107 ,  H05K3/4644 ,  H05K3/4652 ,  H05K2201/09236 ,  H01L2924/00

摘要： A substrate with an embedded passive element and methods for manufacturing the same are provided, wherein the substrate includes an interlayer circuit board having a first conductive circuit, a dielectric layer, a first electrode, a second electrode, and a second conductive circuit. The dielectric layer formed on the interlayer circuit board has a first recess and a second recess for respectively accommodating the first electrode and the second electrode. The embedded passive element is formed by the first electrode, the second electrode, and the dielectric layer between the first electrode and the second electrode. The second conductive circuit electrically connects the first electrode and the second electrode.

摘要翻译： 提供了具有嵌入式无源元件的基板及其制造方法，其中，基板包括具有第一导电电路，电介质层，第一电极，第二电极和第二导电电路的层间电路板。 形成在层间电路板上的电介质层具有分别容纳第一电极和第二电极的第一凹部和第二凹部。 嵌入式无源元件由第一电极，第二电极和第一电极和第二电极之间的电介质层形成。 第二导电电路将第一电极和第二电极电连接。

公开(公告)号：US07338892B2

公开(公告)日：2008-03-04

申请号：US11309020

申请日：2006-06-09

申请人： Yung-Hui Wang ,  Ching-Fu Horng

发明人： Yung-Hui Wang ,  Ching-Fu Horng

IPC分类号： H01L21/4763 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L21/31

CPC分类号： H01L21/4846 ,  H01L21/486 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/5389 ,  H01L2924/0002 ,  H01L2924/00

摘要： A circuit carrier including a core layer, a passive component, a plurality of dielectric layers, and a plurality of circuit layers is provided. The core layer has a first surface and a second surface. In addition, the core layer has a hole, and the passive component is embedded in the hole of the core layer. Furthermore, the circuit layers and the dielectric layers are alternately disposed on the first surface and the second surface of the core layer respectively. The dielectric layers have a plurality of conductive vias, and at least one of the circuit layers is electrically connected to the passive component through the conductive vias. As described above, the electrical performance of the circuit carrier is enhanced. Furthermore, a manufacturing process of the circuit carrier mentioned above is also provided.

摘要翻译： 提供了包括核心层，无源部件，多个电介质层和多个电路层的电路载体。 芯层具有第一表面和第二表面。 此外，芯层具有孔，并且无源部件嵌入在芯层的孔中。 此外，电路层和电介质层分别交替地设置在芯层的第一表面和第二表面上。 电介质层具有多个导电通孔，并且至少一个电路层通过导电通孔与无源部件电连接。 如上所述，提高了电路载体的电气性能。 此外，还提供了上述电路载体的制造工艺。

公开(公告)号：US20050057511A1

公开(公告)日：2005-03-17

申请号：US10710694

申请日：2004-07-29

申请人： Yung-Hui Wang

发明人： Yung-Hui Wang

IPC分类号： G06F3/033 ,  G09G5/08

CPC分类号： G06F3/03543

摘要： A ball-actuated optical mouse includes a housing holding a ball for rotation on a flat surface upon movement of the housing by the user, an image sensor for detecting the direction and amount of movement of the ball, a light source controlled by a sensor switch to emit light onto the ball upon rotation of the ball in the housing, and a refractor for refracting light from the light source onto the ball and focusing reflected light from the ball onto the image sensor through a circular arc surface thereof.

摘要翻译： 球致动光学鼠标包括壳体在使用者移动时保持用于在平坦表面上旋转的壳体，用于检测球的运动方向和量的图像传感器，由传感器开关控制的光源 在球体旋转时将光发射到球上，以及折射器，用于将来自光源的光折射到球上，并将来自球的反射光通过其圆弧表面聚焦到图像传感器上。

公开(公告)号：US20070287281A1

公开(公告)日：2007-12-13

申请号：US11309020

申请日：2006-06-09

申请人： Yung-Hui Wang ,  Ching-Fu Horng

发明人： Yung-Hui Wang ,  Ching-Fu Horng

IPC分类号： H01L21/4763

CPC分类号： H01L21/4846 ,  H01L21/486 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/5389 ,  H01L2924/0002 ,  H01L2924/00

摘要： A circuit carrier including a core layer, a passive component, a plurality of dielectric layers, and a plurality of circuit layers is provided. The core layer has a first surface and a second surface. In addition, the core layer has a hole, and the passive component is embedded in the hole of the core layer. Furthermore, the circuit layers and the dielectric layers are alternately disposed on the first surface and the second surface of the core layer respectively. The dielectric layers have a plurality of conductive vias, and at least one of the circuit layers is electrically connected to the passive component through the conductive vias. As described above, the electrical performance of the circuit carrier is enhanced. Furthermore, a manufacturing process of the circuit carrier mentioned above is also provided.

摘要翻译： 提供了包括核心层，无源部件，多个电介质层和多个电路层的电路载体。 芯层具有第一表面和第二表面。 此外，芯层具有孔，并且无源部件嵌入在芯层的孔中。 此外，电路层和电介质层分别交替地设置在芯层的第一表面和第二表面上。 电介质层具有多个导电通孔，并且至少一个电路层通过导电通孔与无源部件电连接。 如上所述，提高了电路载体的电气性能。 此外，还提供了上述电路载体的制造工艺。

公开(公告)号：US20070220742A1

公开(公告)日：2007-09-27

申请号：US11467568

申请日：2006-08-28

申请人： Kuang-Lin Lo ,  Yung-Hui Wang

发明人： Kuang-Lin Lo ,  Yung-Hui Wang

IPC分类号： H01R43/00 ,  G08B13/14 ,  G06K7/00

CPC分类号： H01R13/465 ,  H05K1/0266 ,  H05K1/0269 ,  H05K3/027 ,  H05K3/4644 ,  H05K2201/09781 ,  H05K2201/09927 ,  H05K2201/09936 ,  Y10T29/49117

摘要： A method for fabricating an identification code is provided. First, a metallic film is provided for fabricating a circuit on a substrate, and a circuit area and a non-circuit area are formed on the metallic film after a patterning process. Next, an identification code is formed on the non-circuit area for the basis of production management and quality control.

摘要翻译： 提供了一种制造识别码的方法。 首先，在基板上设置用于制造电路的金属膜，并且在图案化工艺之后在金属膜上形成电路区域和非电路区域。 接下来，在生产管理和质量控制的基础上，在非电路区域上形成识别码。

公开(公告)号：US07187361B2

公开(公告)日：2007-03-06

申请号：US10665503

申请日：2003-09-22

申请人： Yung-Hui Wang

发明人： Yung-Hui Wang

IPC分类号： G09G5/08

CPC分类号： G06F3/038 ,  G06F3/03543 ,  G06F2203/0333

摘要： A wireless portable input device and a receiver of the same is disclosed. According to one aspect of the present invention, the receiver of the input device can be detached from the motherboard and stored within a receiving chamber of the input device when not in use. The receiver is rotatably mounted on the computer and is designed to be stored within the input device in a first space therewithin when not in use. With the buckling portion formed axially within a second space of the input device the receiver can be positioned therein so that the space occupation can be substantially reduced and also the receiver and the input device of the present invention can be easy assembled.

摘要翻译： 公开了一种无线便携式输入设备及其接收机。 根据本发明的一个方面，输入装置的接收器可以在不使用时从主板分离并存储在输入装置的接收室内。 接收器可旋转地安装在计算机上，并被设计成在不使用时存储在输入装置内的第一空间中。 由于压曲部分在输入装置的第二空间内轴向形成，所以接收器可以被定位在其中，从而可以大大减少占用空间，并且本发明的接收器和输入装置也可以容易地组装。