公开(公告)号：US09253887B2

公开(公告)日：2016-02-02

申请号：US13564421

申请日：2012-08-01

申请人： Yung-Hui Wang ,  Ying-Te Ou

发明人： Yung-Hui Wang ,  Ying-Te Ou

IPC分类号： H01L21/50 ,  H05K1/18 ,  H01L23/538 ,  H01L23/00 ,  H05K3/42 ,  H05K3/46

CPC分类号： H01L23/49827 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15153 ,  H01L2924/1517 ,  H05K1/185 ,  H05K1/188 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/09536 ,  H05K2201/10674 ,  H05K2203/063 ,  Y10T29/4913 ,  Y10T29/49204 ,  Y10T29/49213

摘要： An embedded chip substrate includes a first insulation layer, a core layer, a chip, a second insulation layer, a first circuit layer, and a second circuit layer. The core layer disposed on the first insulation layer has an opening that exposes a portion of the first insulation layer. The chip is adhered into a recess constructed by the opening and the first insulation layer. The second insulation layer is disposed on the core layer for covering the chip. The first circuit layer is disposed at the outer side of the first insulation layer located between the first circuit layer and the core layer. The second circuit layer is disposed at the outer side of the second insulation layer located between the second circuit layer and the core layer. The first circuit layer is electrically connected to the second circuit layer that is electrically connected to the chip.

摘要翻译： 嵌入式芯片基板包括第一绝缘层，芯层，芯片，第二绝缘层，第一电路层和第二电路层。 设置在第一绝缘层上的芯层具有露出第一绝缘层的一部分的开口。 芯片被粘合到由开口和第一绝缘层构成的凹槽中。 第二绝缘层设置在芯层上以覆盖芯片。 第一电路层设置在位于第一电路层和芯层之间的第一绝缘层的外侧。 第二电路层设置在位于第二电路层和芯层之间的第二绝缘层的外侧。 第一电路层电连接到电连接到芯片的第二电路层。

公开(公告)号：US20120117721A1

公开(公告)日：2012-05-17

申请号：US12945933

申请日：2010-11-15

申请人： Yung-Hui Wang

发明人： Yung-Hui Wang

IPC分类号： A47K1/14

CPC分类号： E03C1/298

摘要： A closure device for a drain pipeline includes an outer sleeve, an inner sleeve mounted in the outer sleeve, and a closure member. The outer sleeve is adapted to be installed between a drain of a sink or washbasin and a drainpipe. A flow port is defined in the inner sleeve. The closure member is movably supported in the inner sleeve in a vertical direction. The closure member is normally biased by a spring to close the flow port so as to block odor from flowing into an indoor space, and the closure member is moved downwards to open the flow port when draining water into the outer sleeve.

摘要翻译： 用于排水管道的封闭装置包括外套筒，安装在外套筒中的内套筒和封闭构件。 外套筒适于安装在水槽或洗脸盆的排水沟和排水管之间。 在内套筒中限定流动口。 闭合构件沿垂直方向可移动地支撑在内套筒中。 闭合构件通常由弹簧偏压以关闭流动端口，以阻止气味流入室内空间，并且当将水排入外套筒时，封闭构件向下移动以打开流动口。

公开(公告)号：US08099865B2

公开(公告)日：2012-01-24

申请号：US12142853

申请日：2008-06-20

申请人： Yung Hui Wang ,  Ying Te Ou

发明人： Yung Hui Wang ,  Ying Te Ou

IPC分类号： H05K3/04 ,  H05K3/30

CPC分类号： H05K1/185 ,  H01L21/568 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/82 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H05K3/426 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/09563 ,  H05K2203/0152 ,  H05K2203/0156 ,  H05K2203/025 ,  H05K2203/1152 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49146 ,  Y10T29/49156 ,  Y10T29/49204 ,  Y10T29/49222 ,  H01L2224/82

摘要： A method for manufacturing a circuit board includes the following steps. First, a core layer is provided, wherein the core layer includes a first dielectric layer, and first and second metallic layers. A through hole is formed in the core layer. The core layer is disposed on a supporting plate, and an embedded component is disposed in the through hole, wherein the second metallic layer contacts the supporting plate, and the embedded component has at least one electrode contacting the supporting plate. The embedded component is mounted in the through hole. The supporting plate is removed. The first and second metallic layers are removed, and the thickness of the electrode of the embedded component is decreased. Third and fourth metallic layers are formed respectively, wherein the fourth metallic layer is electrically connected to the electrode of the embedded component. Finally, the third and fourth metallic layers are patterned so as to respectively form first and second patterned circuit layers.

摘要翻译： 一种制造电路板的方法包括以下步骤。 首先，提供芯层，其中芯层包括第一介电层以及第一和第二金属层。 在芯层中形成通孔。 芯层设置在支撑板上，并且嵌入部件设置在通孔中，其中第二金属层接触支撑板，并且嵌入部件具有与支撑板接触的至少一个电极。 嵌入式组件安装在通孔中。 取下支撑板。 第一和第二金属层被去除，并且嵌入部件的电极的厚度减小。 分别形成第三和第四金属层，其中第四金属层电连接到嵌入部件的电极。 最后，第三和第四金属层被图案化以分别形成第一和第二图案化电路层。

公开(公告)号：US20090249618A1

公开(公告)日：2009-10-08

申请号：US12142853

申请日：2008-06-20

申请人： Yung Hui WANG ,  Ying Te OU

发明人： Yung Hui WANG ,  Ying Te OU

IPC分类号： H05K3/00

CPC分类号： H05K1/185 ,  H01L21/568 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/82 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H05K3/426 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/09563 ,  H05K2203/0152 ,  H05K2203/0156 ,  H05K2203/025 ,  H05K2203/1152 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49146 ,  Y10T29/49156 ,  Y10T29/49204 ,  Y10T29/49222 ,  H01L2224/82

摘要： A method for manufacturing a circuit board includes the following steps. First, a core layer is provided, wherein the core layer includes a first dielectric layer, and first and second metallic layers. A through hole is formed in the core layer. The core layer is disposed on a supporting plate, and an embedded component is disposed in the through hole, wherein the second metallic layer contacts the supporting plate, and the embedded component has at least one electrode contacting the supporting plate. The embedded component is mounted in the through hole. The supporting plate is removed. The first and second metallic layers are removed, and the thickness of the electrode of the embedded component is decreased. Third and fourth metallic layers are formed respectively, wherein the fourth metallic layer is electrically connected to the electrode of the embedded component. Finally, the third and fourth metallic layers are patterned so as to respectively form first and second patterned circuit layers.

摘要翻译： 一种制造电路板的方法包括以下步骤。 首先，提供芯层，其中芯层包括第一电介质层以及第一和第二金属层。 在芯层中形成通孔。 芯层设置在支撑板上，并且嵌入部件设置在通孔中，其中第二金属层接触支撑板，并且嵌入部件具有与支撑板接触的至少一个电极。 嵌入式组件安装在通孔中。 取下支撑板。 第一和第二金属层被去除，并且嵌入部件的电极的厚度减小。 分别形成第三和第四金属层，其中第四金属层电连接到嵌入部件的电极。 最后，第三和第四金属层被图案化以分别形成第一和第二图案化电路层。

公开(公告)号：US20080273313A1

公开(公告)日：2008-11-06

申请号：US12078330

申请日：2008-03-28

申请人： Yung-Hui Wang ,  In-De Ou ,  Chih-Pin Hung

发明人： Yung-Hui Wang ,  In-De Ou ,  Chih-Pin Hung

IPC分类号： H05K1/18

CPC分类号： H05K1/185 ,  H01L23/5389 ,  H01L24/19 ,  H01L2924/14 ,  H05K3/4602 ,  H05K2201/09681 ,  H05K2201/09781 ,  H05K2201/10636 ,  H05K2203/1178 ,  Y02P70/611 ,  H01L2924/00

摘要： A carrier with embedded components comprises a substrate and at least one embedded component. The substrate has at least one slot and a first composite layer. The embedded component is disposed at the slot of the substrate. The first composite layer has a degassing structure, at least one first through hole and at least one first fastener, wherein the degassing structure corresponds to the slot, the first through hole exposes the embedded component, and the first fastener is formed at the first through hole and contacts the embedded component. According to the present invention, the degassing structure can smoothly discharge the hydrosphere existing within the carrier under high temperature circumstances and the first fastener is in contact with the embedded component, which increases the joint strength between the embedded component and the substrate.

摘要翻译： 具有嵌入式部件的载体包括基板和至少一个嵌入部件。 衬底具有至少一个槽和第一复合层。 嵌入式部件设置在基板的狭槽处。 第一复合层具有脱气结构，至少一个第一通孔和至少一个第一紧固件，其中脱气结构对应于槽，第一通孔暴露嵌入的部件，并且第一紧固件形成在第一通孔 孔并与嵌入式组件接触。 根据本发明，脱气结构能够在高温环境下平稳地排出存在于载体内的水圈，并且第一紧固件与嵌入部件接触，这增加了嵌入部件和基板之间的接合强度。

公开(公告)号：US20080180878A1

公开(公告)日：2008-07-31

申请号：US11942487

申请日：2007-11-19

申请人： Yung-Hui Wang ,  Ying-Te Ou ,  Chih-Pin Hung

发明人： Yung-Hui Wang ,  Ying-Te Ou ,  Chih-Pin Hung

IPC分类号： H01L21/283 ,  H01G4/228

CPC分类号： H01G4/228 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/50 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/19041 ,  H05K1/162 ,  H05K3/4611 ,  H05K2201/09981 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A package structure with an embedded capacitor, a fabricating process thereof and applications of the same are provided, wherein the package structure includes a dielectric layer, a first conductive layer, a second conductive layer, a first embedded plate and a second embedded plate. The dielectric layer has a thickness. The first conductive layer with a first potential is located on one side of the dielectric layer. The second conductive layer with a second potential is located on the dielectric layer at the other side thereof opposite to the first conductive layer. The first embedded plate and the second embedded plate that are embedded in the dielectric layer are separated at a distance, wherein the first embedded plate is electrically connected with the first conductive layer, and the second embedded plate is electrically connected with the second conductive layer.

摘要翻译： 提供具有嵌入式电容器的封装结构及其制造方法及其应用，其中封装结构包括电介质层，第一导电层，第二导电层，第一嵌入板和第二嵌入板。 电介质层具有厚度。 具有第一电位的第一导电层位于电介质层的一侧。 具有第二电位的第二导电层位于与第一导电层相对的另一侧的电介质层上。 嵌入在电介质层中的第一嵌入板和第二嵌入板被隔开一段距离，其中第一嵌入板与第一导电层电连接，第二嵌入板与第二导电层电连接。

公开(公告)号：US20080164562A1

公开(公告)日：2008-07-10

申请号：US11939797

申请日：2007-11-14

申请人： Yung-Hui Wang ,  Ying-Te Ou ,  Chih-Pin Hung

发明人： Yung-Hui Wang ,  Ying-Te Ou ,  Chih-Pin Hung

IPC分类号： H01L21/441 ,  H01L29/92

CPC分类号： H05K1/162 ,  H01L23/49822 ,  H01L23/50 ,  H01L2924/0002 ,  H05K3/107 ,  H05K3/4644 ,  H05K3/4652 ,  H05K2201/09236 ,  H01L2924/00

摘要： A substrate with an embedded passive element and methods for manufacturing the same are provided, wherein the substrate includes an interlayer circuit board having a first conductive circuit, a dielectric layer, a first electrode, a second electrode, and a second conductive circuit. The dielectric layer formed on the interlayer circuit board has a first recess and a second recess for respectively accommodating the first electrode and the second electrode. The embedded passive element is formed by the first electrode, the second electrode, and the dielectric layer between the first electrode and the second electrode. The second conductive circuit electrically connects the first electrode and the second electrode.

摘要翻译： 提供了具有嵌入式无源元件的基板及其制造方法，其中，基板包括具有第一导电电路，电介质层，第一电极，第二电极和第二导电电路的层间电路板。 形成在层间电路板上的电介质层具有分别容纳第一电极和第二电极的第一凹部和第二凹部。 嵌入式无源元件由第一电极，第二电极和第一电极和第二电极之间的电介质层形成。 第二导电电路将第一电极和第二电极电连接。

公开(公告)号：US20060063301A1

公开(公告)日：2006-03-23

申请号：US11180596

申请日：2005-07-14

申请人： Ching-Fu Hung ,  Yung-Hui Wang

发明人： Ching-Fu Hung ,  Yung-Hui Wang

IPC分类号： H01L21/50

CPC分类号： H05K1/185 ,  H05K3/4611 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165

摘要： A manufacturing method of a multi-layer circuit board with an embedded passive component includes providing a single layer plate having a dielectric layer and a first conductive foil, heating the single layer plate to melt the dielectric layer, pressing a passive component into the second surface of melting dielectric layer, stacking the single layer plate on a core substrate, stacking a second conductive foil on single layer plate, and forming electrical pattern on the second conductive foil. The dielectric layer has a first surface and a second surface. The first conductive foil is disposed on the first surface.

公开(公告)号：US20060059682A1

公开(公告)日：2006-03-23

申请号：US11182743

申请日：2005-07-18

申请人： Ching-Fu Horng ,  Yung-Hui Wang

发明人： Ching-Fu Horng ,  Yung-Hui Wang

IPC分类号： H05K1/18 ,  H05K3/36

CPC分类号： H05K1/188 ,  H05K3/427 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49137 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49169 ,  Y10T29/49174 ,  Y10T29/49208

摘要： A manufacturing method of a multi-layer circuit board embedded with a passive component includes the steps of: providing a conductive foil which has one or more pairs of metal protruding points; connecting a passive element to the corresponding metal protruding points; providing a board having a core substrate with organic insulation layer on a core substrate; stacking the conductive foil and the board, wherein the passive component is embedded in the organic insulation layer and patterning on the conductive foil.

公开(公告)号：US20060005384A1

公开(公告)日：2006-01-12

申请号：US11174534

申请日：2005-07-06

申请人： Ching-Fu Hung ,  Yung-Hui Wang

发明人： Ching-Fu Hung ,  Yung-Hui Wang

IPC分类号： H01L21/44

CPC分类号： H05K1/188 ,  H05K1/0231 ,  H05K3/321 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913

摘要： A manufacturing method of a multi-layer circuit board with an embedded passive component includes: providing a conductive layer which has a first surface and a second surface; forming a metal paste on the first surface to form metal joints; using a sintering process to connect a passive element to the corresponding metal joints; stacking a core substrate and an organic isolated layer on the first surface of the conductive layer; and forming electrical pattern connecting to the passive element on the second surface of the conductive layer.

摘要翻译： 具有嵌入式无源元件的多层电路板的制造方法包括：提供具有第一表面和第二表面的导电层; 在第一表面上形成金属膏以形成金属接头; 使用烧结工艺将被动元件连接到相应的金属接头上; 在导电层的第一表面上堆叠芯基板和有机隔离层; 以及形成连接到所述导电层的第二表面上的无源元件的电图案。