公开(公告)号：US07754599B2

公开(公告)日：2010-07-13

申请号：US12379223

申请日：2009-02-17

申请人： Yung-Yu Hsu ,  Rong-Chang Feng ,  Ra-Min Tain ,  Shyi-Ching Liau ,  Ji-Cheng Lin ,  Shan-Pu Yu ,  Shou-Lung Chen ,  Chih-Yuan Cheng

发明人： Yung-Yu Hsu ,  Rong-Chang Feng ,  Ra-Min Tain ,  Shyi-Ching Liau ,  Ji-Cheng Lin ,  Shan-Pu Yu ,  Shou-Lung Chen ,  Chih-Yuan Cheng

IPC分类号： H01L21/44

CPC分类号： H05K1/115 ,  H01L21/486 ,  H01L23/49827 ,  H01L23/562 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/211 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/3025 ,  H01L2924/351 ,  H05K1/0271 ,  H05K3/4644 ,  H05K2201/068 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2201/09781 ,  H05K2201/09909 ,  H01L2924/00

摘要： A structure for reducing stress for vias and a fabricating method thereof are provided. One or more wires or vias in the thickness direction are enframed with the use of a stress block in a lattice structure to be isolated from being directly contacted with the major portion of insulating materials with a high coefficient of thermal expansion. Thus, the shear stress resulting from temperature loading can be blocked or absorbed by the stress block.

摘要翻译： 提供一种用于减小通孔应力的结构及其制造方法。 使用栅格结构中的应力块与绝缘材料的主要部分直接接触，具有高的热膨胀系数，使厚度方向上的一个或多个导线或通孔被固定。 因此，由温度加载引起的剪切应力可以被应力块阻挡或吸收。

公开(公告)号：US20090156001A1

公开(公告)日：2009-06-18

申请号：US12379223

申请日：2009-02-17

申请人： Yung-Yu Hsu ,  Rong-Chang Feng ,  Ra-Min Tain ,  Shyi-Ching Liau ,  Ji-cheng Lin ,  Shan-Pu Yu ,  Shou-Lung Chen ,  Chih-Yuan Cheng

发明人： Yung-Yu Hsu ,  Rong-Chang Feng ,  Ra-Min Tain ,  Shyi-Ching Liau ,  Ji-cheng Lin ,  Shan-Pu Yu ,  Shou-Lung Chen ,  Chih-Yuan Cheng

IPC分类号： H01L21/768

CPC分类号： H05K1/115 ,  H01L21/486 ,  H01L23/49827 ,  H01L23/562 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/211 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/3025 ,  H01L2924/351 ,  H05K1/0271 ,  H05K3/4644 ,  H05K2201/068 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2201/09781 ,  H05K2201/09909 ,  H01L2924/00

摘要： A structure for reducing stress for vias and a fabricating method thereof are provided. One or more wires or vias in the thickness direction are enframed with the use of a stress block in a lattice structure to be isolated from being directly contacted with the major portion of insulating materials with a high coefficient of thermal expansion. Thus, the shear stress resulting from temperature loading can be blocked or absorbed by the stress block.

公开(公告)号：US08026603B2

公开(公告)日：2011-09-27

申请号：US11408072

申请日：2006-04-21

申请人： Yung-Yu Hsu ,  Chih-Yuan Cheng ,  Shyi-Ching Liau ,  Min-Lin Lee ,  Ra-Min Tain ,  Rong-Chang Feng

发明人： Yung-Yu Hsu ,  Chih-Yuan Cheng ,  Shyi-Ching Liau ,  Min-Lin Lee ,  Ra-Min Tain ,  Rong-Chang Feng

IPC分类号： H01L23/52

CPC分类号： H01L24/12 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/16 ,  H01L24/90 ,  H01L2224/1147 ,  H01L2224/11902 ,  H01L2224/13099 ,  H01L2224/1411 ,  H01L2224/16105 ,  H01L2224/16106 ,  H01L2224/16237 ,  H01L2224/81193 ,  H01L2224/81194 ,  H01L2224/81385 ,  H01L2224/81899 ,  H01L2924/01006 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/351 ,  H05K3/326 ,  H05K2201/0373 ,  H05K2201/209 ,  H01L2924/00

摘要： An interconnect structure of an integrated circuit and manufacturing method therefore are provided, relating to an interconnect structure of flexible packaging. The interconnect structure includes a first and a second conductive pads. A plurality of tiny and conductive first pillars is respectively formed on the first and second pads. With different densities and thicknesses of the first and second pillars, a contact strength can be generated when the pillars interconnecting with each other, such that the pillars are connected closely. Furthermore, the interconnect structure can also be used to connect with fibers made of conductive materials. Moreover, the higher the density of the pillars, the stronger the contact strength. And, electronic substrates and active or passive electronic elements can be stuck on the other side of each pad. Therefore, the interconnect structure can maintain flexibility and have high reliability without being enhanced by any thermosetting polymer.

摘要翻译： 因此，提供了与柔性包装的互连结构相关的集成电路和制造方法的互连结构。 互连结构包括第一和第二导电焊盘。 多个微小且导电的第一支柱分别形成在第一和第二垫上。 当第一和第二支柱具有不同的密度和厚度时，当支柱互相连接时，可以产生接触强度，使得支柱紧密连接。 此外，互连结构也可以用于与由导电材料制成的纤维连接。 此外，支柱的密度越高，接触强度越强。 并且，电子基板和有源或无源电子元件可以卡在每个垫的另一侧上。 因此，互连结构可以保持柔性并且具有高可靠性，而不会被任何热固性聚合物增强。

公开(公告)号：US20090294947A1

公开(公告)日：2009-12-03

申请号：US12464873

申请日：2009-05-13

申请人： Ra-Min Tain ,  Yu-Lin Chao ,  Shu-Jung Yang ,  Rong-Chang Fang ,  Wei Li ,  Chih-Yuan Cheng ,  Ming-Che Hsieh

发明人： Ra-Min Tain ,  Yu-Lin Chao ,  Shu-Jung Yang ,  Rong-Chang Fang ,  Wei Li ,  Chih-Yuan Cheng ,  Ming-Che Hsieh

IPC分类号： H01L23/34 ,  H01L21/50 ,  H01L25/11

CPC分类号： H01L25/105 ,  H01L23/3128 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2924/00

摘要： A chip package structure includes a substrate, a chip, a thermal conductive layer, a plurality of signal contacts, and a molding compound. The substrate includes a plurality of first thermal conductive vias, a connecting circuit, and a plurality of signal vias electrically connected to the connecting circuit, and the substrate has a chip disposing region. The chip is disposed on the chip disposing region of the substrate and electrically connected to the signal vias through the connecting circuit. The thermal conductive layer is disposed over the substrate, connected to the first thermal conductive vias, and located above the chip disposing region. Besides, the thermal conductive layer has first openings exposing the signal vias. The signal contacts are respectively disposed in the first openings and connected to the signal vias. The molding compound encapsulates the chip.

摘要翻译： 芯片封装结构包括衬底，芯片，导热层，多个信号触点和模塑料。 衬底包括多个第一导热通孔，连接电路和电连接到连接电路的多个信号通孔，并且衬底具有芯片布置区域。 芯片设置在基板的芯片布置区域上，并通过连接电路与信号通孔电连接。 导热层设置在衬底上，连接到第一导热通孔，并且位于芯片布置区域的上方。 此外，导热层具有暴露信号通孔的第一开口。 信号触点分别设置在第一开口中并连接到信号通路。 模塑料封装芯片。

公开(公告)号：US08004079B2

公开(公告)日：2011-08-23

申请号：US12464873

申请日：2009-05-13

申请人： Ra-Min Tain ,  Yu-Lin Chao ,  Shu-Jung Yang ,  Rong-Chang Fang ,  Wei Li ,  Chih-Yuan Cheng ,  Ming-Che Hsieh

发明人： Ra-Min Tain ,  Yu-Lin Chao ,  Shu-Jung Yang ,  Rong-Chang Fang ,  Wei Li ,  Chih-Yuan Cheng ,  Ming-Che Hsieh

IPC分类号： H01L23/10 ,  H01L23/34

CPC分类号： H01L25/105 ,  H01L23/3128 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2924/00

摘要： A chip package structure includes a substrate, a chip, a thermal conductive layer, a plurality of signal contacts, and a molding compound. The substrate includes a plurality of first thermal conductive vias, a connecting circuit, and a plurality of signal vias electrically connected to the connecting circuit, and the substrate has a chip disposing region. The chip is disposed on the chip disposing region of the substrate and electrically connected to the signal vias through the connecting circuit. The thermal conductive layer is disposed over the substrate, connected to the first thermal conductive vias, and located above the chip disposing region. Besides, the thermal conductive layer has first openings exposing the signal vias. The signal contacts are respectively disposed in the first openings and connected to the signal vias. The molding compound encapsulates the chip.

摘要翻译： 芯片封装结构包括衬底，芯片，导热层，多个信号触点和模塑料。 衬底包括多个第一导热通孔，连接电路和电连接到连接电路的多个信号通孔，并且衬底具有芯片布置区域。 芯片设置在基板的芯片布置区域上，并通过连接电路与信号通孔电连接。 导热层设置在衬底上，连接到第一导热通孔，并且位于芯片布置区域的上方。 此外，导热层具有暴露信号通孔的第一开口。 信号触点分别设置在第一开口中并连接到信号通路。 模塑料封装芯片。

公开(公告)号：US20050288064A1

公开(公告)日：2005-12-29

申请号：US10904025

申请日：2004-10-19

申请人： Cheng-Shuo Lin ,  Chih-Yuan Cheng

发明人： Cheng-Shuo Lin ,  Chih-Yuan Cheng

IPC分类号： G06F3/023 ,  G06F3/048 ,  G06F9/44 ,  H04B1/38

CPC分类号： G06F3/0238 ,  G06F3/0489 ,  G06F9/451

摘要： A function key control system integrating a function reminder menu, an assistant description menu and a function set-up menu and a controlling method thereof are provided. The controlling method comprises steps of using an embedded controller in an electronic equipment to detect that a first key is activated. The embedded controller transmits a trigger signal to fire up an application program. The application program opens and displays a function reminder menu. The embedded controller detects that a second key is activated and diagnoses a type of the second key. According to the type of the second key, either a function corresponding to the second key is performed or an assistant description menu and a function set-up menu are opened or the application program is terminated.

摘要翻译： 提供集成功能提醒菜单，辅助描述菜单和功能设置菜单的功能键控制系统及其控制方法。 控制方法包括在电子设备中使用嵌入式控制器来检测第一密钥被激活的步骤。 嵌入式控制器发送触发信号以启动应用程序。 应用程序打开并显示功能提醒菜单。 嵌入式控制器检测到第二个键被激活并诊断第二个键的类型。 根据第二密钥的类型，执行对应于第二密钥的功能，或者打开辅助描述菜单和功能设置菜单或者终止应用程序。

公开(公告)号：USD510324S1

公开(公告)日：2005-10-04

申请号：US29196439

申请日：2003-12-31

申请人： Chi-Chang Lin ,  Chih-Yuan Cheng ,  Heng-Tsung Wang

设计人： Chi-Chang Lin ,  Chih-Yuan Cheng ,  Heng-Tsung Wang

公开(公告)号：US20060102320A1

公开(公告)日：2006-05-18

申请号：US11243057

申请日：2005-10-04

申请人： Chi-Chang Lin ,  Chih-Yuan Cheng ,  Heng-Tsung Wang

发明人： Chi-Chang Lin ,  Chih-Yuan Cheng ,  Heng-Tsung Wang

IPC分类号： H05K7/20

CPC分类号： F28F3/04 ,  F28D2021/0029 ,  H01L23/467 ,  H01L2924/0002 ,  H01L2924/00

摘要： A heat sink is disclosed. A plurality of fins is radially and uniformly connected to a central base. Each fin comprises a plurality of protrusions. The protrusions are uniformly formed on each fin around the circumference of the central base.

摘要翻译： 公开了散热器。 多个翅片径向均匀地连接到中心基座。 每个翅片包括多个突起。 突起部均匀地形成在中央基座的圆周周围的每个翅片上。

公开(公告)号：US08222728B2

公开(公告)日：2012-07-17

申请号：US12336320

申请日：2008-12-16

申请人： Chih-Kuang Yu ,  Chun-Kai Liu ,  Ming-Ji Dai ,  Chih-Yuan Cheng

发明人： Chih-Kuang Yu ,  Chun-Kai Liu ,  Ming-Ji Dai ,  Chih-Yuan Cheng

IPC分类号： H01L23/10 ,  H01L23/34

CPC分类号： H01L27/16 ,  H01L23/38 ,  H01L2924/0002 ,  H01S3/04 ,  H01S5/024 ,  H01S5/02476 ,  H01L2924/00

摘要： An active solid heatsink device and fabricating method thereof is related to a high-effective solid cooling device, where heat generated by a heat source with a small area and a high heat-generating density diffuses to a whole substrate using a heat conduction characteristic of hot electrons of a thermionic (TI) structure, and the thermionic (TI) structure and a thermo-electric (TE) structure share the substrate where the heat diffuses to. Further, the shared substrate serves as a cold end of the TE structure, and the heat diffusing to the shared substrate is pumped to another substrate of the TE structure serving as a hot end of the TE structure.

摘要翻译： 一种活性固体散热装置及其制造方法涉及一种高效固体冷却装置，其中由具有小面积和高发热密度的热源产生的热量使用热的热传导特性扩散到整个基板 热电子（TI）结构的电子和热电子（TI）结构和热电（TE）结构共享热扩散到的衬底。 此外，共用衬底用作TE结构的冷端，并且向共享衬底的扩散的热量被泵送到TE结构的热端的另一个TE结构的衬底。

公开(公告)号：US07791949B2

公开(公告)日：2010-09-07

申请号：US12329626

申请日：2008-12-07

申请人： Ching-Fang Yen ,  Che-Heng Lai ,  Chih-Yuan Cheng

发明人： Ching-Fang Yen ,  Che-Heng Lai ,  Chih-Yuan Cheng

IPC分类号： G11C16/00

CPC分类号： G11C16/10 ,  G11C16/3431

摘要： A refresh method for a non-volatile memory for preventing disturb phenomenon includes reading data of a memory unit of the non-volatile memory at a first time point within a predefined period and storing the data in a buffer, determining whether data of the memory unit and data of the buffer are identical at a second time point within the predefined period, so as to generate a determination result, and refreshing the memory unit according to the determination result.

摘要翻译： 用于防止干扰现象的非易失性存储器的刷新方法包括在预定时间段内的第一时间点读取非易失性存储器的存储器单元的数据，并将数据存储在缓冲器中，确定存储器单元的数据 并且缓冲器的数据在预定时间段内的第二时间点相同，以便产生确定结果，并根据确定结果刷新存储器单元。