OPTICAL METHOD AND APPARATUS FOR QUICKLY REALIZING PRECISE CALIBRATION OF LITHOGRAPHY SYSTEM

    公开(公告)号:US20240345488A1

    公开(公告)日:2024-10-17

    申请号:US18294989

    申请日:2021-12-29

    发明人: Dandan Han Yayi Wei

    IPC分类号: G03F7/00

    摘要: A method for fast precise optical calibration on a photolithography system, including: determining a fitting relationship for a spot width corresponding to a point light source based on distribution of field strength generated by the point light source at an exit plane of a focusing element; determining, based on the fitting relationship, a first correspondence between the spot width and a parameter for exposing a photoresist, where the spot width in the first correspondence is for optical microscopy; determining a first spot-width dataset for the point light source based on an optical microscopic image of a spot-mapping pattern on a surface of the photoresist; determining, based on the first spot-width dataset, a second correspondence between the spot width and the parameter; and determining the first correspondence as a means for determining the parameter, when the first correspondence and the second correspondence meet a preset condition.

    SIGNAL DRIVING SYSTEM WITH CONSTANT SLEW RATE

    公开(公告)号:US20240305297A1

    公开(公告)日:2024-09-12

    申请号:US18258706

    申请日:2020-12-25

    IPC分类号: H03K19/0175

    CPC分类号: H03K19/0175

    摘要: Provided is a signal driving system with a constant slew. The signal driving system with the constant slew includes: a step voltage generation unit configured to provide multiplex arithmetic gradient voltage signals; a multiplexer, wherein an input end of the multiplexer is connected to the step voltage generation unit to receive the multiplex arithmetic gradient voltage signals, and another input end of the multiplexer is connected to a control signal generation unit, and the multiplexer is configured to selectively output the multiplex arithmetic gradient voltage signals under a control of a control signal generated by the control signal generation unit; a voltage following unit connected to the multiplexer, wherein the voltage following unit is configured to serve as an isolation and improve a driving ability; and an output following unit connected to the voltage following unit, wherein the output following unit is configured to drive a subsequently-connected load unit.

    METHOD FOR PREPARING RESERVOIR ELEMENT
    4.
    发明公开

    公开(公告)号:US20240260488A1

    公开(公告)日:2024-08-01

    申请号:US18559755

    申请日:2022-03-15

    IPC分类号: H10N70/00 H10N70/20

    摘要: A method for manufacturing a reservoir computing apparatus, related to artificial intelligence. The method comprises: step a), providing a bottom electrode layer, a dielectric layer, a resistive switching layer, and a top electrode layer based on the above-listed sequence on a substrate to obtain a to-be-annealed reservoir computing apparatus; and step b), annealing the to-be-annealed reservoir computing apparatus to obtain the reservoir computing apparatus, where a temperature of the annealing ranges from 300° C. to 700° C., and duration of the annealing duration ranges from 30s to 100s. The manufactured reservoir computing apparatus is subject to rapid annealing, which redistributes defects, forms a more stable film, and introduces a ferroelectric O-phase into the film. The rapid annealing reduces power consumption and improves computing accuracy effectively.

    Interconnection structure and method of manufacturing the same, and electronic device including the interconnection structure

    公开(公告)号:US12027457B2

    公开(公告)日:2024-07-02

    申请号:US17836934

    申请日:2022-06-09

    发明人: Huilong Zhu

    摘要: An interconnection structure and a method of manufacturing the same, and an electronic device including the interconnection structure are provided. According to an embodiment, the interconnection structure includes: a first interconnection line at a first level, including at least a first portion extending along a first direction; a second interconnection line at a second level higher than the first level, including at least a second portion extending along a second direction crossing the first direction; a via plug disposed between the first portion of the first interconnection line and the second portion of the second interconnection line, and configured to electrically connect the first interconnection line and the second interconnection line, wherein the via plug includes a first pair of sidewalls respectively extending substantially parallel to corresponding sidewalls of the first portion and a second pair of sidewalls respectively extending substantially parallel to corresponding sidewalls of the second portion.

    METHOD AND APPARATUS FOR CORRECTING PROXIMITY EFFECT OF ELECTRON BEAM

    公开(公告)号:US20240184217A1

    公开(公告)日:2024-06-06

    申请号:US17784064

    申请日:2021-12-29

    IPC分类号: G03F7/00

    摘要: A method and an apparatus for correcting a proximity effect of an electron beam. An initial dose of the electron beam is preset for each exposed square, and proximity effect energy representing an influence of exposing all exposed squares other than a current exposed square on the current exposed is calculated. A corrected dose of the electron beam for the current exposed square is then calculated, and the corrected dose for each exposed square in the electron beam exposure layout matrix is successively calculated. Then, the above calculation iterates for T times to obtain a final corrected dose of the electron beam for each exposed square.

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

    公开(公告)号:US20240164110A1

    公开(公告)日:2024-05-16

    申请号:US17783627

    申请日:2021-12-23

    IPC分类号: H10B51/30

    CPC分类号: H10B51/30

    摘要: A semiconductor device, including a substrate, a first electrode layer, a functional layer, and a second electrode layer. The functional layer is located between the first electrode layer and the second electrode layer, and includes a first region and a second region having a C-shaped structure surrounding the first region. The C-shape structure opens toward a direction that is parallel with the substrate and away from the first region, that is, the C-shaped structure opens toward a distal side. The first region is made of at least germanium, and the second region includes a C-shaped ferroelectric layer and a C-shaped gate that are sequentially stacked. In embodiments of the present disclosure, the C-shaped ferroelectric layer serves as a memory layer of the memory device. A C-shaped channel is capable to increase an electric field within the ferroelectric layer under a fixed gate voltage, so as to increase a memory window of the semiconductor device. Moreover, the C-shaped channel is capable to reduce a gate voltage decreased under a fixed storage window of the whole semiconductor device, so as to reduce power consumption of the semiconductor device. Hence, a performance of the memory device is improved.