公开(公告)号：US11735642B2

公开(公告)日：2023-08-22

申请号：US17314672

申请日：2021-05-07

申请人： Infineon Technologies AG

发明人： Hans-Joachim Schulze ,  Roland Rupp ,  Francisco Javier Santos Rodriguez

IPC分类号： H01L29/16 ,  H01L29/66 ,  H01L21/02 ,  H01L21/683 ,  H01L21/04 ,  H01L21/78 ,  H01L29/10 ,  H01L29/08 ,  H01L29/78 ,  H01L29/739

CPC分类号： H01L29/66068 ,  H01L21/0262 ,  H01L21/02378 ,  H01L21/02529 ,  H01L21/02634 ,  H01L21/02658 ,  H01L21/048 ,  H01L21/0475 ,  H01L21/6835 ,  H01L21/78 ,  H01L21/7806 ,  H01L21/7813 ,  H01L29/0804 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/66053 ,  H01L29/7395 ,  H01L29/7802

摘要： A method includes providing a layer of porous silicon carbide supported by a silicon carbide substrate, providing a layer of epitaxial silicon carbide on the layer of porous silicon carbide, forming a plurality of semiconductor devices in the layer of epitaxial silicon carbide, and separating the substrate from the layer of epitaxial silicon carbide at the layer of porous silicon carbide. Additional methods are described.

公开(公告)号：US07008886B2

公开(公告)日：2006-03-07

申请号：US10473279

申请日：2002-04-17

申请人： Vincent Derycke ,  Patrick Soukiassan

发明人： Vincent Derycke ,  Patrick Soukiassan

IPC分类号： H01L21/00

CPC分类号： C30B29/06 ,  C30B33/00 ,  H01L21/0445 ,  H01L21/045 ,  H01L21/048 ,  H01L21/28562 ,  H01L29/1608 ,  Y10S438/931 ,  Y10S438/974

摘要： A process treats a surface of a semiconductor material in order to put the surface into a predetermined electrical state. The semiconductor material is preferably monocrystalline. The process includes (a) preparing the surface of the semiconductor material such that the surface has a controlled organization at an atomic scale such that the surface is capable of combining with a chosen material, and (b) combining the surface thus prepared with a material chosen from among hydrogen, molecules containing hydrogen, metals, organic molecules and inorganic molecules, wherein the preparing and the combining the surface with the material cooperate to obtain the predetermined electrical state of the surface.

摘要翻译： 一种工艺处理半导体材料的表面以使表面进入预定的电气状态。 半导体材料优选为单晶。 该方法包括（a）制备半导体材料的表面，使得表面具有原子尺度的受控组织，使得表面能够与所选择的材料组合，和（b）将由此制备的表面与材料组合 选自氢，分子含氢，金属，有机分子和无机分子，其中制备和组合表面与材料协调以获得表面的预定电状态。

公开(公告)号：US20020068488A1

公开(公告)日：2002-06-06

申请号：US09940064

申请日：2001-08-27

申请人： Boston MicroSystems, Inc.

发明人： Harry L. Tuller ,  Marlene A. Spears ,  Richard Mlcak

IPC分类号： H01L029/06 ,  H01R004/28

CPC分类号： H01L29/45 ,  H01L21/048 ,  H01L21/0485 ,  H01L21/0495 ,  H01L29/1608 ,  H01L29/47

摘要： An electrical contact for a silicon carbide component comprises a material that is in thermodynamic equilibrium with silicon carbide. The electrical contact is typically formed of Ti3SiC2 that is deposited on the silicon carbide component.

摘要翻译： 用于碳化硅部件的电接触包括与碳化硅处于热力学平衡的材料。 电接触通常由沉积在碳化硅部件上的Ti 3 SiC 2形成。

公开(公告)号：US11915946B2

公开(公告)日：2024-02-27

申请号：US17804965

申请日：2022-06-01

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jhon Jhy Liaw

IPC分类号： H01L29/786 ,  H01L21/033 ,  H01L21/04 ,  H01L21/67

CPC分类号： H01L21/67075 ,  H01L21/0334 ,  H01L21/048

摘要： Semiconductor devices and their manufacturing methods are disclosed herein, and more particularly to semiconductor devices including a transistor having gate all around (GAA) transistor structures and manufacturing methods thereof. Different thickness in an epi-growth scheme is adopted to create different sheet thicknesses within the same device channel regions for use in manufacturing vertically stacked nano structure (e.g., nanosheet, nanowire, or the like) GAA devices. A GAA device may be formed with a vertical stack of nanostructures in a channel region with a topmost nanostructure of the vertical stack being thicker than the other nanostructures of the vertical stack. Furthermore, an LDD portion of the topmost nano structure may be formed as the thickest of the nanostructures in the vertical stack.

公开(公告)号：US20230361196A1

公开(公告)日：2023-11-09

申请号：US18351600

申请日：2023-07-13

申请人： Infineon Techmologies AG

发明人： Hans-Joachim Schulze ,  Roland Rupp ,  Francisco Javier Santos Rodriguez

IPC分类号： H01L29/66 ,  H01L21/02 ,  H01L29/16 ,  H01L29/739 ,  H01L29/78 ,  H01L21/78 ,  H01L21/04 ,  H01L29/08 ,  H01L21/683 ,  H01L29/10

CPC分类号： H01L29/66068 ,  H01L21/02378 ,  H01L29/1608 ,  H01L21/02634 ,  H01L29/7395 ,  H01L29/7802 ,  H01L21/02658 ,  H01L21/0262 ,  H01L21/7813 ,  H01L21/02529 ,  H01L21/0475 ,  H01L21/78 ,  H01L29/0804 ,  H01L29/66053 ,  H01L21/6835 ,  H01L21/048 ,  H01L29/1095 ,  H01L21/7806 ,  H01L29/0882

摘要： A method includes: providing a layer of porous silicon carbide supported by a silicon carbide substrate; providing a layer of epitaxial silicon carbide on the layer of porous silicon carbide; forming semiconductor devices in the layer of epitaxial silicon carbide; and separating the silicon carbide substrate from the layer of epitaxial silicon carbide at the layer of porous silicon carbide. The layer of porous silicon carbide includes dopants defining a resistivity of the layer of porous silicon carbide. The resistivity of the layer of porous silicon carbide is different from a resistivity of the silicon carbide substrate. Additional methods are described.

公开(公告)号：US20180033688A1

公开(公告)日：2018-02-01

申请号：US15470387

申请日：2017-03-27

申请人： Geun Su LEE ,  SK hynix Inc.

发明人： Ji Won MOON ,  Jin Wook JANG ,  Sang Youl YI ,  Sung Jae LEE ,  Geun Su LEE ,  Young Sun LEE ,  Min Su KIM

IPC分类号： H01L21/768 ,  H01L21/311 ,  C08G77/00 ,  C08G77/18 ,  C08G77/20 ,  H01L21/28 ,  H01L21/04

CPC分类号： H01L21/76861 ,  C08G77/18 ,  C08G77/20 ,  C08G77/80 ,  H01L21/048 ,  H01L21/28 ,  H01L21/311

摘要： A gap-fill polymer for filling fine pattern gaps, which has a low dielectric constant (flow-k) and excellent gap filling properties may consist of a compound formed by condensation polymerization of a first oligomer represented by the formula 1 and a second oligomer represented by the formula 2.

公开(公告)号：US20160071949A1

公开(公告)日：2016-03-10

申请号：US14790780

申请日：2015-07-02

申请人： SUMITOMO ELECTRIC INDUSTRIES, LTD.

发明人： Toru Hiyoshi

IPC分类号： H01L29/66 ,  H01L21/02 ,  H01L29/06 ,  H01L21/265 ,  H01L29/16 ,  H01L21/04

CPC分类号： H01L29/66068 ,  H01L21/02529 ,  H01L21/047 ,  H01L21/048 ,  H01L21/265 ,  H01L29/045 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/66712 ,  H01L29/7802

摘要： A method for manufacturing a silicon carbide semiconductor device includes the following steps. When viewed in a direction perpendicular to a main surface, a silicon carbide substrate has a connection region provided to include an end portion of one side, an apex of a first body region nearest to the end portion, and an apex of a second body region nearest to the end portion, the connection region being electrically connected to both the first body region and the second body region, the connection region having the second conductivity type. When viewed in a direction parallel to the main surface, the first drift region and the second drift region are provided between a gate insulating film and the connection region. The connection region, the first body region, and the second body region are formed by ion implantation.

摘要翻译： 一种制造碳化硅半导体器件的方法包括以下步骤。 当从垂直于主表面的方向观察时，碳化硅衬底具有设置成包括一侧的端部，最靠近端部的第一体区域的顶点和第二体区域的顶点的连接区域 最接近端部的连接区域电连接到第一体区域和第二体区域，连接区域具有第二导电类型。 当从平行于主表面的方向观察时，第一漂移区和第二漂移区设置在栅绝缘膜和连接区之间。 通过离子注入形成连接区域，第一体区域和第二体区域。

公开(公告)号：US20040104406A1

公开(公告)日：2004-06-03

申请号：US10473279

申请日：2003-09-29

发明人： Vincent Derycke ,  Patrick Soukiassan

IPC分类号： H01L031/0336

CPC分类号： C30B29/06 ,  C30B33/00 ,  H01L21/0445 ,  H01L21/045 ,  H01L21/048 ,  H01L21/28562 ,  H01L29/1608 ,  Y10S438/931 ,  Y10S438/974

摘要： Process for treatment of the surface of a semiconducting material, particularly using hydrogen, and surface obtained using this process. According to the invention, hydrogen (for example) is used to prepare the surface (S) so that it has a controlled organization at the atomic scale, and the surface thus prepared is hydrogenated, the preparation and hydrogenation of the surface cooperating to obtain a predefined electrical state of the surface. The invention is applicable to metallisation or passivation of a semiconducting surface, particularly in microelectronics.

摘要翻译： 用于处理半导体材料的表面，特别是使用氢的方法和使用该方法获得的表面的方法。 根据本发明，使用氢（例如）制备表面（S），使得其具有原子尺度的受控组织，并且如此制备的表面被氢化，表面的制备和氢化协作以获得 表面的预定电气状态。 本发明可应用于半导体表面的金属化或钝化，特别是在微电子学中。

公开(公告)号：US06410460B1

公开(公告)日：2002-06-25

申请号：US09570812

申请日：2000-05-15

申请人： Ilan Shalish ,  Yoram Shapira ,  Moshe Eizenberg

发明人： Ilan Shalish ,  Yoram Shapira ,  Moshe Eizenberg

IPC分类号： H01L2131

CPC分类号： H01L29/47 ,  H01L21/048 ,  H01L21/0485 ,  H01L21/0495 ,  H01L21/28575 ,  H01L21/28581 ,  H01L29/1608 ,  H01L29/20 ,  H01L29/45 ,  H01L29/452 ,  H01L29/456 ,  H01L29/475

摘要： A thermodynamically stable metallic contact for binary oxide-, nitride-, carbide or phosphide-semiconductors and a method of its preparation, the contact is formed in a high temperature reaction in vacuum of a metal bi-layer with the binary semiconductor substrate. With a proper choice of the two metallic layers, each metal forms a single phase with only one of binary semiconductor elements. The resulting phases form distinct layers in a thermodynamically stable sequence.

摘要翻译： 用于二元氧化物，氮化物，碳化物或磷化物半导体的热力学稳定的金属接触及其制备方法在与二元半导体衬底的金属双层的真空中的高温反应中形成接触。 通过适当选择两个金属层，每个金属形成仅具有二进制半导体元件中的一个的单相。 所得相在热力学稳定的序列中形成不同的层。

公开(公告)号：US20240162059A1

公开(公告)日：2024-05-16

申请号：US18419696

申请日：2024-01-23

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Jhon Jhy Liaw

IPC分类号： H01L21/67 ,  H01L21/033 ,  H01L21/04

CPC分类号： H01L21/67075 ,  H01L21/0334 ,  H01L21/048

摘要： Semiconductor devices and their manufacturing methods are disclosed herein, and more particularly to semiconductor devices including a transistor having gate all around (GAA) transistor structures and manufacturing methods thereof. Different thickness in an epi-growth scheme is adopted to create different sheet thicknesses within the same device channel regions for use in manufacturing vertically stacked nanostructure (e.g., nanosheet, nanowire, or the like) GAA devices. A GAA device may be formed with a vertical stack of nanostructures in a channel region with a topmost nanostructure of the vertical stack being thicker than the other nanostructures of the vertical stack. Furthermore, an LDD portion of the topmost nanostructure may be formed as the thickest of the nanostructures in the vertical stack.