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公开(公告)号：US20040148766A1
公开(公告)日：2004-08-05
申请号：US10758371
申请日：2004-01-15
发明人： Jinichi Noguchi , Shukichi Takii , Satoshi Ootsuki , Hiroyuki Makino , Susumu Sakuragi , Masaru Tanaka , Toshio Komiyatani , Iji Onozuka
IPC分类号： H05K003/00 , H05K003/36
CPC分类号： H05K3/4655 , H05K3/4652 , H05K2201/0112 , H05K2201/0209 , H05K2203/122 , H05K2203/124 , Y10T29/49124 , Y10T29/49126 , Y10T29/49155
摘要： The present invention provides the miniaturization and weight reduction of the multi-layer circuit board and improvement in the processability thereof. The multi-layer circuit board comprises a substrate 10, on at least one surface of a substrate 10, a first electrical conductive circuit (metal plating film 30) disposed on the substrate 10, an resin layer 20 disposed on the first electrical conductive circuit and a second electrical conductive circuit (metal plating film 30) disposed on the resin layer. The resin layer 20 is composed of a resin compound including benzocyclobutene resin, particulate inorganic filler and ultraviolet absorbent.
摘要翻译： 本发明提供了多层电路板的小型化和重量减轻以及其加工性能的提高。 多层电路板包括基板10，基板10的至少一个表面，设置在基板10上的第一导电电路（金属镀膜30），设置在第一导电电路上的树脂层20和 设置在树脂层上的第二导电电路（金属镀膜30）。 树脂层20由包括苯并环丁烯树脂，颗粒无机填料和紫外线吸收剂的树脂化合物构成。
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公开(公告)号：US20040139599A1
公开(公告)日：2004-07-22
申请号：US10700371
申请日：2003-11-04
发明人： Atsuhiro Sumiya , Eturo Yasuda , Hitoshi Shindo , Akira Fujii , Takashi Yamamoto , Toshiatsu Nagaya , Kumi Sawaguchi , Ryoji Kai
IPC分类号： H01R043/00 , H05K003/36
CPC分类号： H01G4/30 , H01G4/008 , H01L41/083 , H01L41/1876 , H01L41/273 , H01L41/297 , Y10T29/42 , Y10T29/43 , Y10T29/435 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/49147
摘要： A laminated dielectric element of high quality, free of delamination and a method of producing the same. A method of producing a laminated dielectric element 1 by alternately laminating dielectric ceramic layers 12 and base metal electrode layers 13, comprising the steps of printing electrodes by applying a paste material for the base metal electrodes onto the surfaces of at least one side of the ceramic green sheets, laminating and press-adhering the ceramic green sheets to fabricate a laminate thereof, dewaxing the laminate, reducing the electrodes to form base metal electrode layers by heating the laminate while flowing an atmospheric gas and by reducing the paste material for the base metal electrodes, and sintering the laminate. In the step of reducing the electrodes, the paste material for the base metal electrodes is so reduced that the amount of the base metal oxide remaining in the base metal electrode layers is not larger than 20% by weight and that the amount of lead liberated from the ceramic material is not larger than 30 atomic % within 5000 null from the surfaces of the base metal electrode layers.
摘要翻译： 一种高质量的叠层电介质元件，不含分层及其制造方法。 通过交替层叠电介质陶瓷层12和基底金属电极层13来制造叠层电介质元件1的方法，包括以下步骤：通过将贱金属电极的糊料施加到陶瓷的至少一侧的表面上来印刷电极 生片，层压和压制陶瓷生片以制造其层压体，使层压体脱蜡，通过在流过大气气体的同时加热层压体并通过还原贱金属的糊料来减少电极以形成贱金属电极层 电极，并烧结层压板。 在减少电极的步骤中，用于贱金属电极的糊料材料减少，使得残留在贱金属电极层中的贱金属氧化物的量不大于20重量％，并且从 在贱金属电极层的表面内的陶瓷材料不大于30原子％。
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公开(公告)号：US20040117985A1
公开(公告)日：2004-06-24
申请号：US10732984
申请日：2003-12-11
IPC分类号： H05K003/36 , H05K003/34
CPC分类号： G06K19/0775 , G06K19/07749 , H01L24/97 , H01L2224/16 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H05K1/141 , H05K3/222 , H05K3/3442 , H05K2201/049 , H05K2201/10636 , H05K2201/10674 , Y02P70/611 , Y10T29/49124 , Y10T29/49126 , Y10T29/4913 , Y10T29/49144
摘要： An electronic circuit arrangement comprises a substrate having an electrical conductor thereon, wherein the electrical conductor includes two contacts spaced apart substantially a predetermined distance; an electronic jumper having two contacts spaced apart substantially the predetermined distance and respectively connected to the two contacts of the substrate; and an electronic device on the electronic circuit jumper and having two contacts respectively connected to the two contacts of the electronic circuit jumper.
摘要翻译： 电子电路装置包括其上具有电导体的衬底，其中电导体包括基本上预定距离间隔开的两个触点; 电子跳线，其具有两个基本上隔开预定距离的触头，并分别连接到基板的两个触点; 以及电子电路跳线上的电子设备，并且具有分别连接到电子电路跳线的两个触点的两个触点。
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4.发明申请公开(公告)号：US20040117984A1
公开(公告)日：2004-06-24
申请号：US10610820
申请日：2003-07-02
发明人： Young-Woo Kim , Young-Sang Cho , Dek-Gin Yang , Kyn-Hyok Yim
IPC分类号： H05K003/36 , H01L023/495 , H05K003/20
CPC分类号： G02B6/43 , G02B6/3608 , G02B6/4201 , G02B6/4214 , G02B6/428 , H05K1/0274 , H05K3/4611 , H05K2203/063 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49155 , Y10T156/1064
摘要： Disclosed is a method of fabricating a multi-layered PCB, in which the optical waveguide component is inserted into the PCB in such a way that a prepreg adhesive does not block an optical signal entrance of the optical waveguide. The method comprises pre-routing a portion of an adhesive meeting the optical waveguide to remove said portion, processing an adhesive weeping prevention layer so as to prevent the adhesive from blocking the optical signal entrance of the optical waveguide, arranging the optical waveguide, the adhesive, and the adhesive weeping prevention layer on a copper clad laminate, and combining the optical waveguide, a prepreg, and the adhesive weeping prevention layer with each other into a single structure. The adhesive weeping prevention layer is selected from the group consisting of a prepreg, a single-sided copper clad laminate, a thermally curable resin, a heat spreader, and an unclad. Therefore, the method is advantageous in that the prepreg and the adhesive weeping prevention layer are pre-routed to prevent epoxy resin from blocking the optical signal entrance of the optical waveguide, thereby facilitating precise interfacing of optical signals.
摘要翻译： 公开了一种制造多层PCB的方法，其中将光波导部件插入到PCB中，使得预浸胶粘合剂不阻挡光波导的光信号入口。 该方法包括预先路由满足光波导的粘合剂部分以去除所述部分，处理粘合剂防止漏水层，以防止粘合剂阻挡光波导的光信号入口，布置光波导，粘合剂 和覆铜层压板上的粘合剂防止层，并将光波导，预浸料和粘合剂防止层彼此组合成单一结构。 粘合防止层选自预浸料，单面覆铜层压板，热固化树脂，散热器和未包覆层。 因此，该方法的优点在于预浸布和粘合剂防止漏水层被预先布线以防止环氧树脂阻挡光波导的光信号入口，从而有助于光信号的精确接口。
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公开(公告)号：US20040083605A1
公开(公告)日：2004-05-06
申请号：US10697744
申请日：2003-10-30
IPC分类号： H01L023/02 , H05K003/36
CPC分类号： H05K3/4602 , H01L24/90 , H01L2224/16 , H01L2924/01029 , H01L2924/01078 , H01L2924/01082 , H01L2924/12042 , H05K2201/09536 , H05K2201/1059 , H05K2203/061 , H05K2203/1394 , H05K2203/1581 , Y10T29/49126 , Y10T29/4913 , Y10T29/49155 , H01L2924/00
摘要： A press-fit integrated chip package is provided comprising a laminate base structure having plated through holes for introducing press-fit elements, and a laminate cover structure providing very fine conducting paths and having a top mounting plane for mounting chips.
摘要翻译： 提供一种压配合集成芯片封装，其包括具有用于引入压配元件的电镀通孔的层叠基底结构，以及提供非常精细的导电路径并具有用于安装芯片的顶部安装平面的叠层盖结构。
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6.发明申请公开(公告)号：US20040078965A1
公开(公告)日：2004-04-29
申请号：US10685417
申请日：2003-10-16
发明人： Hidenori Miyakawa , Yoshio Maruyama , Hiroshi Yamauchi , Mikiya Nakata , Takashi Akiguchi , Yoshinori Wada , Kazuhiro Mori
IPC分类号： H05K001/16 , H05K003/36
CPC分类号： H05K5/068 , H05K3/284 , Y10T29/49126 , Y10T29/4913 , Y10T29/49131 , Y10T29/49144 , Y10T29/49146
摘要： A package is formed by covering a circuit board with a thermoplastics film. The cylindrical or sheet-like thermoplastic film is decompressed and used to cover the circuit board to protect the board and components mounted on the board.
摘要翻译： 通过用热塑性薄膜覆盖电路板形成封装。 圆柱形或片状热塑性薄膜被减压并用于覆盖电路板以保护安装在板上的板和组件。
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公开(公告)号：US20040060174A1
公开(公告)日：2004-04-01
申请号：US10661530
申请日：2003-09-15
发明人： Kei Imafuji , Tadashi Kodaira , Takeshi Chino , Jyunichi Nakamura , Miwa Abe
IPC分类号： H05K003/36
CPC分类号： H01L21/6835 , H01L21/4857 , H01L23/49816 , H01L2221/68345 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2924/00014 , H01L2924/15311 , H05K3/205 , H05K3/3473 , H05K3/4007 , H05K3/4644 , H05K2201/0367 , H05K2203/0338 , H05K2203/0376 , H05K2203/0384 , H05K2203/0726 , Y10T29/49126 , Y10T29/49128 , Y10T29/49144 , Y10T29/49156 , Y10T29/49165 , H01L2224/05599
摘要： A method for producing a wiring substrate provided with bumps protruding from a surface of the substrate, the method comprising the steps of: covering one side of a metallic base with an electrical insulating film and forming open holes in the insulating film so as to expose at the bottoms thereof the base, etching the base using the insulating film having the open holes formed as a mask to form concavities in the base, electroplating the interior face of each of the concavities using the base as a plating power supply layer to form a barrier metal film on the interior face of each concavities, filling the concavities with a material for the bump by electroplating using the base as a plating power supply layer, forming a barrier layer on the surface of the material for the bump filled in each of the concavities using the base as a plating power supply layer, forming a stack of a predetermined number of wiring patterns on the insulating film, the adjacent wiring patterns in the stack being separated from each other by an intervening insulating layer and being connected to each other through vias formed in the intervening insulating layer, and the wiring patterns being electrically connected to the material for the bump filled in the concavities, removing the base from the stack of wiring patterns having bumps each having the barrier metal film, and removing the barrier metal film from each of the bumps.
摘要翻译： 一种制造布线基板的方法，所述布线基板设置有从所述基板的表面突出的凸起，所述方法包括以下步骤：用电绝缘膜覆盖金属基底的一侧并在所述绝缘膜中形成露出孔，以暴露在 其底部使用具有形成为掩模的开孔的绝缘膜蚀刻基底，以在基底中形成凹部，使用基底电镀每个凹部的内表面作为电镀电源层以形成屏障 在每个凹部的内表面上的金属膜，通过使用基底作为电镀电源层的电镀将用于凸块的材料填充凹部，在填充在每个凹部中的凸块材料的表面上形成阻挡层 使用基底作为电镀电源层，在绝缘膜上形成预定数量的布线图案的叠层，堆叠中的相邻布线图案 通过中间绝缘层彼此分离并且通过形成在中间绝缘层中的通孔彼此连接，并且布线图案电连接到填充在凹部中的用于凸块的材料，从堆叠中去除基底 具有各自具有阻挡金属膜的凸块的布线图案，以及从每个凸块去除阻挡金属膜。
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公开(公告)号：US20040055152A1
公开(公告)日：2004-03-25
申请号：US10670812
申请日：2003-09-25
发明人： James Fraivillig
IPC分类号： H05K003/36 , H05K001/16
CPC分类号： H05K3/0097 , H05K1/0393 , H05K3/0061 , H05K3/06 , H05K3/386 , H05K2201/0355 , H05K2203/1536 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913
摘要： A method for manufacturing a printed circuit bonded to a heat sink includes producing the printed circuit comprising at least one conductive layer circuit pattern laminated to at least one side of a dielectric layer; first adhering a first side of a bond film to the printed circuit, wherein the first adhering conforms the printed circuit to the bond film to substantially remove air entrapment between the printed circuit and the bond film; and second adhering a second side of the bond film to the heat sink, wherein the first adhering and the second adhering bond the heat sink to the printed circuit.
摘要翻译： 制造结合到散热器的印刷电路的方法包括制造印刷电路，该印刷电路包括层叠在电介质层的至少一侧的至少一个导电层电路图案; 首先将接合膜的第一侧粘附到印刷电路，其中第一粘附使印刷电路与接合膜一致，以基本上去除印刷电路和接合膜之间的空气滞留; 并且将所述接合膜的第二侧粘附到所述散热器，其中所述第一粘附和所述第二粘附将所述散热器粘附到所述印刷电路。
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公开(公告)号：US20040025334A1
公开(公告)日：2004-02-12
申请号：US10064673
申请日：2002-08-06
发明人： Ming Wen , Quan-Ding Xu , Su-Tane Yin
IPC分类号： H05K003/36
CPC分类号： H05K9/0028 , Y10T29/49126 , Y10T29/4913
摘要： A method for fixing an electromagnetic interference (EMI) shield onto a circuit board. The circuit board has a plurality of holes, and the EMI shield has a plurality of fasteners that correspond to the plurality of holes. The method includes inserting the plurality of fasteners into the corresponding plurality of holes of the circuit board so as to fix the EMI shield onto the circuit board.
摘要翻译： 一种将电磁干扰（EMI）屏蔽固定在电路板上的方法。 电路板具有多个孔，EMI屏蔽具有与多个孔对应的多个紧固件。 该方法包括将多个紧固件插入电路板的相应多个孔中，以将EMI屏蔽件固定到电路板上。
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公开(公告)号：US20030188426A1
公开(公告)日：2003-10-09
申请号：US10117857
申请日：2002-04-05
IPC分类号： H05K003/36 , H05K003/20 , B23P019/00
CPC分类号： H01L21/67706 , G02F1/133305 , G02F2001/13613 , H01L21/6776 , Y10T29/49126 , Y10T29/49128 , Y10T29/532
摘要： A method and system for fabricating microcircuits occupying large areas on substrates capable of withstanding high semiconductor processing temperatures and then transferring the circuits onto large substrates incapable of withstanding the high processing temperatures. The method and system is particularly suitable for fabricating large area displays.
摘要翻译： 一种用于制造在能够承受高半导体处理温度的基板上占据大面积的微电路的方法和系统，然后将电路转移到不能承受高处理温度的大基板上。 该方法和系统特别适用于制造大面积显示器。
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