MANUFACTURING METHOD OF INTERPOSED SUBSTRATE
    4.
    发明申请
    MANUFACTURING METHOD OF INTERPOSED SUBSTRATE 审中-公开
    嵌入式基板的制造方法

    公开(公告)号:US20150097318A1

    公开(公告)日:2015-04-09

    申请号:US14568084

    申请日:2014-12-11

    IPC分类号: H01L21/48

    摘要: A manufacturing method of an interposed substrate is provided. A photoresist layer is formed on a metal carrier. The photoresist layer has plural of openings exposing a portion of the metal carrier. Plural of metal passivation pads and plural of conductive pillars are formed in the openings. The metal passivation pads cover a portion of the metal carrier exposed by openings. The conductive pillars are respectively stacked on the metal passivation pads. The photoresist layer is removed to expose another portion of the metal carrier. An insulating material layer is formed on the metal cattier. The insulating material layer covers the another portion of the metal carrier and encapsulates the conductive pillars and the metal passivation pads.An upper surface of the insulating material layer and a top surface of each conductive pillar are coplanar. The metal carrier is removed to expose a lower surface of the insulating material layer.

    摘要翻译: 提供了一种插入式基板的制造方法。 在金属载体上形成光致抗蚀剂层。 光致抗蚀剂层具有暴露金属载体的一部分的多个开口。 多个金属钝化垫和多个导电柱形成在开口中。 金属钝化垫覆盖由开口暴露的金属载体的一部分。 导电柱分别堆叠在金属钝化垫上。 去除光致抗蚀剂层以暴露金属载体的另一部分。 在金属罐上形成绝缘材料层。 绝缘材料层覆盖金属载体的另一部分并封装导电柱和金属钝化垫。 绝缘材料层的上表面和每个导电柱的顶表面是共面的。 去除金属载体以暴露绝缘材料层的下表面。

    COPPER FOIL STRUCTURE HAVING BLACKENED ULTRA-THIN FOIL AND MANUFACTURING METHOD THEREOF
    5.
    发明申请
    COPPER FOIL STRUCTURE HAVING BLACKENED ULTRA-THIN FOIL AND MANUFACTURING METHOD THEREOF 有权
    具有黑色超薄膜的铜箔结构及其制造方法

    公开(公告)号:US20140141274A1

    公开(公告)日:2014-05-22

    申请号:US14028682

    申请日:2013-09-17

    IPC分类号: H05K1/09

    摘要: A copper foil structure having blackened ultra-thin copper foil of the instant disclosure includes a carrier foil, a blackened layer, a release layer, and an ultra-thin copper foil. The carrier foil includes a matte surface and a shiny surface wherein the blackened layer is disposed thereon. The release layer is disposed on the blackened layer formed with one selected from the group: copper, cobalt, nickel, and manganese while the release layer is formed with one selected from the group: molybdenum, nickel, chromium, and potassium. Successively, the ultra-thin copper foil is disposed on the release layer. Laser drilling can apply to the blackened ultra-thin copper foil on the inner layers of a high density multi-layer printed wiring board, thus eliminating the traditional blackening or browning chemical process. The blackened ultra-thin copper foil in combination with a polyimide thin (PI) or other substrate materials displays desirable appearance.

    摘要翻译: 具有本发明的黑色超薄铜箔的铜箔结构体包括载体箔,黑化层,剥离层和超薄铜箔。 载体箔包括无光泽表面和光泽表面,其中黑化层设置在其上。 剥离层设置在由选自铜,钴,镍和锰中的一种形成的黑色层上,而剥离层由选自钼,镍,铬和钾的一种形成。 接着,将超薄铜箔设置在剥离层上。 激光钻孔可应用于高密度多层印刷线路板内层的黑色超薄铜箔,从而消除了传统的黑化或褐变化学过程。 黑色超薄铜箔与聚酰亚胺薄(PI)或其他基材的组合显示出理想的外观。

    Method For Fabricating Carrier Board Having No Conduction Line
    6.
    发明申请
    Method For Fabricating Carrier Board Having No Conduction Line 审中-公开
    制造无导通线的载板的方法

    公开(公告)号:US20110061234A1

    公开(公告)日:2011-03-17

    申请号:US12548418

    申请日:2009-09-15

    IPC分类号: H05K3/10

    摘要: A method for fabricating a carrier board having no conduction line is provided. The fabricating method includes: providing a support plate having a detachable metal layer; providing a plating current via the support plate and the detachable metal layer to plate on the detachable metal layer to in sequence configure an etching resist layer and a plating metal layer; and then gradually completing other circuit layers by a compression laminating process with the support plate providing the plating current. After the entire plating process has been completed, the support plate and the detachable metal layer are removed.

    摘要翻译: 提供了一种制造不具有导线的载板的方法。 制造方法包括:提供具有可拆卸金属层的支撑板; 通过所述支撑板和所述可拆卸金属层在可拆卸金属层上提供电镀电流,以依次配置抗蚀剂层和电镀金属层; 然后通过压缩层压工艺逐渐完成其它电路层,其中支撑板提供电镀电流。 在整个电镀工艺完成之后,移除支撑板和可拆卸的金属层。

    Electroplating pcb components
    7.
    发明申请
    Electroplating pcb components 审中-公开
    电镀pcb组件

    公开(公告)号:US20060175203A1

    公开(公告)日:2006-08-10

    申请号:US10548277

    申请日:2004-03-08

    IPC分类号: H01R13/02 C25D5/10

    摘要: Curved out of plane metal components are formed on PCB substrates (11) by electroplating two layers (13, 14) of the same metal such that each layer has a different internal stress. This produces as curvature of the layer (13, 14) which enables coils, curved cantilever beams and springs to be fabricated. The amplitude and direction of curvature can be controlled by controlling the stress and thickness of each layer. The stress is controlled by controlling the composition of the electroplating bath.

    摘要翻译: 通过对相同金属的两层(13,14)进行电镀,使得每个层具有不同的内部应力,在PCB基板(11)上形成平面金属部件的弯曲。 这产生了能够制造线圈,弯曲悬臂梁和弹簧的层(13,14)的曲率。 可以通过控制各层的应力和厚度来控制曲率的振幅和方向。 通过控制电镀浴的组成来控制应力。

    Method for forming conductive traces and printed circuits made thereby
    9.
    发明授权
    Method for forming conductive traces and printed circuits made thereby 失效
    用于形成由此制成的导电迹线和印刷电路的方法

    公开(公告)号:US6117300A

    公开(公告)日:2000-09-12

    申请号:US113043

    申请日:1998-07-09

    摘要: A method of forming circuit lines on a substrate by applying a roughened conductive metal layer using a copper foil carrier. The copper foil is etched away, leaving the roughened conductive metal embedded in the surface of the substrate. The conductive metal may be treated to remove an oxide layer. A photoresist may also be applied over the treated conductive metal layer to define a fine line circuit pattern. The photoresist defining the fine line circuit pattern is then removed to expose trenches in accordance with the desired circuit pattern. Copper is applied into the trenches over the exposed conductive metal, and the remaining photoresist, and conductive metal underlying the remaining photoresist, is removed to finish the fine line circuit pattern.

    摘要翻译: 通过使用铜箔载体涂布粗糙化的导电金属层,在基板上形成电路线的方法。 蚀刻掉铜箔,留下粗糙的导电金属嵌入衬底的表面。 可以处理导电金属以除去氧化物层。 还可以在经处理的导电金属层上施加光致抗蚀剂以限定细线电路图案。 然后去除限定细线电路图案的光致抗蚀剂,以根据期望的电路图案露出沟槽。 将铜施加到暴露的导电金属上的沟槽中,并且剩余的光致抗蚀剂和剩余光致抗蚀剂下面的导电金属被去除以完成细线电路图案。