公开(公告)号：US20040262736A1

公开(公告)日：2004-12-30

申请号：US10831340

申请日：2004-04-26

发明人： Sin-Gu Kang

IPC分类号： H01L023/495 ,  H01L023/48 ,  H01L023/053

CPC分类号： H05K1/028 ,  H01L23/4985 ,  H01L2924/0002 ,  H05K3/28 ,  H05K3/361 ,  H05K2201/09063 ,  H05K2201/0989 ,  H05K2201/10681 ,  H01L2924/00

摘要： Disclosed is a tape carrier package for electrically connecting LCD panel with source and gate driver PCBs and an LCD module to which the tape carrier package is applied. The tape carrier package includes: a first flexible film made of insulator; a conductive pattern formed on the first flexible film and having a plurality of input/output leads each having an input terminal and an output terminal; a semiconductor chip having a plurality of input/output terminals electrically connected with the input/output leads of the conductive pattern; and a second film made of insulator, the second film coating the conductive input/output leads such that the input/output leads are exposed by a selected length from respective ends thereof, wherein at least one selected lead of the input/output leads disposed at at least one sided end of the tape carrier package comprises a first portion and a second portion which is wider than the first portion, the second portion extending from a first selected position of the exposed leads to a second selected position of the second film passing over a boundary between the second film and the exposed leads.

摘要翻译： 公开了用于将LCD面板与源极和栅极驱动器PCB电连接的带载体封装以及应用带载体封装的LCD模块。 带状载体包括：由绝缘体制成的第一柔性膜; 形成在所述第一柔性膜上并具有多个具有输入端子和输出端子的输入/输出引线的导电图案; 具有与导电图案的输入/输出引线电连接的多个输入/输出端子的半导体芯片; 以及由绝缘体制成的第二膜，所述第二膜涂覆所述导电输入/输出引线，使得所述输入/输出引线从其相应端部暴露出选定长度，其中所述输入/输出引线中的至少一个选定引线设置在 所述带状载体封装的至少一侧端部包括第一部分和比所述第一部分宽的第二部分，所述第二部分从所述暴露引线的第一选定位置延伸到所述第二膜的第二选定位置， 第二膜和暴露引线之间的边界。

公开(公告)号：US20040262718A1

公开(公告)日：2004-12-30

申请号：US10606429

申请日：2003-06-25

申请人： ST ASSEMBLY TEST SERVICES LTD.

发明人： Kambhampati Ramakrishna

IPC分类号： H01L023/495

CPC分类号： H01L24/83 ,  H01L23/16 ,  H01L23/3107 ,  H01L23/4334 ,  H01L23/492 ,  H01L23/49548 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2224/29007 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/45099 ,  H01L2224/4809 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/48471 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/8385 ,  H01L2224/85439 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/48227 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package and a method of assembly therefor are provided. A semiconductor package has a die pad and a plurality of bonding fingers. A spacer is attached to the die pad, and a large die is attached to the spacer. The large die is wire bonded to the plurality of bonding fingers using a plurality of bonding wires. The die pad, plurality of bonding fingers, spacer, large die, and bonding wires are encapsulated to form the semiconductor package. The semiconductor package can be either a single or dual row package, such as a QFN or BGA package.

摘要翻译： 提供半导体封装及其组装方法。 半导体封装具有管芯焊盘和多个接合指状物。 间隔件附接到管芯焊盘，并且大的管芯附接到间隔件。 使用多根接合线将大型模具与多根接合爪引线接合。 芯片焊盘，多个接合指状物，间隔物，大芯片和接合线被封装以形成半导体封装。 半导体封装可以是单行或双列封装，例如QFN或BGA封装。

公开(公告)号：US20040256741A1

公开(公告)日：2004-12-23

申请号：US10823858

申请日：2004-04-14

申请人： Samsung Electronics Co., Ltd.

发明人： Chang-Ho Lee ,  Jong-Hyun Choi

IPC分类号： H01L023/495

CPC分类号： H01L23/5286 ,  H01L24/06 ,  H01L2224/02166 ,  H01L2224/05554 ,  H01L2924/01024 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/14

摘要： A device and method for layout and fabrication of power supply bus lines in an integrated circuit such as a memory circuit are described. In accordance with the present invention, power bus lines and bonding pads of the circuit are not necessarily formed in both edge regions and center regions of the device. The bonding pads are formed in the region according to the package being used, and the power bus lines are formed in the other region. This is accomplished by forming the bonding pads over landing pads. Landing pads are formed in both the center region and the edge region under the top surface of the device. If the device is to be packaged in an edge pad configuration, the bonding pads are formed over the landing pads in the edge region, and power supply bus lines can be formed over the landing pads in the center region. Similarly, if the device is to be packaged in a center pad configuration, the bonding pads are formed over the landing pads in the center region, and the power supply bus lines can be formed over the landing pads in the edge region. The bonding pads are connected to the landing pads by conductive vias. Because the power bus lines are not formed in the same region as bonding pads, they can occupy a relatively large portion of the region in which they are formed. That is, they can be made much larger than they would be using the conventional approach in which both bonding pads and power bus lines are formed in the same region. As a result, the power noise drawbacks of the conventional approach are eliminated.

摘要翻译： 描述了诸如存储器电路的集成电路中的电源总线布线和制造的装置和方法。 根据本发明，电路的电源总线线路和接合焊盘不一定形成在器件的两个边缘区域和中心区域中。 接合焊盘形成在根据使用的封装的区域中，并且电力总线线路形成在另一区域中。 这通过在着陆垫上形成接合垫来实现。 着陆垫形成在装置的上表面下方的中心区域和边缘区域中。 如果将该器件封装在边缘焊盘配置中，则焊接区形成在边缘区域的着陆焊盘之上，并且电源总线可以形成在中心区域的着陆焊盘上。 类似地，如果要将器件封装在中心焊盘结构中，则接合焊盘形成在中心区域的着陆焊盘之上，并且电源总线可以形成在边缘区域的着陆焊盘上。 接合焊盘通过导电通孔连接到着陆焊盘。 由于电力总线线路不形成在与接合焊盘相同的区域中，所以它们可以占据其形成区域的较大部分。 也就是说，它们可以比使用在相同区域中形成接合焊盘和电力总线线路的常规方法大得多。 结果，消除了常规方法的功率噪声缺点。

公开(公告)号：US20040256740A1

公开(公告)日：2004-12-23

申请号：US10889732

申请日：2004-07-13

发明人： Salman Akram

IPC分类号： H01L023/495

CPC分类号： H01L24/10 ,  B33Y10/00 ,  B33Y80/00 ,  H01L21/56 ,  H01L23/3114 ,  H01L23/4951 ,  H01L24/13 ,  H01L24/48 ,  H01L2224/03334 ,  H01L2224/0519 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method for forming semiconductor device packages that include one or more semiconductor dice, leads in communication with bond pads of each die, and a protective layer, or package, over at least portions of the active surface of each die, and includes electrically exposing the leads through the protective layer so as to facilitate connection thereof to external circuitry. For example, external conductive structures may be secured to the leads through openings in the package. The package may also include protective layers over the back sides or the edges of each semiconductor die. The completed CSP device is precisely encapsulated with minimal lateral dimensions, and has an array of precisely positioned external connectors. A stereolithographic process is used for precisely forming the protective layers of the package. A machine vision system may be used in connection with stereolithographic equipment to locate individual dice, features thereof, or leads.

摘要翻译： 一种用于形成半导体器件封装的方法，所述半导体器件封装包括一个或多个半导体管芯，引导与每个管芯的焊盘连接，以及在每个管芯的至少部分有源表面上的保护层或封装，并且包括将 引导通过保护层，以便于将其连接到外部电路。 例如，外部导电结构可以通过封装中的开口固定到引线上。 封装还可以包括在每个半导体管芯的背面或边缘上的保护层。 完整的CSP设备精确封装具有最小的横向尺寸，并具有精确定位的外部连接器阵列。 使用立体光刻工艺精确地形成封装的保护层。 机器视觉系统可以与立体光刻设备结合使用以定位个体骰子，其特征或引线。

公开(公告)号：US20040256706A1

公开(公告)日：2004-12-23

申请号：US10870912

申请日：2004-06-21

发明人： Shintaro Nakashima

IPC分类号： H01L023/495

CPC分类号： H01L33/62 ,  H01L23/49562 ,  H01L23/49861 ,  H01L24/48 ,  H01L24/49 ,  H01L25/167 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45169 ,  H01L2224/48091 ,  H01L2224/48097 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01021 ,  H01L2924/01057 ,  H01L2924/01063 ,  H01L2924/01066 ,  H01L2924/01067 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/07802 ,  H01L2924/12035 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2224/45099 ,  H01L2924/207 ,  H01L2224/48095

摘要： A molded package comprises at least a first metal member, a second metal member, and a third metal member. Each member includes an end portion inserted into a mold member where a recess is formed and another end portion protruding from an outer wall of the mold member. A portion of each main surface of the metal members is exposed from the mold member in the bottom of the recess. A portion of each main surface can be also divided into at least two bonding regions by a wall portion comprising part of the mold member. A semiconductor device of the present invention comprises the molded package, a semiconductor component, and an encapsulating member covering the semiconductor component, and has a high reliability.

摘要翻译： 模制包装包括至少第一金属构件，第二金属构件和第三金属构件。 每个构件包括插入到其中形成有凹部的模具构件中的端部和从模具构件的外壁突出的另一端部。 金属构件的每个主表面的一部分从凹部的底部中的模具构件露出。 每个主表面的一部分也可以通过包括模具部件的一部分的壁部分分成至少两个结合区域。 本发明的半导体器件包括模制封装，半导体元件和覆盖半导体元件的封装元件，并且具有高可靠性。

公开(公告)号：US20040255454A1

公开(公告)日：2004-12-23

申请号：US10895530

申请日：2004-07-21

发明人： Ronnie M. Harrison ,  David J. Corisis

IPC分类号： H05K003/20 ,  H01L023/495

CPC分类号： H01L23/4951 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/4826 ,  H01L2224/49171 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/30107 ,  Y10T29/49117 ,  Y10T29/49121 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49142 ,  Y10T29/49144 ,  Y10T29/49146 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00

摘要： A method of forming a semiconductor package is provided. The method includes forming a leadframe wherein the conductors or leads of the leadframe extend from a first end to a second end such that a portion of each lead exhibits a generally arcuate shape. The first end may be coupled with a printed circuit board and the second end may be coupled with a semiconductor die. The generally arcuately shaped portion of the leads may include a portion which exhibits a constant radius. The generally arcuately shaped portion may also be formed from a plurality of conductor segments including, for example, at least one generally arcuately shaped segment. The semiconductor die and at least a portion of the leads may be encapsulated with an insulating material.

摘要翻译： 提供一种形成半导体封装的方法。 该方法包括形成引线框架，其中引线框架的导体或引线从第一端延伸到第二端，使得每个引线的一部分呈现大致弓形的形状。 第一端可以与印刷电路板耦合，并且第二端可以与半导体管芯耦合。 引线的大致弓形部分可以包括呈现恒定半径的部分。 通常弧形部分也可以由多个导体段形成，例如包括至少一个大致弧形的段。 半导体管芯和引线的至少一部分可以用绝缘材料封装。

公开(公告)号：US20040238922A1

公开(公告)日：2004-12-02

申请号：US10872105

申请日：2004-06-18

申请人： Tessera, Inc.

发明人： Thomas H. DiStefano ,  Gary W. Grube ,  Igor Y. Khandros ,  Gaetan Mathieu ,  Jason Sweis ,  Laurie Union ,  David Gibson

IPC分类号： H01L023/495

CPC分类号： H01L24/86 ,  H01L23/3107 ,  H01L23/49572 ,  H01L23/49838 ,  H01L23/4985 ,  H01L23/49861 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H05K3/361 ,  H05K3/4084 ,  H01L2924/00

摘要： A semiconductor chip mounting component includes a support structure adapted to engage a semiconductor chip. The support structure has a top surface, a bottom surface, and a gap extending through the support structure for defining first and second portions of the support structure on opposite sides of the gap. The support structure includes at least one elongated bus disposed alongside the gap, on the second portion of the support structure. The support structure includes a plurality of electrically conductive leads, each lead having a connection section extending across the gap, the connection section having a first end disposed on the first portion of the support structure, and a second end secured to the bus. Each lead includes a frangible section disposed between the first and second ends of the connection section, the frangible section having a cross-sectional area that is smaller than a cross-sectional area of the connection section. The gap is open at the bottom surface of the support structure. A semiconductor chip is disposed beneath the bottom surface of the support structure. The leads are adapted to be bonded to contacts on the semiconductor chip by breaking the frangible sections of the leads so as to disconnect the second ends of the leads from the bus and engage the leads with the contacts of the semiconductor chip.

摘要翻译： 半导体芯片安装部件包括适于接合半导体芯片的支撑结构。 支撑结构具有顶表面，底表面和延伸穿过支撑结构的间隙，用于限定支撑结构在间隙的相对侧上的第一和第二部分。 支撑结构包括在支撑结构的第二部分上沿着间隙布置的至少一个细长总线。 支撑结构包括多个导电引线，每个引线具有跨越间隙延伸的连接部分，连接部分具有设置在支撑结构的第一部分上的第一端和固定到总线的第二端。 每个引线包括设置在连接部分的第一和第二端之间的易碎部分，该易碎部分的横截面积小于连接部分的横截面面积。 间隙在支撑结构的底部表面开口。 半导体芯片设置在支撑结构的底表面下方。 引线适于通过断开引线的易碎部分而与半导体芯片上的触点接合，从而将引线的第二端与母线断开，并与半导体芯片的触点接合引线。

公开(公告)号：US20040232528A1

公开(公告)日：2004-11-25

申请号：US10878269

申请日：2004-06-29

发明人： Fujio Ito ,  Hiromicti Suzuki

IPC分类号： H01L023/495

CPC分类号： H01L24/85 ,  H01L21/4821 ,  H01L21/561 ,  H01L21/565 ,  H01L23/49503 ,  H01L23/49506 ,  H01L23/49517 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49551 ,  H01L23/49555 ,  H01L23/49558 ,  H01L23/49568 ,  H01L23/49582 ,  H01L24/05 ,  H01L24/06 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L24/97 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/32014 ,  H01L2224/32055 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48639 ,  H01L2224/48664 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49431 ,  H01L2224/49433 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/82181 ,  H01L2224/85001 ,  H01L2224/85181 ,  H01L2224/85399 ,  H01L2224/85439 ,  H01L2224/85464 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/20647 ,  H01L2924/00 ,  H01L2924/01026 ,  H01L2924/00012

摘要： As a means for promoting the increase of the number of pins in a QFN (Quad Non-leaded package), a semiconductor die mounted on a die pad is arranged at the center of a plastic package, and a plurality of leads made of the same metal as the die pad and die pad supports are arranged around the die pad so as to surround the die pad. Lead tips on one side near the semiconductor die are electrically connected to bonding pads on a main surface of the semiconductor die via gold wires, and lead tips on the other side are ended at a side surface of the plastic package. In order to reduce the length between the semiconductor die and the leads, the lead tips on the one side are extended to positions close to the die pad, and the intervals between adjoining leads on the one side are smaller than those on the other side.

公开(公告)号：US20040222523A1

公开(公告)日：2004-11-11

申请号：US10841861

申请日：2004-05-06

申请人： Hanwha Chemical Corporation

发明人： Joo-Seok Oh ,  Sang-Hun Lee ,  Jeong-Deok Seo ,  Kee-Ho Chang ,  Jeong-Teck Rim

IPC分类号： H01L023/495

CPC分类号： H05K3/323 ,  H01L23/49883 ,  H01L2224/29399 ,  H01L2924/01019 ,  H01L2924/01067 ,  H01L2924/01079 ,  H05K2201/0224 ,  H05K2203/0786 ,  Y10T428/2991

摘要： Disclosed is an insulated conductive ball for anisotropic conductive connection, a method of preparing the same and a product using the same. The insulated conductive ball includes a conductive ball, and an insulating resin layer coated on a surface of the conductive ball, in which the insulating resin layer is formed of water-soluble resin beads of core/shell structure. Therefore, the conductive ball of the current invention can exhibit superior current feed and insulation characteristics, compared to those of conventional insulated conductive balls for anisotropic conductive connection coated with thermoplastic resin or thermosetting resin.

摘要翻译： 公开了用于各向异性导电连接的绝缘导电球，其制备方法和使用其的产品。 绝缘导电球包括导电球和涂覆在导电球表面上的绝缘树脂层，其中绝缘树脂层由芯/壳结构的水溶性树脂珠形成。 因此，与用热塑性树脂或热固性树脂涂覆的各向异性导电连接的传统绝缘导电球相比，本发明的导电球可以表现出优异的电流馈送和绝缘特性。

公开(公告)号：US20040212051A1

公开(公告)日：2004-10-28

申请号：US10284340

申请日：2002-10-31

申请人： Broadcom Corporation

发明人： Sam Ziqun Zhao ,  Reza-ur Rahman Khan

IPC分类号： H01L023/495

CPC分类号： H01L23/36 ,  H01L23/13 ,  H01L23/24 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/3735 ,  H01L23/4334 ,  H01L23/492 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/32188 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48237 ,  H01L2224/48465 ,  H01L2224/48611 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/49109 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： Electrically, mechanically, and thermally enhanced ball grid array (BGA) packages are described. An IC die is mounted in a centrally located cavity of a substantially planar first surface of a stiffener. The first surface of a substrate is attached to a substantially planar second surface of the stiffener. The second surface of the stiffener is opposed to the first surface of the stiffener. A centrally located protruding portion on the second surface of the stiffener is opposed to the centrally located cavity. The protruding portion extends through an opening in the substrate. A wire bond is coupled from a bond pad of the IC die to a contact pad on the first surface of the substrate through a through-pattern in the stiffener. The through-pattern in the stiffener is one of an opening through the stiffener, a recessed portion in an edge of the stiffener, a notch in an edge of the recessed portion, and a notch in an edge of the opening.

摘要翻译： 描述了电，机械和热增强球栅阵列（BGA）封装。 IC模具安装在加强件的基本平坦的第一表面的中心定位的空腔中。 衬底的第一表面附接到加强件的基本平坦的第二表面。 加强件的第二表面与加强件的第一表面相对。 在加强件的第二表面上的位于中心的突出部分与位于中心的腔体相对。 突出部分延伸穿过衬底中的开口。 引线键从IC芯片的接合焊盘通过加强件中的贯穿图案耦合到基板的第一表面上的接触焊盘。 加强件中的贯穿图案是通过加强件的开口之一，加强件的边缘中的凹部，凹部的边缘中的凹口和开口的边缘中的凹口。