公开(公告)号：WO2019066998A1

公开(公告)日：2019-04-04

申请号：PCT/US2017/054682

申请日：2017-09-30

Applicant: INTEL CORPORATION ,  EID, Feras ,  SWAN, Johanna M. ,  LIFF, Shawna M.

Inventor： EID, Feras ,  SWAN, Johanna M. ,  LIFF, Shawna M.

IPC: H01L23/367 ,  H01L23/04 ,  H01L23/00 ,  H01L23/42 ,  H01L23/40

Abstract: A device package and a method of forming the device package are described. The device package includes one or more dies disposed on a first substrate. The device packages further includes one or more interconnects vertically disposed on the first substrate, and a mold layer disposed over and around the first die, the one or more interconnects, and the first substrate. The device package has a second die disposed on a second substrate, wherein the first substrate is electrically coupled to the second substrate with the one or more interconnects, and wherein the one or more interconnects are directly disposed on at least one of a top surface of the first substrate and a bottom surface of the second substrate without an adhesive layer. The device package may include one or more interconnects having one or more different thicknesses or heights at different locations on the first substrate.

公开(公告)号：WO2018009164A1

公开(公告)日：2018-01-11

申请号：PCT/US2016/040902

申请日：2016-07-02

Applicant: INTEL CORPORATION ,  ALEKSOV, Aleksandar ,  OSTER, Sasha N. ,  EID, Feras ,  LIFF, Shawna M. ,  SOUNART, Thomas L. ,  SWAN, Johanna M. ,  BICEN, Baris ,  RAO, Valluri R.

Inventor： ALEKSOV, Aleksandar ,  OSTER, Sasha N. ,  EID, Feras ,  LIFF, Shawna M. ,  SOUNART, Thomas L. ,  SWAN, Johanna M. ,  BICEN, Baris ,  RAO, Valluri R.

IPC: A41D13/002 ,  A41D1/00 ,  A41D27/24

Abstract: Embodiments of the invention include an active venting system. According to an embodiment of the invention, the active venting system may include a substrate having one or more seams formed through the substrate. In order to open the vents defined by the seams through the substrate, a piezoelectric layer may be formed proximate to one or more of the seams. Additional embodiments may include a first electrode and a second electrode that contact the piezoelectric layer in order to provide a voltage differential across the piezoelectric layer. In an embodiment the active venting system may be integrated into a garment. In such an embodiment, the garment may also include an electronics module for controlling the actuators. Additionally, conductive traces may be printed on the garment or sewn into the garment to provide electrical connections from the electronics module to each of the piezoelectric actuators.

Abstract translation: 本发明的实施例包括主动通气系统。 根据本发明的实施例，主动通气系统可以包括具有穿过基板形成的一个或多个接缝的基板。 为了打开由接缝限定的通过基板的通风口，可以在接近一个或多个接缝处形成压电层。 另外的实施例可以包括接触压电层的第一电极和第二电极，以便在压电层两端提供电压差。 在一个实施例中，主动通气系统可以被集成到服装中。 在这样的实施例中，服装还可以包括用于控制致动器的电子模块。 另外，导电迹线可以被印刷在衣服上或缝合到衣服中以提供从电子模块到每个压电致动器的电连接。

公开(公告)号：WO2013074122A1

公开(公告)日：2013-05-23

申请号：PCT/US2011/061423

申请日：2011-11-18

Applicant: INTEL CORPORATION ,  EID, Feras ,  LIFF, Shawna M. ,  BRAUNISCH, Henning

Inventor： EID, Feras ,  LIFF, Shawna M. ,  BRAUNISCH, Henning

IPC: H01S5/024 ,  H01S3/04 ,  H01S5/183

CPC classification number: H01S5/02476 ,  H01S5/02236 ,  H01S5/183 ,  H01S5/423

Abstract: Heat management systems for vertical cavity surface emitting laser (VCSEL) chips are provided. Embodiments of the invention provide substrates having a vertical cavity surface emitting laser chip disposed on the substrate surface and electrically interconnected with the substrate, a thermal frame disposed on the substrate surface and proximate to at least three sides of the vertical cavity surface emitting laser chip, and a thermal interface material disposed between the at least three sides of the vertical cavity surface emitting laser chip and the thermal frame. The substrate can also include a transceiver chip that is operably coupled to a further integrated circuit chip and that is capable of driving the VCSEL chip.

Abstract translation: 提供了垂直腔表面发射激光（VCSEL）芯片的热管理系统。 本发明的实施例提供了具有设置在衬底表面上并与衬底电互连的垂直腔表面发射激光器芯片的衬底，设置在衬底表面上并且靠近垂直腔表面发射激光器芯片的至少三个侧面的热框架， 以及设置在垂直腔表面发射激光芯片和热框架的至少三个侧面之间的热界面材料。 衬底还可以包括可操作地耦合到另一集成电路芯片并且能够驱动VCSEL芯片的收发器芯片。

公开(公告)号：WO2018125209A1

公开(公告)日：2018-07-05

申请号：PCT/US2016/069497

申请日：2016-12-30

Applicant: INTEL CORPORATION ,  STRONG, Veronica A ,  OSTER, Sasha N. ,  LIFF, Shawna M.

Inventor： STRONG, Veronica A ,  OSTER, Sasha N. ,  LIFF, Shawna M.

IPC: H01L23/482 ,  H01L23/488 ,  H01L23/00

Abstract: A system for packaging integrated circuits includes an integrated circuit having one or more integrated circuit terminals. The system for packaging integrated circuits also includes a substrate having one or more substrate terminals. The system for packaging integrated circuits further includes an electrically conductive adhesive in communication with the integrated circuit terminals and the substrate terminals. The electrically conductive adhesive establishes an electrical connection between each of the one or more integrated circuit terminals and the one or more substrate terminals. The electrical connection between each of the one or more integrated circuit terminals and the one or more substrate terminals are enclosed in a dielectric. The system for packaging integrated circuits includes a second adhesive in communication with the integrated circuit and the substrate, wherein the second adhesive couples the integrated circuit and substrate together.

公开(公告)号：WO2018063238A1

公开(公告)日：2018-04-05

申请号：PCT/US2016/054417

申请日：2016-09-29

Applicant: INTEL CORPORATION ,  OSTER, Sasha ,  DOGIAMIS, Georgios ,  KAMGAING, Telesphor ,  ELSHERBINI, Adel ,  LIFF, Shawna ,  ALEKSOV, Aleksandar ,  SWAN, Johanna

Inventor： OSTER, Sasha ,  DOGIAMIS, Georgios ,  KAMGAING, Telesphor ,  ELSHERBINI, Adel ,  LIFF, Shawna ,  ALEKSOV, Aleksandar ,  SWAN, Johanna

IPC: H01L25/16 ,  H01L25/065 ,  H01L25/10 ,  H01L23/66 ,  H01L23/00

CPC classification number: H05K1/0243 ,  H01L23/66 ,  H01L25/0655 ,  H01L25/117 ,  H01L25/16 ,  H01L25/165 ,  H05K1/141 ,  H05K3/366 ,  H05K2201/10545

Abstract: A millimeter wave (mm-wave) communication interface includes a first semiconductor package coupled to a first substrate and a second semiconductor package coupled to a second substrate. The second substrate may be coupled at approximately a 90° angle to the first substrate. The second semiconductor package may include a mm-wave die that modulates digital data on a high frequency microwave signal and a mm-wave launcher that launches the modulated high-frequency microwave signal into a waveguide member operably coupled to the second substrate. In such an implementation, the waveguide member may beneficially exit the second substrate along a longitudinal axis parallel to the principal plane of the first substrate. Advantageously, all high-frequency components are close coupled to the second substrate without the use of an intervening interface.

Abstract translation: 毫米波（毫米波）通信接口包括耦合到第一衬底的第一半导体封装和耦合到第二衬底的第二半导体封装。 第二衬底可以以大约90°的角度耦合。 与第一衬底成角度。 第二半导体封装可以包括在高频微波信号上调制数字数据的毫米波管芯和将调制的高频微波信号发射到可操作地耦合到第二基板的波导部件中的毫米波发射器。 在这样的实施方式中，波导构件可以沿着平行于第一基板的主平面的纵向轴线有利地离开第二基板。 有利的是，所有的高频部件都紧密耦合到第二衬底而不使用介入界面。

公开(公告)号：WO2012129153A2

公开(公告)日：2012-09-27

申请号：PCT/US2012/029617

申请日：2012-03-19

Applicant: INTEL CORPORATION ,  HU, Chuan ,  LIFF, Shawna M. ,  CLEMONS, Gregory S.

Inventor： HU, Chuan ,  LIFF, Shawna M. ,  CLEMONS, Gregory S.

IPC: H01L23/488 ,  H01L21/60

CPC classification number: H01L24/17 ,  H01L21/563 ,  H01L23/3121 ,  H01L23/3142 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L2224/10126 ,  H01L2224/10135 ,  H01L2224/10156 ,  H01L2224/1131 ,  H01L2224/11332 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/13021 ,  H01L2224/13111 ,  H01L2224/16111 ,  H01L2224/16113 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/1624 ,  H01L2224/2929 ,  H01L2224/73103 ,  H01L2224/73104 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81139 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81805 ,  H01L2224/81815 ,  H01L2224/83192 ,  H01L2924/00011 ,  H01L2924/00012 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0665 ,  H05K1/181 ,  H01L2924/01083 ,  H01L2924/00014

Abstract: The present disclosure relates to the field of fabricating microelectronic packages, wherein cavities are formed in a dielectric layer deposited on a first substrate to maintain separation between soldered interconnections. In one embodiment, the cavities may have sloped sidewalls. In another embodiment, a solder paste may be deposited in the cavities and upon heating solder structures may be formed. In other embodiments, the solder structures may be placed in the cavities or may be formed on a second substrate to which the first substrate may be connected. In still other embodiments, solder structures may be formed on both the first substrate and a second substrate. The solder structures may be used to form solder interconnects by contact and reflow with either contact lands or solder structures on a second substrate.

Abstract translation: 本公开涉及制造微电子封装的领域，其中在沉积在第一基板上的电介质层中形成空腔以保持焊接互连之间的分离。 在一个实施例中，空腔可以具有倾斜的侧壁。 在另一个实施例中，焊膏可以沉积在空腔中，并且在加热时可以形成焊料结构。 在其它实施例中，焊料结构可以放置在空腔中，或者可以形成在可以连接第一衬底的第二衬底上。 在其它实施例中，可以在第一基板和第二基板上形成焊料结构。 焊料结构可以用于通过与第二衬底上的接触焊盘或焊料结构的接触和回流来形成焊料互连。

公开(公告)号：WO2018182756A1

公开(公告)日：2018-10-04

申请号：PCT/US2017/025664

申请日：2017-04-01

Applicant: INTEL CORPORATION ,  MANI, Divya ,  LAMBERT, William J. ,  LIFF, Shawna ,  CHAN ARGUEDAS, Sergio A. ,  SANKMAN, Robert L.

Inventor： MANI, Divya ,  LAMBERT, William J. ,  LIFF, Shawna ,  CHAN ARGUEDAS, Sergio A. ,  SANKMAN, Robert L.

IPC: H05K1/02 ,  H01L23/36 ,  H05K3/34 ,  H04B1/40

Abstract: Embodiments of the invention include a mmWave transceiver and methods of forming such devices. In an embodiment, the mmWave transceiver includes an RF module. The RF module may include a package substrate, a plurality of antennas formed on the package substrate, and a die attached to a surface of the package substrate. In an embodiment, the mmWave transceiver may also include a mainboard mounted to the RF module with one or more solder balls. In an embodiment, a thermal feature is embedded within the mainboard, and the thermal feature is separated from the die by a thermal interface material (TIM) layer. According to an embodiment, the thermal features are slugs and/or vias. In an embodiment, the die compresses the TIM layer resulting in a TIM layer with minimal thickness.

公开(公告)号：WO2018004696A1

公开(公告)日：2018-01-04

申请号：PCT/US2016/040871

申请日：2016-07-01

Applicant: INTEL CORPORATION ,  SWAN, Johanna M. ,  ALEKSOV, Aleksandar ,  OSTER, Sasha N. ,  EID, Feras ,  BICEN, Baris ,  SOUNART, Thomas L. ,  LIFF, Shawna M. ,  RAO, Valluri R.

Inventor： SWAN, Johanna M. ,  ALEKSOV, Aleksandar ,  OSTER, Sasha N. ,  EID, Feras ,  BICEN, Baris ,  SOUNART, Thomas L. ,  LIFF, Shawna M. ,  RAO, Valluri R.

IPC: G02B6/26 ,  G02B6/35 ,  G02B6/36

Abstract: Embodiments of the invention include an optoelectronic package that allows for in situ alignment of optical fibers. In an embodiment, the optoelectronic package may include an organic substrate. Embodiments include a cavity formed into the organic substrate. Additionally, the optoelectronic package may include an actuator formed on the organic substrate that extends over the cavity. In one embodiment, the actuator may include a first electrode, a piezoelectric layer formed on the first electrode, and a second electrode formed on the piezoelectric layer. According to an additional embodiment of the invention, the actuator may include a first portion and a second portion. In order to allow for resistive heating and actuation driven by thermal expansion, a cross-sectional area of the first portion of the beam may be greater than a cross-sectional area of the second portion of the beam.

Abstract translation: 本发明的实施例包括允许光纤原位对准的光电子封装。 在一个实施例中，光电子封装可以包括有机衬底。 实施例包括形成在有机衬底中的空腔。 另外，光电子封装可以包括在有机衬底上形成的致动器，其在腔体上延伸。 在一个实施例中，致动器可以包括第一电极，形成在第一电极上的压电层以及形成在压电层上的第二电极。 根据本发明的另外的实施例，致动器可以包括第一部分和第二部分。 为了允许由热膨胀驱动的电阻加热和致动，梁的第一部分的横截面积可以大于梁的第二部分的横截面积。

公开(公告)号：WO2015183264A1

公开(公告)日：2015-12-03

申请号：PCT/US2014/039834

申请日：2014-05-28

Applicant: INTEL CORPORATION ,  HU, Chuan ,  ELSHERBINI, Adel A. ,  TOMITA, Yoshihiro ,  LIFF, Shawna

Inventor： HU, Chuan ,  ELSHERBINI, Adel A. ,  TOMITA, Yoshihiro ,  LIFF, Shawna

IPC: H01L23/48 ,  H01L21/768 ,  H01L21/60

CPC classification number: H05K1/0283 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/4985 ,  H01L23/49894 ,  H01L23/5387 ,  H01L23/5389 ,  H01L24/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/1515 ,  H01L2924/181 ,  H05K1/036 ,  H05K1/185 ,  H05K3/1275 ,  H05K3/4688 ,  H05K2201/0133 ,  H05K2201/0187 ,  H05K2201/09018 ,  H05K2201/09036 ,  H05K2201/09045 ,  H05K2201/09263 ,  H05K2201/10151 ,  H01L2924/00012

Abstract: Embodiments of the present disclosure describe a wavy interconnect for bendable and stretchable devices and associated techniques and configurations. In one embodiment, an interconnect assembly includes a flexible substrate defining a plane and a wavy interconnect disposed on the flexible substrate and configured to route electrical signals of an integrated circuit (IC) device in a first direction that is coplanar with the plane, the wavy interconnect having a wavy profile from a second direction that is perpendicular to the first direction and coplanar with the plane. Other embodiments may be described and/or claimed.

Abstract translation: 本公开的实施例描述了用于可弯曲和可拉伸装置的波浪互连以及相关技术和配置。 在一个实施例中，互连组件包括限定平面的柔性衬底和布置在柔性衬底上的波纹互连，并且被配置成沿与平面共面的第一方向布置集成电路（IC）器件的电信号，波形 互连件具有从垂直于第一方向并与该平面共面的第二方向的波状轮廓。 可以描述和/或要求保护其他实施例。

公开(公告)号：WO2014092781A1

公开(公告)日：2014-06-19

申请号：PCT/US2013/046868

申请日：2013-06-20

Applicant: INTEL CORPORATION ,  MANIPATRUNI, Sasikanth ,  LIFF, Shawna M. ,  DOYLE, Brian S. ,  SINGH, Vivek K.

Inventor： MANIPATRUNI, Sasikanth ,  LIFF, Shawna M. ,  DOYLE, Brian S. ,  SINGH, Vivek K.

IPC: D03D15/00 ,  D04H1/42 ,  D01F8/00

CPC classification number: D03D1/0088 ,  D02G3/441 ,  D04H13/00 ,  D10B2401/18 ,  Y10T442/3049 ,  Y10T442/3057 ,  Y10T442/3976 ,  Y10T442/603 ,  Y10T442/696

Abstract: Flexible electronically functional fabrics are described that allow for the placement of electronic functionality in flexible substrates such as traditional fabrics. The fabrics can be made using flexible electronically functional fibers or a combination of electronically functional fibers and textile fibers. Electronic devices can be incorporated into the fabric to give it full computing capabilities.

Abstract translation: 描述了柔性电子功能织物，其允许将电子功能放置在诸如传统织物的柔性衬底中。 织物可以使用柔性电子功能纤维或电子功能性纤维和纺织纤维的组合制成。 电子设备可以结合到织物中，为其提供全面的计算能力。