公开(公告)号：WO2016060753A1

公开(公告)日：2016-04-21

申请号：PCT/US2015/048956

申请日：2015-09-08

Applicant: APPLIED MATERIALS, INC.

Inventor： XIE, Bo ,  YIM, Kang Sub ,  PAN, Cheng ,  NGO, Sure ,  KIM, Taewan ,  DEMOS, Alexandros T.

IPC: H01L21/31

CPC classification number: H01L23/53295 ,  H01L21/02126 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02274 ,  H01L21/02348 ,  H01L21/7682 ,  H01L21/76825 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76835 ,  H01L21/76838 ,  H01L21/76849 ,  H01L21/76883 ,  H01L2221/1047 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Embodiments of the disclosure generally provide multi-layer dielectric stack configurations that are resistant to plasma damage. Methods are disclosed for the deposition of thin protective low dielectric constant layers upon bulk low dielectric constant layers to create the layer stack. As a result, the dielectric constant of the multi-layer stack is unchanged during and after plasma processing.

Abstract translation: 本公开的实施例通常提供耐等离子体损伤的多层电介质堆叠配置。 公开了用于在本体低介电常数层上沉积薄保护性低介电常数层以产生层堆叠的方法。 结果，等离子体处理期间和之后多层堆叠的介电常数不变。

公开(公告)号：WO2015084538A1

公开(公告)日：2015-06-11

申请号：PCT/US2014/064418

申请日：2014-11-06

Applicant: APPLIED MATERIALS, INC.

Inventor： XIE, Bo ,  CHAN, Kelvin ,  DEMOS, Alexandros T.

IPC: H01L21/205

CPC classification number: H01L21/02118 ,  C23C16/482 ,  H01L21/02277 ,  H01L21/02337 ,  H01L21/02348 ,  H01L21/3105 ,  H01L21/67103 ,  H01L21/67115 ,  H01L21/6719

Abstract: Embodiments of the invention generally provide methods for sealing pores at a surface of a dielectric layer formed on a substrate. In one embodiment, the method includes exposing a dielectric layer formed on a substrate to a first pore sealing agent, wherein the first pore sealing agent contains a compound with a general formula C x H y O z , where x has a range of between 1 and 15, y has a range of between 2 and 22, and z has a range of between 1 and 3, and exposing the substrate to UV radiation in an atmosphere of the first pore sealing agent to form a first sealing layer on the dielectric layer.

Abstract translation: 本发明的实施方案通常提供了在形成在基底上的电介质层的表面处密封孔的方法。 在一个实施方案中，该方法包括将形成在基底上的电介质层暴露于第一孔密封剂，其中第一孔密封剂含有具有通式C x H y O z的化合物，其中x具有1至15的范围，y具有 在2和22之间的范围，z具有1和3之间的范围，并且在第一孔密封剂的气氛中将基底暴露于UV辐射，以在介电层上形成第一密封层。

公开(公告)号：WO2022005728A1

公开(公告)日：2022-01-06

申请号：PCT/US2021/037177

申请日：2021-06-14

Applicant: APPLIED MATERIALS, INC.

Inventor： XIE, Bo ,  YIM, Kang S. ,  LIU, Yijun ,  XIA, Li-Qun ,  XIONG, Ruitong

IPC: C23C16/30 ,  C23C16/32 ,  C23C16/505 ,  H01L21/02 ,  C23C16/325 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/02205 ,  H01L21/02211 ,  H01L21/02216 ,  H01L21/02274

Abstract: Exemplary methods of forming a silicon-and-carbon-containing material may include flowing a silicon-oxygen-and-carbon-containing precursor into a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region of the semiconductor processing chamber. The methods may include forming a plasma within the processing region of the silicon-and-carbon-containing precursor. The plasma may be formed at a frequency less than 15 MHz (e.g., 13.56 MHz). The methods may include depositing a silicon-and-carbon-containing material on the substrate. The silicon-and-carbon-containing material as-deposited may be characterized by a dielectric constant below or about 3.5 and a hardness greater than about 3 Gpa.

公开(公告)号：WO2011106075A2

公开(公告)日：2011-09-01

申请号：PCT/US2011/000215

申请日：2011-02-03

Applicant: APPLIED MATERIALS, INC.

Inventor： XIE, Bo ,  DEMOS, Alexandros, T. ,  RAJ, Daemian ,  NGO, Sure ,  YIM, Kang, Sub

IPC: H01L21/3205 ,  H01L21/205 ,  H01L21/28

CPC classification number: H01L21/02274 ,  C23C16/30 ,  C23C16/45523 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02216 ,  H01L21/7682 ,  H01L21/76832 ,  H01L21/76835

Abstract: Embodiments of the present invention pertain to the formation of microelectronic structures. Low k dielectric materials need to exhibit a dielectric constant of less than about 2.6 for the next technology node of 32 nm. The present invention enables the formation of semiconductor devices which make use of such low k dielectric materials while providing an improved flexural and shear strength integrity of the microelectronic structure as a whole.

Abstract translation: 本发明的实施例涉及微电子结构的形成。 对于32nm的下一个技术节点，低k电介质材料需要表现出小于约2.6的介电常数。 本发明能够形成利用这种低k电介质材料的半导体器件，同时提供整体上微电子结构的改进的弯曲和剪切强度的完整性。

公开(公告)号：WO2014116304A3

公开(公告)日：2014-07-31

申请号：PCT/US2013/055594

申请日：2013-08-19

Applicant: APPLIED MATERIALS, INC.

Inventor： BALUJA, Sanjeev ,  DEMOS, Alexandros T. ,  CHAN, Kelvin ,  ROCHA-ALVAREZ, Juan Carlos ,  HENDRICKSON, Scott A. ,  KANGUDE, Abhijit ,  TUREVSKY, Inna ,  CHHABRA, Mahendra ,  NOWAK, Thomas ,  YAO, Daping ,  XIE, Bo ,  RAJ, Daemian

IPC: H01L21/302 ,  H01L21/02

Abstract: A cleaning method for a UV chamber involves providing a first cleaning gas, a second cleaning gas, and a purge gas to one or more openings in the chamber. The first cleaning gas may be an oxygen containing gas, such as ozone, to remove carbon residues. The second cleaning gas may be a remote plasma of NF 3 and O 2 to remove silicon residues. The UV chamber may have two UV transparent showerheads, which together with a UV window in the chamber lid, define a gas volume proximate the UV window and a distribution volume below the gas volume. A purge gas may be flowed through the gas volume while one or more of the cleaning gases is flowed into the distribution volume to prevent the cleaning gases from impinging on the UV transparent window.

公开(公告)号：WO2013162848A1

公开(公告)日：2013-10-31

申请号：PCT/US2013/035297

申请日：2013-04-04

Applicant: APPLIED MATERIALS, INC. ,  XIE, Bo ,  DEMOS, Alexandros T. ,  HENDRICKSON, Scott A. ,  BALUJA, Sanjeev ,  ROCHA-ALVAREZ, Juan Carlos

Inventor： XIE, Bo ,  DEMOS, Alexandros T. ,  HENDRICKSON, Scott A. ,  BALUJA, Sanjeev ,  ROCHA-ALVAREZ, Juan Carlos

IPC: H01L21/302 ,  H01L21/02

CPC classification number: B08B7/0021 ,  B08B7/0035 ,  C23C16/4405 ,  H01J37/3244 ,  H01J37/32862

Abstract: Embodiments of the invention generally provide methods for cleaning a UV processing chamber. In one embodiment, the method includes flowing an oxygen-containing gas through a plurality of passages formed in a UV transparent gas distribution showerhead and into a processing region located between the UV transparent gas distribution showerhead and a substrate support disposed within the thermal processing chamber, exposing the oxygen-containing gas to UV radiation under a pressure scheme comprising a low pressure stage and a high pressure stage to generate reactive oxygen radicals, and removing unwanted residues or deposition build-up from exposed surfaces of chamber components presented in the thermal processing chamber using the reactive oxygen radicals.

Abstract translation: 本发明的实施例通常提供用于清洁UV处理室的方法。 在一个实施方案中，该方法包括使含氧气体通过形成在UV透明气体分配喷头中的多个通道流入位于UV透明气体分配喷头和位于热处理室内的基板支架之间的处理区域中， 在包含低压级和高压级的压力方案下将含氧气体暴露于紫外线辐射以产生活性氧自由基，以及从存在于热处理室中的室组分的暴露表面去除不想要的残留物或沉积物 使用活性氧自由基。

公开(公告)号：WO2022140346A1

公开(公告)日：2022-06-30

申请号：PCT/US2021/064548

申请日：2021-12-21

Applicant: APPLIED MATERIALS, INC.

Inventor： XIE, Bo ,  XIONG, Ruitong ,  NGO, Sure K. ,  YIM, Kang Sub ,  LIU, Yijun ,  XIA, Li-Qun

IPC: C23C14/10 ,  C23C14/06 ,  C23C14/22

Abstract: Method of forming low-k films with reduced dielectric constant, reduced CHx content, and increased hardness are described. A siloxane film is on a substrate surface using a siloxane precursor comprising O-Si-O bonds and cured using ultraviolet light.

公开(公告)号：WO2022076303A1

公开(公告)日：2022-04-14

申请号：PCT/US2021/053367

申请日：2021-10-04

Applicant: APPLIED MATERIALS, INC.

Inventor： XIE, Bo ,  XIONG, Ruitong ,  NGO, Sure ,  YIM, Kang Sub ,  LIU, Yijun ,  XIA, Li-Qun

IPC: H01L21/02 ,  C23C16/30 ,  C23C16/50 ,  C23C16/56

Abstract: Semiconductor processing methods are described for forming UV-treated, low-κ dielectric films. The methods may include flowing deposition precursors into a substrate processing region of a semiconductor processing chamber. The deposition precursors may include a silicon-and-carbon-containing precursor. The methods may further include generating a deposition plasma from the deposition precursors within the substrate processing region, and depositing a silicon-and-carbon-containing material on the substrate from plasma effluents of the deposition plasma. The as-deposited silicon-and-carbon-containing material may be characterized by greater than or about 5% hydrocarbon groups. The methods may still further include exposing the deposited silicon-and-carbon-containing material to ultraviolet light. The exposed silicon-and-carbon-containing material may be characterized by less than or about 2% hydrocarbon groups.

公开(公告)号：WO2022055896A1

公开(公告)日：2022-03-17

申请号：PCT/US2021/049316

申请日：2021-09-07

Applicant: APPLIED MATERIALS, INC.

Inventor： XIE, Bo ,  XIONG, Ruitong ,  YIM, Kang Sub ,  LIU, Yijun ,  XIA, Li-Qun ,  NGO, Sure

IPC: C23C16/44 ,  C23C16/40 ,  H01L21/02

Abstract: Exemplary semiconductor processing methods to clean a substrate processing chamber are described. The methods may include depositing a dielectric film on a first substrate in a substrate processing chamber, where the dielectric film may include a silicon-carbon-oxide. The first substrate having the dielectric film may be removed from the substrate processing chamber, and the dielectric film may be deposited on at least one more substrate in the substrate processing chamber. The at least one more substrate may be removed from the substrate processing chamber after the dielectric film is deposited on the substrate. Etch plasma effluents may flow into the substrate processing chamber after the removal of a last substrate having the dielectric film. The etch plasma effluents may include greater than or about 500 sccm of NF3 plasma effluents, and greater than or about 1000 sccm of O2 plasma effluents.

公开(公告)号：WO2012102997A2

公开(公告)日：2012-08-02

申请号：PCT/US2012/022195

申请日：2012-01-23

Applicant: APPLIED MATERIALS, INC ,  XIE, Bo ,  DEMOS, Alexandros T. ,  ROCHA-ALVAREZ, Juan Carlos ,  BALUJA, Sanjeev

Inventor： XIE, Bo ,  DEMOS, Alexandros T. ,  ROCHA-ALVAREZ, Juan Carlos ,  BALUJA, Sanjeev

IPC: H01L27/108 ,  H01L21/8242

CPC classification number: H01L28/40 ,  H01L21/3105 ,  H01L28/90

Abstract: The present invention provides systems, methods and apparatus for manufacturing a memory cell. The invention includes forming a feature having sidewalls in a first dielectric material; forming a first conductive material on the sidewalls of the feature; depositing a layer of a second dielectric material on the conductive material; and exposing the second dielectric material to oxidizing species and ultraviolet light to oxidize the second dielectric material. Numerous additional aspects are disclosed.

Abstract translation: 本发明提供用于制造存储器单元的系统，方法和设备。 本发明包括形成具有第一介电材料中的侧壁的特征; 在特征的侧壁上形成第一导电材料; 在导电材料上沉积第二介电材料层; 以及将第二电介质材料暴露于氧化物质和紫外光以氧化第二电介质材料。 披露了许多其他方面。