公开(公告)号：WO1993002410A1

公开(公告)日：1993-02-04

申请号：PCT/JP1992000926

申请日：1992-07-21

Applicant: FUJITSU LIMITED ,  TAKAI, Nobuyuki ,  HIYAMIZU, Kazufumi

Inventor： FUJITSU LIMITED

IPC: G06F03/06

CPC classification number: G06F3/0601 ,  G06F2003/0698 ,  G11B20/10 ,  G11B20/1205

Abstract: A method for controlling on magnetic tape the recording of data collected as a physical block comprising a plurality of packets is recorded. When an instruction for reading out the data corresponding to a packet in the physical block is issued from a host unit, the data of the whole of the physical block are read out from the magnetic tape, and stored in a buffer. When a write instruction and data to be recorded are outputted from the host unit at an arbitrary position in the physical block on the magnetic tape, one physical block is reorganized using the data stored in the buffer and the data to be recorded, and this data reorganized as the physical block is recorded on the magnetic tape.

公开(公告)号：WO1998018084A1

公开(公告)日：1998-04-30

申请号：PCT/JP1997003784

申请日：1997-10-20

Applicant: FUJITSU LIMITED ,  AOKI, Masaki ,  MORISHIMA, Masahito

Inventor： FUJITSU LIMITED

IPC: G06F17/16

CPC classification number: G06F8/4442 ,  G06F8/447 ,  G06F9/383

Abstract: When the processor of a vector computer detects an optimization instructing message which instructs the optimization of the method for performing access to a list at compiling time, the processor automatically changes the method for accessing. The bank contention associated with vectorization can be avoided and the access speed to the list can be accelerated by, for example, copying the data to be accessed in a working array, randomly changing the accessing order, or performing scalar loading.

Abstract translation: 当向量计算机的处理器检测到指示在编译时对表进行访问的方法进行优化的优化指示消息时，处理器自动改变访问方法。 可以避免与矢量化相关联的银行争用，并且可以通过例如在工作阵列中复制要访问的数据，随机改变访问顺序或执行标量加载来加速列表的访问速度。

公开(公告)号：WO1998006177A1

公开(公告)日：1998-02-12

申请号：PCT/US1997013618

申请日：1997-08-05

Applicant: FUJITSU LIMITED

Inventor： FUJITSU LIMITED ,  ASATO, Creighton

IPC: H03K19/017

CPC classification number: H03K3/356113 ,  H03K3/037

Abstract: A circuit (300) combines the functions of a logic gate (310, 320) and a latch (330) to lower steady state power dissipation during gate operation. The circuit operates in two modes, a flow-through mode and a latched node. In the flow-through mode, a gate portion (310) which receives one or more digital input signals (X1-XN) implements the complement of a desired Boolean logic function on the input signals and provides an internal signal. The gate portion may have a steady-state power dissipation while providing the internal signal. An inverter (350) in a latch portion (330) of the circuit inverts the internal signal to generate an output signal (Z) which represents the desired logical combination of the input signals. The inverter provides the output signal with a full-range CMOS voltage. In latched mode, the gate portion is disabled to stop the steady-state power dissipation while the latch portion of the circuit preserves the desired output signal.

Abstract translation: 电路（300）将逻辑门（310,320）和锁存器（330）的功能组合以在门操作期间降低稳态功率耗散。 电路工作在两种模式，即流通模式和锁存节点。 在流通模式中，接收一个或多个数字输入信号（X1-XN）的门部分（310）在输入信号上实现所需的布尔逻辑函数的补码并提供内部信号。 栅极部分可以具有稳态功率耗散，同时提供内部信号。 电路的锁存部分（330）中的反相器（350）使内部信号反相以产生表示输入信号的期望逻辑组合的输出信号（Z）。 逆变器为输出信号提供全范围CMOS电压。 在锁存模式下，禁止门极部分停止稳态功耗，同时电路的锁存部分保留所需的输出信号。

公开(公告)号：WO1998002919A1

公开(公告)日：1998-01-22

申请号：PCT/JP1997002405

申请日：1997-07-10

Applicant: FUJITSU LIMITED ,  FUKASAWA, Norio ,  KAWAHARA, Toshimi ,  MORIOKA, Muneharu ,  OSAWA, Mitsunada ,  SHINMA, Yasuhiro ,  MATSUKI, Hirohisa ,  ONODERA, Masanori ,  KASAI, Junichi ,  MARUYAMA, Shigeyuki ,  SAKUMA, Masao ,  SUZUKI, Yoshimi ,  TAKENAKA, Masashi

Inventor： FUJITSU LIMITED

IPC: H01L21/56

CPC classification number: H01L21/568 ,  B29C43/18 ,  B29C2043/3444 ,  B29C2043/3628 ,  H01L21/56 ,  H01L21/561 ,  H01L21/563 ,  H01L21/566 ,  H01L21/6835 ,  H01L23/24 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/49572 ,  H01L23/4985 ,  H01L24/27 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L29/0657 ,  H01L2221/68345 ,  H01L2221/68377 ,  H01L2224/02371 ,  H01L2224/0401 ,  H01L2224/0556 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/274 ,  H01L2224/29111 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/50 ,  H01L2224/73104 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/83102 ,  H01L2224/83191 ,  H01L2224/85001 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06572 ,  H01L2225/06579 ,  H01L2225/06582 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2225/1005 ,  H01L2225/1064 ,  H01L2225/107 ,  H01L2225/1082 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0133 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15173 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/01028 ,  H01L2924/3512 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method for manufacturing semiconductor devices includes a resin sealing step of putting a substrate (16) on which bumps (12) and a plurality of semiconductor chips (11) are arranged in the cavity (28) of a mold (20) and supplying a resin (35) to the region where the bumps (12) are provided so as to coat the bumps (12) and form a resin layer (13), a protruded electrode exposing step of exposing at least the front end sections of the bumps (12) coated with the resin layer (13) from the layer (13), and a separating step of separating the semiconductor chips (11) into individual chips (11) by cutting the substrate (16) together with the layer (13).

Abstract translation: 一种制造半导体器件的方法包括：树脂密封步骤，将在所述模具（20）的空腔（28）中布置有凸块（12）和多个半导体芯片（11）的基板（16） 树脂（35）到设置有凸块（12）的区域，以涂覆凸块（12）并形成树脂层（13）;突出电极暴露步骤，至少暴露凸块的前端部分 12），以及通过与衬底（13）一起切割衬底（16）将半导体芯片（11）分离成单个芯片（11）的分离步骤。

公开(公告)号：WO1997022090A1

公开(公告)日：1997-06-19

申请号：PCT/JP1996003589

申请日：1996-12-06

Applicant: FUJITSU LIMITED ,  MUKAI, Masanori

Inventor： FUJITSU LIMITED

IPC: G07D07/00

CPC classification number: G07D11/0066 ,  G07D7/00

Abstract: A note/card handling apparatus capable of instantaneously reporting the detection of forged cards/notes to a managing personnel, wherein received cards/notes are classified into a first kind likely to be genuine, a second kind likely to be forged, and a third kind less likely to be genuine than the first kind and less likely to be forged than the second kind, and if a predetermined number of notes/cards of the second kind are detected, warning information is issued.

Abstract translation: 一种能够立即向管理人员报告伪造卡/票据的检测的便签/卡处理装置，其中接收到的卡片/笔记被分类为可能是真实的第一种，可能被伪造的第一种，第三类 不太可能比第一种真伪，并且不太可能被伪造，并且如果检测到第二种类型的预定数量的票据/卡，则发出警告信息。

公开(公告)号：WO1996033239A1

公开(公告)日：1996-10-24

申请号：PCT/JP1996001045

申请日：1996-04-17

Applicant: NIPPON ZEON CO., LTD. ,  FUJITSU LIMITED ,  TANAKA, Akira ,  TAZAKI, Satoshi ,  YONEDA, Yasuhiro ,  YOKOUCHI, Kishio

Inventor： NIPPON ZEON CO., LTD. ,  FUJITSU LIMITED

IPC: C08L79/08

CPC classification number: G03F7/0387 ,  C08G73/1025 ,  C08K5/3472 ,  H05K3/285 ,  C08L79/08

Abstract: A polyimide resin composition having an excellent rustproofing effect on copper and its alloys, characterized by comprising a polyimide resin (A) and at least one 1H-tetrazole (B) selected from the group consisting of 1H-tetrazole, 5,5'-bis-1H-tetrazole and derivatives thereof.

Abstract translation: 一种对铜及其合金具有优异防锈效果的聚酰亚胺树脂组合物，其特征在于包含聚酰亚胺树脂（A）和至少一种选自1H-四唑5,5'-双 -1H-四唑及其衍生物。

公开(公告)号：WO1995032486A1

公开(公告)日：1995-11-30

申请号：PCT/JP1995000799

申请日：1995-04-24

Applicant: FUJITSU LIMITED ,  KIMURA, Atsunori ,  ONO, Yoichi ,  MINAMISHIN, Hayato ,  TANAKA, Yuji ,  OHNO, Seiichi ,  HATA, Hidekazu ,  UEDA, Hiroyuki ,  ESAKI, Isamu ,  UCHIDA, Atsushi

Inventor： FUJITSU LIMITED

IPC: G07D13/00

CPC classification number: G07D11/0018 ,  B65H83/025 ,  G07D11/0003 ,  G07D11/0021 ,  G07D11/0081 ,  Y10S209/90

Abstract: An apparatus for handling paper sheets such as bank notes, and a paper sheet transacting apparatus, which comprise a discharge unit adapted to carry out feeding and discharging of paper sheets and to be turned between a paper sheet feeding position and a paper sheet ejection position, a partitioning means adapted to project into and retract from the discharge unit and distinguish when it projects the paper sheets fed into the discharge unit from those to be returned, a storage unit for storing paper sheets therein, a temporary storage unit for temporarily storing paper sheets which should not be stored in the storage unit or the paper sheets which should not be discharged, and a plurality of cassettes adapted to carry out the supplying and recovering of paper sheets in the storage unit and the supplying and recovering of paper sheets in the feed and discharge unit. The paper sheet handling apparatus and a paper sheet transacting apparatus rarely fail, and can be operated for a long period of time without being stopped even when a trouble occurs.

Abstract translation: 一种用于处理诸如纸币的纸张和纸张交易装置的装置，其包括适于执行纸张的进给和排出并在纸张供给位置和纸张排出位置之间转动的排出单元， 分隔装置，其适于投射到排出单元中并从排出单元缩回，并且在将进给到排出单元中的纸张从被返回的纸张伸出时被区分开，用于在其中存储纸张的存储单元，用于临时存储纸张的临时存储单元 不应该将其存放在不应放出的存储单元或纸张中，以及适于执行在存储单元中的纸张的供给和回收以及供给和回收进给中的纸张的多个盒 和放电单元。 纸张处理装置和纸张交易装置很少失败，并且即使发生故障也可以长时间地操作而不停止。

公开(公告)号：WO1995025989A1

公开(公告)日：1995-09-28

申请号：PCT/JP1995000495

申请日：1995-03-17

Applicant: FUJITSU LIMITED

Inventor： FUJITSU LIMITED ,  SATO, Kunihiko ,  FUKE, Kenji ,  KAWAI, Tsutomu ,  SUZUKI, Eiji ,  TONAI, Shozo ,  TONOMOTO, Yoshihiro ,  SUGIMOTO, Katsumi ,  TONAI, Keiko ,  YOSHII, Hitoshi

IPC: G03G15/08

CPC classification number: G03G15/0822

Abstract: A developing apparatus for developing an electrostatic latent image with a two-component developer is provided with a developer container (46) comprising a developer reservoir (50), and a developer agitation section (56) above the developer reservoir. A communication passage (64) is formed between the developer agitation section and the developer reservoir, and opened so as to form a developer overflow port from the developer agitation section. The developing apparatus is further provided with a developer supporter (48) set in the developer reservoir in the developer container. This developer supporter is exposed partially to the outside so as to face an electrostatic latent image supporter (10), and adapted to transfer the developer from the developer reservoir to a region opposed to the electrostatic latent image supporter so as to develop the electrostatic image thereon. The developing apparatus is further provided with a developer lifting means (68, 68', 70) for lifting the developer, which has been transferred to the region facing the latent image supporter by the developer supporter, to the developer agitation section, and a developer agitating means (58) for agitating the developer in the developer agitating section. A part of the developer agitated by this agitating means is supplied to the developer reservoir via the developer overflow port and the passage.

Abstract translation: 用双组分显影剂显影静电潜像的显影装置设置有显影剂容器（46），显影剂容器（46）包括显影剂储存器（50）和在显影剂储存器上方的显影剂搅拌部分（56）。 在显影剂搅拌部分和显影剂储存器之间形成连通通道（64），并打开，以便从显影剂搅拌部分形成显影剂溢出口。 显影装置还设置有设置在显影剂容器中的显影剂储存器中的显影剂支撑件（48）。 该显影剂支撑体部分地暴露于外部以面对静电潜像支持体（10），并且适于将显影剂从显影剂储存器转移到与静电潜像载体相对的区域，以便在其上显影静电图像 。 显影装置还设置有显影剂提升装置（68,68'，70），用于将已经被显影剂载体转移到面向潜像载体的区域的显影剂提升到显影剂搅拌部分，以及显影剂 用于搅拌显影剂搅拌部分中的显影剂的搅拌装置（58）。 通过该搅拌装置搅拌的显影剂的一部分经由显影剂溢出口和通道供给到显影剂储存器。

公开(公告)号：WO1994009589A1

公开(公告)日：1994-04-28

申请号：PCT/JP1993001451

申请日：1993-10-08

Applicant: FUJITSU LIMITED ,  FUJIWARA, Tatsuo ,  KANEMITSU, Norio

Inventor： FUJITSU LIMITED

IPC: H04N01/12

CPC classification number: B65H1/266 ,  B65H31/22 ,  B65H2405/332 ,  H04N1/00519 ,  H04N1/00525 ,  H04N1/00546 ,  H04N1/00567 ,  H04N1/00588 ,  H04N1/00591 ,  H04N1/00602 ,  H04N1/0062 ,  H04N1/00631 ,  H04N1/12 ,  H04N1/121 ,  H04N1/193

Abstract: This apparatus has a box type case (10) provided with first and second openings (11, 12) in an arbitrary side wall thereof, a drawer (6) which is provided in the first opening (11) so that it can be opened and closed with respect to the box type case (10), and which has a hopper (1) in which paper (4) is placed, and a transfer means (2) for transferring in the box type case (10) the paper, which is placed in the hopper (1), to a stacker (5) communicating with the second opening (12) in the box type case (10).

Abstract translation: 该装置具有在其任意侧壁上设置有第一和第二开口（11,12）的盒式壳体（10），设置在第一开口（11）中以使其能够打开的抽屉（6） 相对于箱型壳体（10）封闭，并且具有其中放置有纸（4）的料斗（1）和用于在纸盒（10）中转印纸张的转印装置（2），其中 被放置在料斗（1）中，与盒型壳体（10）中与第二开口（12）连通的堆垛机（5）。

公开(公告)号：WO1994005128A1

公开(公告)日：1994-03-03

申请号：PCT/JP1993001122

申请日：1993-08-10

Applicant: FUJITSU LIMITED ,  OHSHIMA, Kenichi ,  ITOH, Hiroshi ,  HOUMURA, Toshikazu

Inventor： FUJITSU LIMITED

IPC: H04Q07/04

CPC classification number: H04W60/00 ,  H04W12/06

Abstract: In a system wherein a plurality of communication terminals are connected with one another, or the mobile communication terminals and fixed communication terminals are connected with one another by a switchboard through a base station, the present invention discloses a system which registrates a call area of each mobile communication terminal to the switchboard through the base station. The system includes the switchboard (300), a plurality of base stations (200, 210) connected to this switchboard (300) and mobile communication terminals (100, 110) connected wireless to the base stations (200, 210), respectively. The mobile communication terminals (100, 110) registrate their own call area positions to the switchboard (300) through the base stations (200, 210), respectively. A registration procedure for registering the call area includes a first position registration sequence and a second position registration sequence. The first position registration sequence includes a procedure for authenticating whether or not the mobile communication terminal (100, 110) sending the position registration request to the switchboard (300) is the terminal the use of which is permitted in this system. The second position registration sequence is executed when the mobile communication terminal (100, 110) has already made the position registration to the switchboard (300) in this system.

Abstract translation: 在多个通信终端彼此连接的系统中，或者移动通信终端和固定通信终端通过基站通过交换机彼此连接的情况下，本发明公开了一种系统，其将每个通信终端的呼叫区域 移动通信终端通过基站到交换机。 该系统包括配电板（300），连接到该配电板（300）的多个基站（200,210）和分别连接到基站（200,210）的移动通信终端（100,110）。 移动通信终端（100,110）分别通过基站（200,210）将其自己的呼叫区域位置登记到交换机（300）。 用于登记呼叫区域的登记过程包括第一位置登记序列和第二位置登记序列。 第一位置登记序列包括用于认证向该交换机（300）发送位置登记请求的移动通信终端（100,110）是否是在该系统中允许其使用的终端的过程。 当移动通信终端（100,110）已经在该系统中已经向交换机（300）进行了位置登记时，执行第二位置登记序列。