公开(公告)号：EP2408284A1

公开(公告)日：2012-01-18

申请号：EP10169557.5

申请日：2010-07-14

Applicant: Research In Motion Limited

Inventor： Li, Fan ,  Duong, Anthony ,  Henderson, William

IPC: H05K3/34 ,  H05K1/11

CPC classification number: B23K3/08 ,  B23K1/20 ,  B23K2201/40 ,  H05K1/111 ,  H05K3/341 ,  H05K2201/099 ,  H05K2203/1178 ,  Y02P70/611

Abstract: An assembly, and an associated method, facilitates egress of gasses generated during a solder process, thereby reducing the occurrence of voids in the resultant solder connection. A non-conductive channel (36) is formed to extend part way through a solder pad (38). The channel defines a path by which to facilitate the egress of the gas generated during the solder operation.

Abstract translation: 组件和相关联的方法有助于排出在焊接过程期间产生的气体，从而减少所得到的焊接连接中的空隙的发生。 形成非导电通道（36）以部分地延伸穿过焊盘（38）。 该通道限定了一种路径，通过该路径来促进在焊接操作期间产生的气体的排出。

公开(公告)号：EP1850381A3

公开(公告)日：2010-08-18

申请号：EP07008530.3

申请日：2007-04-26

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Kunimoto, Yuji ,  Kajiki, Atsunori

IPC: H01L23/485 ,  H05K1/11 ,  H01L23/498

CPC classification number: H05K1/111 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K3/3452 ,  H05K2201/09227 ,  H05K2201/094 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2924/00

Abstract: There is provided a mounting substrate on which a semiconductor chip is mounted using a flip chip bonding, having a plurality of connection pads (103) which are connected to the semiconductor chip, and an insulation layer (102) formed in such a manner as to cover the connection pads partially, wherein the insulation layer includes a first insulation layer (102B) which is formed in such a manner as to correspond to a center of the semiconductor chip and a second insulation layer (102A) which is formed in such a manner as to surround the first insulation layer, and wherein the plurality of connection pads include first connection pads which are partially covered by the first insulation layer and second connection pads which are partially covered by the second insulation layer.

公开(公告)号：EP2209358A1

公开(公告)日：2010-07-21

申请号：EP09817569.8

申请日：2009-07-15

Applicant: Ibiden Co., Ltd.

Inventor： AKAI Sho ,  IMAI Tatsuya ,  TOKIHISA Iku

IPC: H05K3/46 ,  H05K3/34

CPC classification number: H05K3/3452 ,  H05K3/244 ,  H05K3/389 ,  H05K3/4644 ,  H05K2201/099 ,  H05K2203/025

Abstract: A multilayer printed wiring board of the present invention is characterized by a first interlayer resin insulation layer; a pad for mounting an electronic component formed on the first interlayer resin insulation layer; a solder-resist layer formed on the first interlayer resin insulation layer and the pad, and having an opening portion that reaches the pad; and a protective film positioned at the bottom of the opening portion and formed on the pad. In such a multilayer printed wiring board, a metal layer is formed on the surface of the pad, containing at least one metal from among Sn, Ni, Zn, Co, Ti, Pd, Ag, Pt and Au; a coating film made of a coupling agent is formed on the metal layer; and at least part of the protective film is formed directly on the exposed surface of the pad, which is exposed through the opening portion.

Abstract translation: 本发明的多层印刷电路板是由第一层间树脂绝缘层为特征的; 用于将形成在第一层间树脂绝缘层上的电子部件的安装垫; 一焊料抗蚀剂来形成第一层间树脂绝缘层和所述焊盘上层，并且具有开口部没达的垫; 和保护膜位于开口部分的底部以及形成在该垫。 在寻求一种多层印刷电路板中，金属层是形成在垫的表面上，从锡，镍，锌，钴，钛，钯，银，Pt和Au中含有至少一种金属; 涂膜制成的偶联剂是形成在金属层上; 和保护膜的至少一部分直接形成在焊盘的暴露的表面，在所有这是通过开口部露出。

公开(公告)号：EP2047724B1

公开(公告)日：2010-02-24

申请号：EP07729101.1

申请日：2007-05-14

Applicant: Continental Automotive GmbH

Inventor： FINK, Martin ,  FISCHER, Georg

IPC: H05K3/28

CPC classification number: H05K1/118 ,  B60R16/0215 ,  H05K3/365 ,  H05K2201/09363 ,  H05K2201/09381 ,  H05K2201/099 ,  Y10T29/49126 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: The invention relates to a conductor carrier (2) comprising a base insulating film (5), a contact insulating film (3), and at least one first strip conductor and one second strip conductor (4, 6). The contact insulating film (3) comprises at least one first recess and one second recess (8, 10). The strip conductors are embedded between the two insulating films and each form a first overlapping region with the first or second recess (8, 10) of the contact insulating film (3). The conductor carrier (2) also comprises an insulating region (12) which separates the first strip conductor (4) from the second strip conductor (6) in an insulating manner due to the contact insulating film (3) being less raised than outside the insulating region (12), and extends between the first and second recess (8, 10) of the contact insulating film (3) in a meandering manner.

公开(公告)号：EP2132254A1

公开(公告)日：2009-12-16

申请号：EP08744512.8

申请日：2008-03-27

Applicant: Synaptics Incorporated

Inventor： THAMMASOUK, Khamvong ,  LERTPUTIPINYO, Polsak

IPC: C08J7/16

CPC classification number: H05K3/3494 ,  B29C65/1412 ,  B29C65/4815 ,  B29C66/348 ,  B29C66/47 ,  B29C66/7352 ,  B29C2035/0822 ,  B29K2067/00 ,  B29K2101/12 ,  B29L2031/3425 ,  H05K1/0201 ,  H05K1/0393 ,  H05K1/162 ,  H05K1/182 ,  H05K1/189 ,  H05K3/243 ,  H05K3/28 ,  H05K3/281 ,  H05K3/282 ,  H05K3/3442 ,  H05K2201/055 ,  H05K2201/062 ,  H05K2201/099 ,  H05K2201/10636 ,  H05K2203/0557 ,  H05K2203/166 ,  Y02P70/611 ,  Y10T156/10 ,  Y10T428/31786

Abstract: In one embodiment, the present invention comprises a method for fixedly and electronically coupling an electronic component to a polymer substrate. In this embodiment, a polymer substrate is received. The polymer substrate has an electronic component disposed proximate a bonding agent which is coupled to the polymer substrate. The present embodiment also provides a heat shielding fixture which is configured to shield at least a portion of the polymer substrate from a heat source. The heat shielding fixture is configured to allow heat from the heat source to access the bonding agent. The present embodiment then subjects the bonding agent to the heat source such that the heat from the heat source causes the electronic component to be fixedly and electronically coupled to the polymer substrate once the bonding agent solidifies.

公开(公告)号：EP1940207A3

公开(公告)日：2009-11-04

申请号：EP07122615.3

申请日：2007-12-07

Applicant: ROBERT BOSCH GMBH

Inventor： Klein, Christian ,  Finzer, Guido ,  Haalboom, Thomas ,  Haiss, Eberhard

IPC: H05K1/11 ,  H05K3/34

CPC classification number: H05K3/3421 ,  H05K1/111 ,  H05K3/3442 ,  H05K3/3452 ,  H05K2201/09381 ,  H05K2201/09418 ,  H05K2201/099 ,  H05K2201/10636 ,  Y02P70/611 ,  Y02P70/613

Abstract: Es wird eine elektrische Vorrichtung mit einem Trägerelement (11), insbesondere einer Leiterplatte, vorgeschlagen. Diese Vorrichtung weist zumindest eine auf dem Trägerelement (11) angeordnete Anschlussfläche (16) auf, die zur Kontaktierung eines Bauelements (50) dient. Die Öffnung ist dadurch gekennzeichnet, dass die benetzbare Anschlussfläche (16) jeweils aus zumindest zwei Teilflächen (28, 31) besteht, wobei eine der Teilflächen (28) schmaler als die andere Teilfläche (31) ist.

公开(公告)号：EP1965620A1

公开(公告)日：2008-09-03

申请号：EP06835027.1

申请日：2006-12-20

Applicant: IBIDEN CO., LTD.

Inventor： TANNO, Katsuhiko

IPC: H05K3/34 ,  H01L23/12

CPC classification number: B23K31/02 ,  H01L21/4853 ,  H01L23/49838 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11334 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H05K3/3452 ,  H05K3/3478 ,  H05K3/3484 ,  H05K3/4602 ,  H05K2201/094 ,  H05K2201/099 ,  H05K2203/041 ,  H05K2203/043 ,  H05K2203/0557 ,  H05K2203/1476 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: [Problem] A method for manufacturing a printed wiring board is proved to form bumps with different diameters at the same height.
[Means for Solving] Because a small-diameter bump 78S is formed from small-diameter solder balls 77M mounted on a small-diameter aperture 71S of a solder-mask layer 70, and a large-diameter bump 78P is formed from large-diameter solder balls 77L mounted on a large-diameter aperture 71P, small-diameter bumps 78S and large-diameter bumps 78P with different diameters can be formed at the same heights H1 and H2. Consequently, when mounting an IC chip 90 through the small-diameter bump 78S and the large-diameter bump 78P, it is possible to secure joint reliability between the IC chip 90 and the multilayered printed wiring board 10.

Abstract translation: [问题]证明制造印刷线路板的方法在相同高度形成具有不同直径的凸块。 [解决手段]由于小直径凸块78S由安装在焊接掩模层70的小直径开口71S上的小直径焊球77M形成，并且大直径凸块78P由大直径 安装在大直径孔71P上的焊球77L，具有不同直径的小直径凸起78S和大直径凸起78P可以形成在相同的高度H1和H2处。 因此，在通过小直径凸块78S和大直径凸块78P安装IC芯片90时，可以确保IC芯片90与多层印刷布线板10之间的接合可靠性。

公开(公告)号：EP1887845A1

公开(公告)日：2008-02-13

申请号：EP06780769.3

申请日：2006-06-28

Applicant: IBIDEN CO., LTD.

Inventor： KAWAMURA, Yoichiro, IBIDEN CO., LTD. ,  SAWA, Shigeki, IBIDEN CO., LTD. ,  TANNO, Katsuhiko, IBIDEN CO., LTD. ,  TANAKA, Hironori, IBIDEN CO., LTD. ,  FUJII, Naoaki, IBIDEN CO., LTD.

IPC: H05K3/34 ,  H01L21/60 ,  H05K3/28

CPC classification number: H05K3/3478 ,  H01L21/4853 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/16 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/81192 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01047 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K3/3452 ,  H05K2201/0191 ,  H05K2201/099 ,  H05K2203/041 ,  H05K2203/0557 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49165 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A printed wiring board comprises a wiring substrate provided with at least one conductor circuit, a solder resist layer formed on the surface of the wiring substrate, covering the at least one conductor circuit, conductor pads formed on a part of the at least one conductor circuit exposed from respective openings provided in the solder resist layer for mounting electronic parts, and solder bumps formed on the respective conductor pads. Connection reliability and insulation reliability are easily improved by making the ratio (H/D) of a height H from solder resist layer surface the solder bump to an opening diameter of the opening 0.55 to 1.0 even in narrow pitch structure under the pitch of the opening provided in the solder resist layer of 200 µm or less.

Abstract translation: 本发明提供一种印刷线路板，其包括：布线基板，其具有至少一个导体电路;阻焊层，其形成在布线基板的表面上，覆盖所述至少一个导体电路;导体焊盘，其形成在所述至少一个导体电路的一部分上 从设置在用于安装电子部件的阻焊层中的各个开口暴露，并且在各个导体焊盘上形成焊料凸块。 即使在开口节距下的窄间距结构中，通过使焊料凸块的阻焊层表面的高度H与开口的开口直径0.55到1.0之间的比率（H / D）容易改善，也容易提高连接可靠性和绝缘可靠性 设置在200μm或更小的阻焊层中。

公开(公告)号：EP1814370A4

公开(公告)日：2007-11-07

申请号：EP05811438

申请日：2005-12-02

Applicant: MATSUSHITA ELECTRIC IND CO LTD

Inventor： WATANABE MASAKI

IPC: H05K3/34 ,  H01L21/60 ,  H05K1/11 ,  H05K3/00 ,  H05K3/46

CPC classification number: H05K3/3452 ,  H01L2224/16225 ,  H05K1/114 ,  H05K3/0005 ,  H05K3/3436 ,  H05K3/3484 ,  H05K3/429 ,  H05K2201/09036 ,  H05K2201/09845 ,  H05K2201/099 ,  H05K2201/09909 ,  H05K2201/10734 ,  H05K2203/0588 ,  Y10T29/49144

Abstract: A printed board capable of mounting thereon an IC package such as BGA having small inter-terminal gaps even if a conventionally-used, normal-size through hole is used. Soldering lands (2a), (2b), (2c) and (2d) to which soldering balls are connected are arranged in a lattice form on one main surface of a printed board (1). The center point (B) of a through hole (3) is provided deviated toward a soldering land (2a) kept at the same potential as the through hole (3) from the intersection (A) between a diagonal (200ab) connecting the soldering lands (2a) and (2b) and a diagonal (200cd) connecting the soldering lands (2c) and (2d).

公开(公告)号：EP1796445A2

公开(公告)日：2007-06-13

申请号：EP07002566.3

申请日：1997-06-12

Applicant: IBIDEN CO., LTD.

Inventor： Asai, Motoo ,  Kawamura, Yoichiro

IPC: H05K1/11 ,  H05K3/46 ,  H05K3/34 ,  H01L23/498 ,  H01L23/538

CPC classification number: H05K1/112 ,  H01L23/49816 ,  H01L23/5384 ,  H01L23/5386 ,  H01L2924/0002 ,  H05K3/06 ,  H05K3/3452 ,  H05K3/3457 ,  H05K3/3478 ,  H05K3/4602 ,  H05K3/4644 ,  H05K2201/09227 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/099 ,  H05K2201/10734 ,  H05K2203/0156 ,  H05K2203/0338 ,  H05K2203/0405 ,  H05K2203/043 ,  H01L2924/00

Abstract: A multilayer printed circuit board comprising a core substrate, multilayer wiring layers formed on the substrate by alternately laminating an interlaminar insulating layer and conductor pattern and a group of solder pads having solder bumps planarly arranged on an outermost surface of the multilayer wiring layers, characterized in that first, the solder pads located from first row to fifth row from an outer position of the solder pad group are constructed with flat pads connected to conductor patterns located on the outermost surface and having solder bumps formed on surfaces of the pads, while the solder pad group other than these solder pads are constructed with viaholes connected to a flat innerlayer pad group located in an inner layer and having solder bumps formed in recess portions of the viaholes and, second, the solder pads located from first row to fifth row from an outer position of the innerlayer pad group are constructed with flat pads connected to conductor patterns in the same layer as the innerlayer pad group, while the innerlayer pad group other than these pads are constituted with flat pads connected to a further innerlayer flat pad group located inward the above innerlayer through viaholes and, third, the layer having the structure of the above second feature is at least one layer.

Abstract translation: 一种多层印刷电路板，包括芯基板，通过交替层叠层间绝缘层和导体图案而形成在所述基板上的多层布线层和具有平面布置在所述多层布线层的最外表面上的焊料凸块的一组焊料焊盘，其特征在于， 首先，从焊料焊盘组的外部位置开始位于第一行至第五行的焊盘构造为连接到位于最外表面上并且在焊盘表面上形成焊料凸块的导体图案的平坦焊盘，而焊料 除了这些焊盘之外的焊盘组构造有连接到位于内层中的平坦内层焊盘组的通孔，并且具有形成在通孔的凹部中的焊料凸块，以及第二焊盘从第一行至第五行位于 内层焊盘组的外部位置由连接到导体图案中的平坦焊盘构成 与内层垫组相同，而除了这些垫之外的内层垫组由通过通孔连接到位于上述内层的另一内层平垫组的平垫构成，第三，具有上述第二结构的层 功能至少有一层。