摘要:
A semiconductor chip, a mold resin sealing the semiconductor chip, and a plurality of conductor leads extending from an inside of the mold resin to an outside thereof are provided. A portion of each conductor lead arranged inside the mold resin forms an internal terminal portion, and a portion thereof arranged outside the mold resin forms an external terminal portion. An electrode of the semiconductor chip and the internal terminal portion of the conductor lead are connected. The internal terminal portion of at least one of the conductor leads forms an inductance element portion, at least a part of which is narrower than the external terminal portion. An inductance element formed in a resin package has stable characteristics, and the stability of high-frequency characteristics improves.
摘要:
A semiconductor integrated circuit comprises contact pads located over active components, which are positioned to minimize the distance for power delivery between a selected pad and one or more corresponding active components, to which the power is to be delivered. This minimum distance further enhances dissipation of thermal energy released by the active components. More specifically, a semiconductor integrated circuit comprises a laterally organized power transistor, an array of power supply contact pads distributed over the transistor, means for providing a distributed, predominantly vertical current flow from the contact pads to the transistor, and means for connecting a power source to each of the contact pads. Positioning the power supply contact pads directly over the active power transistor further saves precious silicon real estate area. The means for vertical current flow include contact pads made of a stack of metal layers comprising refractory metals for adhesion, copper and nickel as stress-absorbing metals, and gold or palladium as bondable and solderable outermost metals. The means for connecting a power source include wire bonding and solder ball interconnection.
摘要:
A semiconductor switching circuit device includes a field effect transistor having a source (13), a gate electrode (17) and a drain electrode (15), a first electrode pad connected to the source electrode (13) or the drain electrode (15), and a second electrode pad connected to the source electrode (13) or the drain electrode (15) which is not connected to the first electrode pad (IN). The device also includes a third electrode pad receiving a DC voltage and applying the DC voltage to the field effect transistor, a first insulating layer (60) covering the field effect transistor, a metal layer (70) disposed above the first insulating layer (60) and connected to the third electrode pad, and a second insulating layer (80) disposed on the metal layer (70). The third electrode pad may be a control terminal pad, a ground terminal pad or a terminal pad receiving a constant DC power voltage. The metal layer (70) may be a flat sheet, a lattice or a comb-like structure.
摘要:
The invention concerns a method for jamming the power consumption of an integrated circuit (10), at least during the execution by the integrated circuit of a confidential operation (T2) which consists in scanning the confidential data (Ks) stored in the integrated circuit and/or calculating a cryptographic code. The invention is characterised in that it consists in activating a charge pump (PMP) so as to generate on the power supply line of the integrated circuit power consumption fluctuations (Icc2) of sufficient intensity to mask the variations on power consumption related to the execution of the confidential operation.
摘要:
In a semiconductor package for a chip having terminals on both sides, for example, a power MOSFET in which the gate and source terminals are on the front side and the drain terminal is on the back side, electrical contact is made with the back side terminal by extending vias, which can take the form of trenches, holes or other cavities, either entirely or patrially through the chip. The vias are filled with a metal or other electrically conductive material. The process is performed on the chips in a wafer simultaneously. The resulting package is compact and economical to manufacture and can readily be mounted, flip-chip style, on a printed circuit board.
摘要:
An den Zuleitungen (Z) eines integrierten Halbleiterchips, die eine Verbindung zu externen Anschlüssen einer Versorgungsspannung herstellen, können durch hoch getaktete Stromimpulse Potentialschwankungen bis hin zu Resonanzschwingungen an einem internen Anschluß der jeweiligen Zuleitung (Z) angeregt werden. Zur Dämpfung dieser Potentialschwankungen wird für eine oder mehrere Zuleitungen (Z) ein Widerstandswert (R D ) vorgegeben, der groß genug ist, diese Potentialschwankungen zu dämpfen, jedoch klein genug ist, um auf der jeweiligen Zuleitung (Z) nur einen vorgegebenen maximal zulässigen Spannungsabfall zu verursachen. Der jeweilige Widerstand (R D ) kann durch Verwendung eines Materials mit einem entsprechenden spezifischen Widerstand oder durch Verkleinerung des Leiterquerschnitts (q) mit einer Einkerbung (K) entlang der Zuleitung (Z) erzielt werden.
摘要:
A semiconductor integrated circuit comprises contact pads located over active components, which are positioned to minimize the distance for power delivery between a selected pad and one or more corresponding active components, to which the power is to be delivered. This minimum distance further enhances dissipation of thermal energy released by the active components. More specifically, a semiconductor integrated circuit comprises a laterally organized power transistor, an array of power supply contact pads distributed over the transistor, means for providing a distributed, predominantly vertical current flow from the contact pads to the transistor, and means for connecting a power source to each of the contact pads. Positioning the power supply contact pads directly over the active power transistor further saves precious silicon real estate area. The means for vertical current flow include contact pads made of a stack of metal layers comprising refractory metals for adhesion, copper and nickel as stress-absorbing metals, and gold or palladium as bondable and solderable outermost metals. The means for connecting a power source include wire bonding and solder ball interconnection.
摘要:
A driver IC chip (A) has a principal surface (10), in one corner area (11a) of which are provided first and second pads (3a, 3b) whose centers (Oa, Ob) are deviated from each other in the x and y directions. Since two wires can be extended from the first and second pads (3a, 3b), respectively, in any directions of x and y without bringing the wires close to each other, the short circuit between the wires is prevented.