摘要:
An electrical component provides a ceramic element located on or in a dielectric substrate between and in contact with a pair of electrical conductors, wherein the ceramic element includes one or more metal oxides having fluctuations in metal-oxide compositional uniformity less than or equal to 1.5 mol % throughout the ceramic element. A method of fabricating an electrical component, provides or forming a ceramic element between and in contact with a pair of electrical conductors on a substrate including depositing a mixture of metalorganic precursors and causing simultaneous decomposition of the metal oxide precursors to form the ceramic element including one or more metal oxides.
摘要:
A semiconductor package structure (300) comprises: a high-voltage depletion type semiconductor transistor (304) comprising a source electrode (306), a gate electrode (307) and a drain electrode (305); a low-voltage enhancement type semiconductor transistor (320) comprising a source electrode (308), a gate electrode (310) and a drain electrode (309); a shell (301) comprising a cavity (301-1), a high-voltage terminal (303), a first low-voltage terminal (330) and a second low-voltage terminal (331); and cascade circuits comprising a supporting sheet (302) having a conductive surface (302-1). The source electrode (306) of the high-voltage depletion type transistor (304) and the drain electrode (309) of the low-voltage enhancement type semiconductor transistor (320) are fixed to the conductive surface (302-1) of the supporting sheet (302) and electrically connected to each other. A side of the supporting sheet (302) away from the conductive surface (302-1) is fixed to the cavity (301-1) of the shell (301).
摘要:
A semiconductor integrated circuit device includes a chip main circuit and a damper. The chip main circuit is coupled to a power source and performs a predetermined function. The damper is coupled to an output terminal of the chip main circuit. The damper is coupled between the chip main circuit and a passive component for suppressing anti-resonance of the semiconductor integrated circuit device.
摘要:
In the case where a chip is made of wide band gap semiconductor, a power conversion apparatus is obtained in which a component having a low heat resistant temperature is prevented from receiving thermal damage by heat generated at the chip. In a configuration including: a chip portion (20) including a chip (21) made of wide band gap semiconductor and a member (22, 23) having a heat resistant temperature equal to or higher than that of the chip (21); and a peripheral component (25) arranged in the vicinity of the chip portion (20) and having a heat resistant temperature lower than that of the chip (21). The chip (21) and the peripheral component (25) are thermally insulated from each other so that the temperature of the peripheral component (25) does not exceed the heat resistant temperature of the peripheral component (25).
摘要:
An integrated circuit chip comprising: - a silicon substrate; - a first dielectric layer over said silicon substrate; - a metallization structure over said first dielectric layer, wherein said metallization structure comprises a first metal layer and a second metal layer over said first metal layer, wherein said metallization structure comprises electroplated gold; - a second dielectric layer between said first and second metal layers; - a separating layer over said metallization structure and over said first and second dielectric layers, wherein said separating layer comprises a nitride layer; and - a third metal layer over said separating layer, wherein said third metal layer comprises at least a portion, vertically over said separating layer, of an inductor, wherein said third metal layer comprises electroplated gold.
摘要:
Embodiments of a circuit for use with an inter-chip connection that has a variable complex impedance (which can be conductive, capacitive or both), a system that includes the circuit, and a communication technique are described. This inter-chip connection may be formed between a microspring or an anisotropic film and a metal connector on or proximate to a surface of a chip. Moreover, the circuit may mitigate signal distortion associated with the variable complex impedance. For example, the circuit may include an internal impedance that is electrically coupled in series with the metal connector, and that has an impedance which dominates the variable complex impedance over a range of operating frequencies. Separately or additionally, the circuit may be adapted to correct for the signal distortion.
摘要:
Semiconductor component or device is provided which includes a current barrier element and for which the impedance may be tuned (i.e. modified, changed, etc.) using a focused heating source.
摘要:
In one embodiment, the invention includes first (104) and second (118) transmission lines fabricated in a redistribution layer over a semiconductor die (100). The first transmission line (104) has a first distance from a first ground return path formed in a first metal level. The first transmission line (104) has a first impedance corresponding to the first distance. In other words, the impedance of the first transmission line (104) is affected by the distance between the first transmission line (104) and the first ground return path. Similar to the first transmission line (104) , the second transmission line (118) has a second distance from a second ground return path formed in a second metal level. The second transmission line (118) has a second impedance corresponding to the second distance. In other words, the impedance of the second transmission line (118) is affected by the distance between the second transmission line (118) and the second ground return path.
摘要:
An den Zuleitungen (Z) eines integrierten Halbleiterchips, die eine Verbindung zu externen Anschlüssen einer Versorgungsspannung herstellen, können durch hoch getaktete Stromimpulse Potentialschwankungen bis hin zu Resonanzschwingungen an einem internen Anschluß der jeweiligen Zuleitung (Z) angeregt werden. Zur Dämpfung dieser Potentialschwankungen wird für eine oder mehrere Zuleitungen (Z) ein Widerstandswert (R D ) vorgegeben, der groß genug ist, diese Potentialschwankungen zu dämpfen, jedoch klein genug ist, um auf der jeweiligen Zuleitung (Z) nur einen vorgegebenen maximal zulässigen Spannungsabfall zu verursachen. Der jeweilige Widerstand (R D ) kann durch Verwendung eines Materials mit einem entsprechenden spezifischen Widerstand oder durch Verkleinerung des Leiterquerschnitts (q) mit einer Einkerbung (K) entlang der Zuleitung (Z) erzielt werden.