摘要:
In accordance with particular embodiments, a method for packaging an incident radiation detector includes depositing an opaque solder resistant material on a first surface of a transparent lid substrate configured to cover at least one detector. The method also includes forming at least one cavity in the lid substrate. The method further includes forming a first portion of at least one hermetic seal ring on the opaque solder resistant material. The first portion of each hermetic seal ring surrounds a perimeter of a corresponding cavity in the lid substrate. The method also includes aligning the first portion of the at least one hermetic seal ring with a second portion of the at least one hermetic seal ring. The method additionally includes bonding the first portion of the at least one hermetic seal ring with the second portion of the at least one hermetic seal ring with solder.
摘要:
A method of manufacturing a semiconductor die, comprising the steps of: (a) forming a plurality of separate amounts of silver nanoparticle paste on a top- side of a wafer (26) such that there is an amount of silver nanoparticle paste on a first aluminum pad (28) and such that there is no silver nanoparticle paste (29) on a second aluminum pad (27); and (b) sintering the amount of silver nanoparticle paste so that the amount of silver nanoparticle paste becomes a sintered silver structure disposed on the first aluminum pad (28) and so that the second aluminum pad (27) is not covered by any sintered silver layer.
摘要:
Microelectronic workpieces that have bump sites over bond-pads and methods of fabricating such bump sites. One embodiment of such a workpiece, for example, includes a substrate having a plurality of microelectronic dies comprising integrated circuitry and bond-pads, such as copper bond-pads, electrically coupled to the integrated circuitry. The workpiece further includes (a) a dielectric structure having a plurality of openings with sidewalls projecting from corresponding bond- pads, and (b) a plurality of caps over corresponding bond-pads. The individual caps can include a discrete portion of a barrier layer attached to the bond-pads and the sidewalls of the openings, and a discrete portion of a cap layer on the barrier layer. The caps are electrically isolated from each other and self-aligned with corresponding bond-pads without forming a mask layer over the cap layer.
摘要:
In one embodiment, the present invention includes an apparatus having a metal layer (110) with a pad (115) disposed above a substrate (100); and a cap (140) disposed above the metal layer having a first portion to provide for contact with a prove and a second portion to provide a bonding surface, and the cap is electrically coupled to the pad.
摘要:
An integrated circuit (50) has a wire bond pad (53). The wire bond pad (53) is formed on a passivation layer (18) over active circuitry (26) and/or electrical interconnect layers (24) of the integrated circuit (50). The wire bond pad (53) is connected to a plurality of final metal layer portions (51, 52). The plurality of final metal layer portions (51, 52) are formed in a final interconnect layer of the interconnect layers (24). In one embodiment, the bond pad (53) is formed from aluminum and the final metal layer pads are formed from copper. The wire bond pad (53) allows routing of conductors in a final metal layer (28) directly underlying the bond pad (53), thus allowing the surface area of the semiconductor die to be reduced.
摘要:
Bond pads (394, 106) and bond pad openings (62, 108) are formed such that the bond pad openings (62, 108) are asymmetric to the conductive sections (398, 106) of the bond pads (394, 106). If the bond pads are more likely to lift from the scribe line side of the bond pad (394, 106), the bond pad openings (62, 108) are formed such that the passivation layer (52) overlies more of the conductive section (398, 106) near the scribe line (40). If the bond pads (394, 106) are more likely to lift from the other side, the passivation layer (52) overlies more of the other side of the conductive section (398, 106). In addition to reducing the risk of lifting, contamination problems should also be reduced.
摘要:
In a semiconductor device 100 according to the present invention in which a semiconductor member 120 is stacked on a substrate 110, the semiconductor member 120 and the substrate 110 are bonded together by means of a semiconductor device bonding material 130 of which main component is zinc. Further, a coating layer to prevent diffusion of the semiconductor device bonding material 130 is provided on at least one of the surface of the substrate 110 and the surface of the semiconductor member 120. In addition, the coating layer 140 is configured such that a barrier layer 141 composed of nitride, carbide, or carbonitride and a protective layer 142 composed of a noble metal are stacked. Further, the nitride, the carbide, or the carbonitride composing the barrier layer 141 is selected so as to have free energy smaller than that of a material composing an insulating layer 111 provided in the substrate 110.
摘要:
A microelectronic assembly includes a first substrate having a surface and a first conductive element and a second substrate having a surface and a second conductive element. The assembly further includes an electrically conductive alloy mass joined to the first and second conductive elements. First and second materials of the alloy mass each have a melting point lower than a melting point of the alloy. A concentration of the first material varies in concentration from a relatively higher amount at a location disposed toward the first conductive element to a relatively lower amount toward the second conductive element, and a concentration of the second material varies in concentration from a relatively higher amount at a location disposed toward the second conductive element to a relatively lower amount toward the first conductive element.