公开(公告)号：EP1427030A3

公开(公告)日：2005-03-16

申请号：EP03027789.1

申请日：2003-12-03

Applicant: TDK Corporation

Inventor： Sasaki, Satoshi ,  Tachimoto, Kazushi ,  Homma, Mitsunao

IPC: H01L41/047

CPC classification number: H01G4/228 ,  H01F17/0013 ,  H01L41/0474 ,  H01L41/0475 ,  H05K1/115 ,  H05K2201/09827 ,  H05K2201/09854

Abstract: An electronic component such as a piezoelectric component, a chip capacitor, or a chip inductor, comprises a substrate (10) having a through hole (40) formed in a thickness direction thereof; and a conductor (31), disposed in the through hole, for electrically connecting one side of the substrate to the other side thereof. The through hole has a major axis diameter (D3) and a minor axis diameter (D4) on at least one of one side and the other side of the substrate.

Abstract translation: 诸如压电元件，片状电容器或芯片电感器的电子部件包括：基板（10），其具有沿其厚度方向形成的通孔（40）; 以及设置在所述通孔中的用于将所述基板的一侧电连接到所述基板的另一侧的导体（31）。 通孔在基板的一侧和另一侧中的至少一个上具有长轴直径（D3）和短轴直径（D4）。

公开(公告)号：EP1069617A3

公开(公告)日：2004-11-03

申请号：EP00114903.8

申请日：2000-07-14

Applicant: NEC CORPORATION

Inventor： Tanaka, Shinji

IPC: H01L23/538

CPC classification number: H05K1/114 ,  H01L23/5384 ,  H01L23/5386 ,  H01L2224/16225 ,  H01L2924/15312 ,  H05K1/0289 ,  H05K1/115 ,  H05K2201/09627 ,  H05K2201/09709 ,  H05K2201/09854 ,  H05K2201/10674

Abstract: A wiring layer on which X-directional signal lines 20 to 22 are arranged is formed on a multilayer board. Rectangular power-source conductive patterns 10c are arranged each in which via holes 120 are formed longitudinally or in the wiring direction of the X-directional signal lines 20 to 22. The area (batched with broken lines) acts as a wiring channel for the X-directional signal line 22.

公开(公告)号：EP1215948A2

公开(公告)日：2002-06-19

申请号：EP01129757.9

申请日：2001-12-13

Applicant: Denso Corporation

Inventor： Kondo, Koji ,  Kamiya, Tetsuaki ,  Harada, Toshikazu ,  Onoda, Ryuichi ,  Kamiya, Yasataka ,  Masuda, Gentaro ,  Yazaki, Yoshitaro ,  Yokochi, Tomohiro

IPC: H05K3/46

CPC classification number: H05K3/4638 ,  H05K3/0035 ,  H05K3/281 ,  H05K3/4069 ,  H05K3/4617 ,  H05K3/4632 ,  H05K2201/0129 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09245 ,  H05K2201/096 ,  H05K2201/09854 ,  H05K2203/063 ,  H05K2203/065 ,  H05K2203/1476 ,  H05K2203/1572 ,  Y10T156/1064

Abstract: Single-sided conductor patterned films 21 are prepared, each of which has a conductor pattern 22 formed only one side of a resin film 23 and via hole 24 filled with conductive paste 50. A single-sided conductor patterned film 31 which has a conductor pattern 22 formed only one side of a resin film 23 and an opening formed in the resin film 23 so as to expose an electrode 32 is laminated on the single-sided conductor patterned films 21. Moreover, a cover layer with an opening to expose an electrode 37 is laminated on a bottom surface of the single-sided conductor patterned films 21 to form a laminate. Then, by pressing the laminate while heating, a multilayer substrate 100 having the electrodes at both sides thereof can be produced.

Abstract translation: 制备单面导体图案化膜21，每个导体图案膜具有仅形成在树脂膜23的一侧上的导体图案22和填充有导电膏50的通孔24.具有导体图案的单面导体图案化膜31 22，仅形成树脂膜23的一侧，并且形成在树脂膜23中以露出电极32的开口层压在单面导体图案化膜21上。而且，具有露出电极的开口的覆盖层 37层压在单面导体图案化膜21的底表面上以形成层压体。 然后，通过在加热的同时按压层压体，可以制造在其两侧具有电极的多层基板100。

公开(公告)号：EP0910163A1

公开(公告)日：1999-04-21

申请号：EP98306825.5

申请日：1998-08-26

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Uno, Masao

IPC: H03B1/04

CPC classification number: H05K5/0095 ,  H05K1/0243 ,  H05K3/0052 ,  H05K3/3442 ,  H05K3/403 ,  H05K3/42 ,  H05K9/0022 ,  H05K2201/09181 ,  H05K2201/09854 ,  H05K2201/10075 ,  H05K2201/10371

Abstract: An oscillator includes a multi-layered base (101). Circuit patterns (102) are formed on a first main surface and the inside of the multi-layered base (101). Holes (104) through which wiring patterns of the individual layers of the base (101) are connected are formed within the multi-layered base (101). Electronic components (103) are mounted on the first main surface of the multi-layered base (101). First and second reverse electrodes (106, 107), which serve as external terminals to be connected to an external source, are formed on a second main surface of the multi-layered base (101). The first reverse electrode (106) serves as a ground electrode, and the second reverse electrodes (107) serve as terminal electrodes. The reverse electrodes (106, 107) are electrically connected to the circuit patterns (102) via the holes (104). The reverse electrodes (106, 107) are located farther inward than the lateral surfaces of the multi-layered base (101). A shield cover (108) is placed to tightly cover the first main surface of the multi-layered base (101). It is thus possible to provide a miniaturized, less expensive, and easy-to-mount oscillator module in which unwanted radiation characteristics are improved.

Abstract translation: 振荡器包括多层基座（101）。 电路图案（102）形成在第一主表面和多层基底（101）的内部。 在多层基座（101）内形成有连接基座（101）的各层的布线图案的孔（104）。 电子部件（103）安装在多层基板（101）的第一主面上。 用作连接到外部源的外部端子的第一和第二反向电极（106,107）形成在多层基座（101）的第二主表面上。 第一反向电极（106）用作接地电极，第二反向电极（107）用作端子电极。 反向电极（106,107）经由孔（104）电连接到电路图案（102）。 反向电极（106,107）位于比多层基座（101）的侧面更靠内侧。 放置屏蔽罩（108）以紧密地覆盖多层基座（101）的第一主表面。 因此，可以提供一种小型化，便宜且易于安装的振荡器模块，其中不期望的辐射特性得到改善。

公开(公告)号：EP0690461B1

公开(公告)日：1998-09-09

申请号：EP95304325.4

申请日：1995-06-21

Applicant: AT&T Corp.

Inventor： Fleming, Debra Anne ,  Johnson Jr.,David Wilfred ,  Lambrecht Jr.,Vincent George ,  Law, Henry Hon ,  Liptack, David Joseph ,  Roy, Apurba ,  Thomson Jr.,John

IPC: H01F17/00 ,  H01F41/04

CPC classification number: H01F17/0033 ,  H01F41/046 ,  H01F2017/004 ,  H01L21/486 ,  H05K1/0306 ,  H05K1/092 ,  H05K1/115 ,  H05K3/005 ,  H05K3/245 ,  H05K3/403 ,  H05K3/4061 ,  H05K2201/09645 ,  H05K2201/09854 ,  H05K2203/1476 ,  Y10T29/4902 ,  Y10T29/49076 ,  Y10T29/49165

公开(公告)号：EP0678917A1

公开(公告)日：1995-10-25

申请号：EP95105834.6

申请日：1995-04-19

Applicant: NEC CORPORATION

Inventor： Shimada, Yuzo ,  Suyama, Takayuki ,  Tanaka, Yoshimasa

IPC: H01L23/433 ,  H01L23/40 ,  H01L23/498

CPC classification number: H01L21/486 ,  H01L23/4006 ,  H01L23/49572 ,  H01L23/4985 ,  H01L24/50 ,  H01L2023/4043 ,  H01L2023/4056 ,  H01L2023/4062 ,  H01L2023/4087 ,  H01L2224/73253 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15787 ,  H05K1/0201 ,  H05K3/301 ,  H05K3/3457 ,  H05K3/363 ,  H05K2201/062 ,  H05K2201/09827 ,  H05K2201/09854 ,  H05K2201/10568 ,  H05K2201/10666 ,  H05K2201/10681 ,  H01L2924/00

Abstract: An electronic package according to the present invention comprises a supporting member, an electronic device, a carrier, a substrate and cooling means. The supporting member includes a plate and a bottom leg for supporting the plate. A first end of the bottom leg is joined to the lower surface of the plate. The carrier has a hole for receiving the bottom leg. The electronic device is connected to the carrier and is attached to the lower surface of the plate. A second end of the bottom leg is inserted into the hole of the carrier. The second end of the bottom leg is joined to the upper surface of the substrate. The electronic device is positioned between the plate of the supporting member and the substrate. The cooling means is attached onto and supported by the upper surface of the plate.

Abstract translation: 根据本发明的电子封装包括电子设备的支撑构件，一个载体，冷却基板和手段。 所述支撑构件包括一板和用于支撑所述板的底腿。 底部腿的第一端被连接到所述板的下表面上。 该载体具有用于接收底部腿的孔，所述电子装置被连接到所述载体和附着于所述板的下表面上。 底部腿的第二端被插入到载体的孔中。 底部腿的第二端部被接合到基片的上表面上。 所述电子设备被所述支撑构件和所述基片的板之间的位置。 冷却装置被附接到并通过所述板的上表面支撑。

公开(公告)号：EP0656171A1

公开(公告)日：1995-06-07

申请号：EP94919523.0

申请日：1994-06-15

Applicant: NORTHERN TELECOM LIMITED

Inventor： MARX, Dieter, Otto ,  WONG, Larry, Kum-Cheong

IPC: H05K1 ,  H05K3 ,  H05K9

CPC classification number: H05K3/403 ,  H05K1/0218 ,  H05K3/0052 ,  H05K3/429 ,  H05K9/0039 ,  H05K2201/0715 ,  H05K2201/09854 ,  Y10T29/49016 ,  Y10T29/49126 ,  Y10T29/49155

Abstract: A multiple layer printed circuit board (60) and a method of manufacturing multiple layer printed circuit boards (60) which incorporate integral edge shielding in combination with top and bottom shielding to effectively provide a sandwich arrangement within a Faraday Cage. Electromagnetic emissions radiating from an outside surface of either the top or bottom shielding layer are substantially reduced. In one structure, a multiple layer printed circuit board having a sandwich arrangement which includes at least one inner conductive layer (70) for providing a ground plane disposed between the outer shielding layers, the inner conductive layer (70) being electrically connected directly to the edge shielding means and hence to the outer conductive layers (20, 22). The larger and more continuous surface area provided by the direct connection to the edge shielding effectively provides an electrical connection having a low inductance and hence in operation results in all ground planes having a more constant non-varying potential.

公开(公告)号：EP0149923A3

公开(公告)日：1986-12-10

申请号：EP84309089

申请日：1984-12-27

Applicant: THE JADE CORPORATION

Inventor： Spadafora, Vincent A.

IPC: H01L21/48 ,  H01L23/48

CPC classification number: H05K3/403 ,  H01L21/4853 ,  H01L23/49805 ,  H01L24/45 ,  H01L24/97 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15787 ,  H05K1/092 ,  H05K3/0052 ,  H05K3/328 ,  H05K3/4061 ,  H05K3/42 ,  H05K2201/09181 ,  H05K2201/09854 ,  H05K2201/10946 ,  Y10T29/49121 ,  Y10T29/49139 ,  Y10T29/49142 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49165 ,  Y10T156/1056 ,  H01L2224/48 ,  H01L2924/00

Abstract: Individual ceramic substrates for electronic microcircuits are formed in an array having rectangular perforations (118) which define score lines (12) along which the array is broken to yield the individual substrates. The surfaces of the rectangular perforations are metallised and leads are attached thereto by thermocompression bonding after the array is broken. The rectangular perforations result in semi-rectangular openings around the periphery of the individual substrates. This eliminates tensile forces which cause cracking of the substrate during lead bonding.

公开(公告)号：EP2519087B1

公开(公告)日：2018-12-26

申请号：EP12165906.4

申请日：2012-04-27

Applicant: CSEM Centre Suisse d'Electronique et de Microtechnique SA - Recherche et Développement

Inventor： Cardot, Francis ,  Solignac, Dominique ,  Jeanneret, Sylvain

IPC: H05K1/11 ,  H05K3/42 ,  H05K1/14 ,  H05K5/02 ,  H05K3/46 ,  H05K3/00 ,  H05K3/26 ,  H05K3/40

CPC classification number: H05K1/115 ,  H05K3/0017 ,  H05K3/4061 ,  H05K3/42 ,  H05K2201/041 ,  H05K2201/068 ,  H05K2201/09563 ,  H05K2201/09827 ,  H05K2201/09854 ,  H05K2201/10378 ,  H05K2203/025 ,  H05K2203/1572

公开(公告)号：EP3407685A1

公开(公告)日：2018-11-28

申请号：EP16886232.4

申请日：2016-12-27

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： MORITA, Yosuke

IPC: H05K1/02

CPC classification number: H05K1/0284 ,  H05K2201/047 ,  H05K2201/09827 ,  H05K2201/09845 ,  H05K2201/09854 ,  H05K2201/2072

Abstract: A circuit board includes a main body section, a wiring pattern, and a through-hole. The wiring pattern is disposed on a surface of the main body section. The through-hole is formed in a site of the main body section. The site is provided with the wiring pattern. The through-hole has a first end and a second end. The wiring pattern includes a first surface wiring pattern and an inner surface wiring pattern. The first surface wiring pattern is formed on the surface of the main body section adjacent to the first end. The inner surface wiring pattern is connected to the first surface wiring pattern and formed on an inner surface of the through-hole. The through-hole includes a smallest section between the first end and the second end in a passing-through direction. The smallest section is smallest in area of a cross section perpendicular to the passing-through direction of the through-hole. The inner surface wiring pattern is provided from the first end to a position beyond the smallest section.