摘要:
A microcap wafer-level package [10] is provided in which a micro device [14] is connected to bonding pads [16, 18] on a base wafer [12]. A peripheral pad [20] on the base wafer [12] encompasses the bonding pads [16, 18] and the micro device [14]]. A cap wafer [24] has gaskets [22, 34, 36] formed thereon using a thick photoresist semiconductor photolithographic process. Bonding pad gaskets [34, 36] match the perimeters of the bonding pads and a peripheral pad gasket [22] matches the peripheral pad [20] on the base wafer [12]. Wells [56, 58] are located inside the perimeters of the bond pad gaskets [34, 36] and are formed to a predetermined depth in the cap wafer [24]. The cap wafer [24] is then placed over the base wafer [12] to cold weld bond the gaskets [22, 34, 36] to the pads [20, 16, 18] and form a hermetically sealed volume [25] between the bonding pad gaskets [34, 36] and the peripheral pad gasket [22]. The cap wafer [24] is then thinned below the predetermined depth until the wells [56, 58] become through holes [26, 28 ] that provide access to the bonding pads [16, 18] inside the package [10], but outside the hermetically sealed volume [25], for connecting wires [30, 32] from a micro device [14] utilizing system.
摘要:
A semiconductor die has a bonding pad for a MOSFET such as a power MOSFET and a separate bonding pad for ESD protection circuitry. Connecting the bonding pads together makes the ESD protection circuitry functional to protect the MOSFET. Before connecting the bonding pads together, the ESD protection circuitry and/or the MOSFET can be separately tested. A voltage higher than functioning ESD protection circuitry would permit can be used when testing the MOSFET. A packaging process such as wire bonding or attaching the die to a substrate in a flip-chip package can connect the bonding pads after testing.
摘要:
A microcap wafer-level package [10] is provided in which a micro device [14] is connected to bonding pads [16, 18] on a base wafer [12]. A peripheral pad [20] on the base wafer [12] encompasses the bonding pads [16, 18] and the micro device [14]. A cap wafer [24] is processed to form wells [40, 42] of a predetermined depth in the cap wafer [24]. A conductive material [27, 29] is made integral with the walls [46, 47] of the wells [40, 42] in the cap wafer [24]. The cap wafer [24] has contacts [30,32] and a peripheral gasket [22] formed thereon where the contacts [30,32] are capable of being aligned with the bonding pads [16, 18] on the base wafer [12], and the gasket [22] matches the peripheral pad [20] on the base wafer [12]. The cap wafer [24] is then placed over the base wafer [12] so as to bond the contacts [30, 32] and gasket [22] to the pads [16, 18, 20] and form a hermetically sealed volume [25] within the peripheral gasket [22]. The cap wafer [24] is thinned to form a "microcap" [24]. The microcap [24] is thinned below the predetermined depth until the conductive material [27, 29] is exposed to become conductive vias [26, 28] through the cap wafer [24] to outside the hermetically sealed volume [25].
摘要:
A microcap wafer-level package [10] is provided in which a micro device [14] is connected to bonding pads [16, 18] on a base wafer [12]. A peripheral pad [20] on the base wafer [12] encompasses the bonding pads [16, 18] and the micro device [14]. A cap wafer [24] is processed to form wells [40, 42] of a predetermined depth in the cap wafer [24]. A conductive material [27, 29] is made integral with the walls [46, 47] of the wells [40, 42] in the cap wafer [24]. The cap wafer [24] has contacts [30,32] and a peripheral gasket [22] formed thereon where the contacts [30,32] are capable of being aligned with the bonding pads [16, 18] on the base wafer [12], and the gasket [22] matches the peripheral pad [20] on the base wafer [12]. The cap wafer [24] is then placed over the base wafer [12] so as to bond the contacts [30, 32] and gasket [22] to the pads [16, 18, 20] and form a hermetically sealed volume [25] within the peripheral gasket [22]. The cap wafer [24] is thinned to form a "microcap" [24]. The microcap [24] is thinned below the predetermined depth until the conductive material [27, 29] is exposed to become conductive vias [26, 28] through the cap wafer [24] to outside the hermetically sealed volume [25].
摘要:
Halbleiter-Gassensor auf der Basis eines integrierten Feldeffekttransistors mit einen Halbleiterkörper mit einer an der Oberfläche des Halbleiterkörpers ausgebildeten Passivierungsschicht, der eine durch einen Spalt von einen Kanalbereich getrennte gassensitive Steuerelektrode aufweist und als Suspended Gate Feldeffekttransistor (SGFET) ausgebildet ist, oder die Steuerelektrode als eine erste Platte eines Kondensators mit Spalt angeordnet ist und eine zweite Platte des Kondensators mit einem Gate des als Capacitve Controlled ausgebildeten Feldeffekttransistors (CCFET) verbunden ist, und die Steuerelektrode eine Halbleiter-Trägerschicht mit einer aufliegenden Haftvermittlerschicht und einer auf der Haftvermittlerschicht aufliegenden gassensitiven Schicht aufweist, und mit einem Referenzpotential verschaltet ist, und die Oberfläche der gassensitiven Schicht dem Kanalbereich oder der zweiten Platte zugewandt ist, und ein Stützgebiet mit einer ersten Tragstruktur mit einem ersten Auflagebereich und einer zweiten Tragstruktur mit einem zweiten Auflagebereich vorgesehen ist, wobei auf der Oberfläche des Halbleiterkörpers ein Anschlussgebiet vorgesehen ist und das Stützgebiet innerhalb des Anschlussgebletes angeordnet ist, und das Anschlussgeblet einen ersten Anschlussberelch und einen zweiten Anschlussbereich aufweist und der erste Anschlussbereich mit der Steuerelektrode mittels eines ersten Verbindungsmittels eine elektrische Verbindung und eine kraftschlüssige Verbindung aufweist und der zweiten Anschlussbereich mit der Steuerelektrode mittels eines zweiten Verbindungsmittels wenigstens eine kraftschlüssige Verbindung aufweist.
摘要:
Methods of producing a solder bump are presented. Preferred methods lack a requirement for photoresist processing or masking a target substrate. Contemplated methods include forming a well around one or more bond pads on a wafer where the walls of the well are formed by a passivation layer material. Contact material can comprise a solder paste or an under bump metallization layer, which can be placed within the wells as a contact bed for solder balls. A priori prepared solder balls, in solid form or in molten form, can deposited on the contact material to produce the solder bump.
摘要:
A semiconductor die has a bonding pad for a MOSFET such as a power MOSFET and a separate bonding pad for ESD protection circuitry. Connecting the bonding pads together makes the ESD protection circuitry functional to protect the MOSFET. Before connecting the bonding pads together, the ESD protection circuitry and/or the MOSFET can be separately tested. A voltage higher than functioning ESD protection circuitry would permit can be used when testing the MOSFET. A packaging process such as wire bonding or attaching the die to a substrate in a flip-chip package can connect the bonding pads after testing.