摘要:
The invention relates to an electronic system comprising: - an integrated circuit die (10') having: • at least 2 bond pads (20, 37) • a redistribution layer, said redistribution layer having: - at least a solder pad (19') comprising 2 portions (33, 34) arranged to enable an electrical connection between each other by a same solder ball placed on said solder pad (19'), but electrically isolated of each other in the absence of a solder ball on the solder pad (19') - at least 2 redistribution wires (22, 23, 39), each one connecting one of the 2 portions (33, 34) to one of the 2 bond pads (20, 37),
a second bond pad (37) connected via a second redistribution wire (39) to a second portion (34) of the solder pad (19') being dedicated to testing said integrated circuit die (10') - a grounded printed circuit board track (24), a solder ball (35) being placed between the solder pad (19') and the printed circuit board track (24).
摘要:
The semiconductor device comprises a semiconductor substrate (10) with a metallization (111) having an upper terminal layer (22) located at a front side (20) of the substrate. The metallization forms a through-substrate via (23) from the upper terminal layer to a rear terminal layer (13) located opposite to the front side at a rear side (21) of the substrate. The through-substrate via comprises a void (101), which may be filled with air or another gas and forms an annular cavity surrounding a pillar (105). A solder ball (100) closes the void without completely filling it. A variety of interconnections for threedimensional integration is offered by this scheme.
摘要:
The semiconductor device comprises a semiconductor substrate (10) with a metallization (111) having an upper terminal layer (22) located at a front side (20) of the substrate. The metallization forms a through-substrate via (23) from the upper terminal layer to a rear terminal layer (13) located opposite to the front side at a rear side (21) of the substrate. The through-substrate via comprises a void (101), which may be filled with air or another gas. A solder ball (100) closes the void without completely filling it. A variety of interconnections for threedimensional integration is offered by this scheme.
摘要:
The present invention relates to a method for preparing three-dimensional actin structures having a well-defined shape and displaying improve mechanical rigidity. This method comprises the steps of (a) providing a polymerization solution comprising actin monomers, a branching agent and a capping agent, (b) providing at least one surface having thereon a pattern which is coated with a nucleating agent, and (c) contacting the at least one surface of step (b) with the polymerization solution of step (a) so as to induce the polymerization of actin and obtain the said desired three-dimensional actin structure. Applications of the present invention in various technological fields such as microelectronics are also provided.
摘要:
A method (100) of protecting through-substrate via (TSV) die from bonding damage includes providing a substrate including a plurality of TSV die having a topside including active circuitry, a bottomside, and a plurality of TSVs that include an inner metal core that reaches from the topside to protruding TSV tips that extend out from the bottomside (101). A protective layer is formed on or applied to the bottomside of the TSV die including between and over the protruding TSV tips (102). The TSV die is bonded with its topside down onto a workpiece having a workpiece surface and its bottomside up and in contact with a bond head (104). The protective layer reduces damage from the bonding process including warpage of the TSV die by preventing the bond head from making direct contact to the protruding TSV tips.
摘要:
A semiconductor power chip has a semiconductor power device formed on a semiconductor die; wherein the semiconductor power device comprises an array of conductive contact elements; a passivation layer formed over the plurality of conductive contact elements, the passivation layer comprising passivation openings over a plurality of the conductive contact elements; and an array of conductive bumps including one or more interconnection bumps, wherein each interconnection bump is formed over the passivation layer and extends into at least two of the passivation openings and into contact with at least two underlying conductive contact elements to thereby provide a conductive coupling between the at least two underlying conductive contact elements.
摘要:
The semiconductor device comprises a semiconductor substrate (10) with a metallization (111) having an upper terminal layer (22) located at a front side (20) of the substrate. The metallization forms a through-substrate via (23) from the upper terminal layer to a rear terminal layer (13) located opposite to the front side at a rear side (21) of the substrate. The through-substrate via comprises a void (101), which may be filled with air or another gas. A solder ball (100) closes the void without completely filling it. A variety of interconnections for threedimensional integration is offered by this scheme.