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公开(公告)号：EP2539933A1
公开(公告)日：2013-01-02
申请号：EP11708699.1
申请日：2011-02-22
申请人： Interposers GmbH
发明人： Jakob, Andreas , Kaiser, Thomas
IPC分类号： H01L25/065 , H01L23/538 , H01L21/48
CPC分类号： H01L24/14 , H01L21/4867 , H01L23/538 , H01L24/11 , H01L24/81 , H01L25/0657 , H01L25/50 , H01L2224/11318 , H01L2224/48463 , H01L2225/0651 , H01L2225/06513 , H01L2225/06527 , H01L2225/06568 , H01L2225/06572 , H01L2924/01029 , H01L2924/01047 , H01L2924/01079 , H01L2924/14 , H01L2924/1461 , H01L2924/00
摘要： In a method for producing a semiconductor module (10) comprising at least two semiconductor chips (12, 14) and an interposer (20), which has electrically conductive structures (28) that connect the semiconductor chips (12, 14) to each other, the interposer (20) is imprinted directly on a first (12) one of the semiconductor chips. Upon imprinting the interposer (20), the electrically conductive structures (28) are generated by means of electrically conductive ink (68). The second semiconductor chip (14) is installed on the interposer (20) such that the two semiconductor chips (12, 14) are arranged on top of each other and the interposer (20) forms an intermediate layer between the two semiconductor chips (12, 14).
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公开(公告)号：EP3355342A1
公开(公告)日：2018-08-01
申请号：EP17153476.1
申请日：2017-01-27
IPC分类号： H01L21/60
CPC分类号： H01L24/81 , H01L24/11 , H01L24/92 , H01L27/14636 , H01L27/14661 , H01L27/1469 , H01L31/0256 , H01L2224/0401 , H01L2224/05569 , H01L2224/11312 , H01L2224/11318 , H01L2224/131 , H01L2224/13111 , H01L2224/1403 , H01L2224/14181 , H01L2224/16145 , H01L2224/16227 , H01L2224/81191 , H01L2224/81192 , H01L2224/81201 , H01L2224/81224 , H01L2224/81815 , H01L2224/81986 , H01L2224/9202 , H01L2924/014 , H01L2224/11 , H01L2924/01082 , H01L2924/00014
摘要： In an embodiment, a method comprises: configuring a direct conversion compound semiconductor sensor over a first surface of a readout integrated circuit, IC, comprising two surfaces, each surface comprising solder material on the surface; illuminating the solder material with an infra-red laser such that the solder material on the readout IC melts and forms solder joints between the readout IC and the direct conversion compound semiconductor sensor; configuring a substrate over a second surface of the readout IC comprising solder material; and illuminating the solder material of the second surface with the infra-red laser such that the solder material on the readout IC melts and electrically connects the readout IC with the substrate. In other embodiments, a high frequency radiation detector and an imaging apparatus are discussed.
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3.发明公开CONDUCTIVE PASTE FOR DIE BONDING, AND DIE BONDING METHOD USING CONDUCTIVE PASTE FOR DIE BONDING 审中-公开导电膏芯片安装和芯片安装方法使用芯片安装导电膏
公开(公告)号：EP2833393A1
公开(公告)日：2015-02-04
申请号：EP13767655.7
申请日：2013-03-21
CPC分类号： H01L24/83 , B22F1/0074 , B22F1/025 , B23K1/203 , B23K35/0222 , B23K35/0244 , B23K35/025 , B23K35/226 , B23K35/3006 , B23K35/3013 , B23K35/302 , B23K35/322 , B23K2201/40 , H01B1/22 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/81 , H01L2224/0401 , H01L2224/04026 , H01L2224/05082 , H01L2224/05166 , H01L2224/05169 , H01L2224/05644 , H01L2224/11312 , H01L2224/11318 , H01L2224/1132 , H01L2224/11416 , H01L2224/13294 , H01L2224/13339 , H01L2224/13347 , H01L2224/13364 , H01L2224/13444 , H01L2224/16227 , H01L2224/27312 , H01L2224/27318 , H01L2224/2732 , H01L2224/27416 , H01L2224/29294 , H01L2224/29339 , H01L2224/29347 , H01L2224/29364 , H01L2224/29444 , H01L2224/32225 , H01L2224/81192 , H01L2224/81203 , H01L2224/81444 , H01L2224/8184 , H01L2224/83192 , H01L2224/83203 , H01L2224/83444 , H01L2224/8384 , H01L2924/01029 , H01L2924/01046 , H01L2924/01047 , H01L2924/01079 , H01L2924/01203 , H01L2924/014 , H01L2924/10253 , H01L2924/15747 , H01L2924/351 , H01L2924/00 , H01L2924/00014 , H01L2924/00012
摘要： The present invention provides a conductive paste for die bonding comprising a metal powder and an organic solvent, the metal powder comprising: one or more metal particles selected from a silver powder, a palladium powder, and a copper powder, the metal particles having a purity of 99.9% by mass or higher and an average particle size of 0.01 µm to 1.0 µm; and a coating layer made of gold covering at least part of the metal particles. The conductive paste according to the present invention can suppress the occurrence of defects such as voids in a bonded part when a semiconductor element or the like is die-bonded to a substrate.
摘要翻译： 本发明提供的导电性糊的芯片接合包括金属粉末和溶剂的有机，金属粉末，其包括：一个或由银粉末，钯粉末，和铜粉选择多种金属颗粒，具有纯度金属粒子 的质量或更高，上的0点01微米的平均颗粒尺寸为1.0微米的99.9％; 和涂膜层由金制成的覆盖所述金属颗粒的至少一部分。 导电膏gemäß到本发明可以抑制缺陷的发生：例如在接合部的空隙当半导体元件等被管芯键合到基材上。
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公开(公告)号：EP2822033B1
公开(公告)日：2017-11-29
申请号：EP14172469.0
申请日：2014-06-16
发明人： Hamada, Yoshitaka
CPC分类号： H05K1/095 , H01L24/11 , H01L24/13 , H01L24/75 , H01L24/81 , H01L24/98 , H01L25/0657 , H01L25/50 , H01L2224/11318 , H01L2224/1132 , H01L2224/11848 , H01L2224/119 , H01L2224/11901 , H01L2224/13082 , H01L2224/131 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13291 , H01L2224/13339 , H01L2224/13344 , H01L2224/13347 , H01L2224/13387 , H01L2224/1339 , H01L2224/13393 , H01L2224/13439 , H01L2224/13444 , H01L2224/13447 , H01L2224/16148 , H01L2224/16238 , H01L2224/75251 , H01L2224/75272 , H01L2224/81193 , H01L2224/8121 , H01L2224/81862 , H01L2224/9212 , H01L2225/06513 , H01L2924/12042 , H01L2924/351 , H05K1/0306 , H05K3/225 , H05K3/368 , H01L2924/00 , H01L2924/00014 , H01L2924/01006 , H01L2924/0542 , H01L2924/0103 , H01L2924/0544 , H01L2924/0105 , H01L2924/053 , H01L2924/01051 , H01L2924/0549 , H01L2924/04642 , H01L2924/00012 , H01L2924/014
摘要： A conductive circuit is formed using a substantially solvent-free, liquid, addition curable, conductive circuit-forming ink composition comprising (A) an organopolysiloxane having at least two silicon-bonded alkenyl groups, (B) an organohydrogenpolysiloxane having at least two SiH groups, (C) conductive particles, (D) a thixotropic agent, and (E) a hydrosilylation catalyst. The ink composition is printed on a metal electrode to form a green circuit pattern layer, which is fired and cured for thereby forming a conductive circuit and bonding the conductive circuit to the metal electrode.
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5.发明公开
公开(公告)号：EP3187299A1
公开(公告)日：2017-07-05
申请号：EP14900789.0
申请日：2014-08-29
CPC分类号： B23K35/0244 , B22F1/02 , B22F2999/00 , B23K35/26 , B23K35/262 , B23K35/365 , C22C13/00 , C23C8/10 , C23C8/36 , C23C28/04 , H01L24/11 , H01L24/13 , H01L2224/11318 , H01L2224/1182 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/1312 , H01L2224/13139 , H01L2224/13147 , H01L2224/13155 , H01L2224/13157 , H01L2224/1316 , H01L2224/13561 , H01L2224/13687 , H01L2924/0105 , H01L2924/014 , H01L2924/0544 , C22C1/0483
摘要： Provided is a solder material which enables a growth of an oxide film to be inhibited. A solder ball 1A which is a solder material is composed of a solder layer 2 and a covering layer 3 covering the solder layer 2. The solder layer 2 is spherical and is composed of a metal material containing an alloy including Sn content of 40% and more. Otherwise the solder layer 2 is composed of a metal material including Sn content of 100%. In the covering layer 3, a S n O film 3a is formed outside the solder layer 2, and a S n O 2 film 3b is formed outside the S n O film 3a. A thickness of the covering layer 3 is preferably more than 0nm and equal to or less than 4.5nm. Additionally, a yellow chromaticity of the solder ball 1A is preferably equal to or less than 5.7.
摘要翻译： 提供一种能够抑制氧化膜生长的焊料。 作为焊接材料的焊球1A由焊料层2和覆盖焊料层2的覆盖层3构成。焊料层2是球形并且由含有40％的Sn含量的合金和 更多。 另外，焊料层2由包含100％的Sn含量的金属材料构成。 在覆盖层3中，在焊料层2的外侧形成SnO膜3a，在SnO膜3a的外侧形成SnO2膜3b。 覆盖层3的厚度优选大于0nm并且等于或小于4.5nm。 另外，焊球1A的黄色色度优选等于或小于5.7。
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6.发明公开CONDUCTIVE PASTE FOR DIE BONDING, AND DIE BONDING METHOD USING CONDUCTIVE PASTE FOR DIE BONDING 审中-公开导电膏芯片安装和芯片安装方法使用芯片安装导电膏
公开(公告)号：EP2833393A4
公开(公告)日：2015-12-09
申请号：EP13767655
申请日：2013-03-21
IPC分类号： H01L23/488 , B22F1/02 , B23K35/22 , B23K35/30 , B23K35/32 , H01L21/60 , H01L23/485
CPC分类号： H01L24/83 , B22F1/0074 , B22F1/025 , B23K1/203 , B23K35/0222 , B23K35/0244 , B23K35/025 , B23K35/226 , B23K35/3006 , B23K35/3013 , B23K35/302 , B23K35/322 , B23K2201/40 , H01B1/22 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/81 , H01L2224/0401 , H01L2224/04026 , H01L2224/05082 , H01L2224/05166 , H01L2224/05169 , H01L2224/05644 , H01L2224/11312 , H01L2224/11318 , H01L2224/1132 , H01L2224/11416 , H01L2224/13294 , H01L2224/13339 , H01L2224/13347 , H01L2224/13364 , H01L2224/13444 , H01L2224/16227 , H01L2224/27312 , H01L2224/27318 , H01L2224/2732 , H01L2224/27416 , H01L2224/29294 , H01L2224/29339 , H01L2224/29347 , H01L2224/29364 , H01L2224/29444 , H01L2224/32225 , H01L2224/81192 , H01L2224/81203 , H01L2224/81444 , H01L2224/8184 , H01L2224/83192 , H01L2224/83203 , H01L2224/83444 , H01L2224/8384 , H01L2924/01029 , H01L2924/01046 , H01L2924/01047 , H01L2924/01079 , H01L2924/01203 , H01L2924/014 , H01L2924/10253 , H01L2924/15747 , H01L2924/351 , H01L2924/00 , H01L2924/00014 , H01L2924/00012
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7.发明公开METHOD FOR PRODUCING ELECTRONIC COMPONENT MODULE AND ELECTRONIC COMPONENT MODULE 审中-公开和方法用于制造电子元件模块，电子组件模块
公开(公告)号：EP2704185A4
公开(公告)日：2014-10-29
申请号：EP12775989
申请日：2012-04-05
发明人： KIYONO SHINYA , SATAKE YOSHIAKI
IPC分类号： H01L21/60 , H01L23/12 , H01L23/498
CPC分类号： H01L24/17 , H01L21/4853 , H01L23/3142 , H01L23/49811 , H01L23/49816 , H01L23/49838 , H01L23/4985 , H01L24/06 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/81 , H01L2224/0401 , H01L2224/05124 , H01L2224/05553 , H01L2224/05568 , H01L2224/05624 , H01L2224/11312 , H01L2224/11318 , H01L2224/1134 , H01L2224/1146 , H01L2224/11505 , H01L2224/11515 , H01L2224/13017 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/1411 , H01L2224/16052 , H01L2224/16058 , H01L2224/16105 , H01L2224/16225 , H01L2224/16227 , H01L2224/16238 , H01L2224/1703 , H01L2224/17104 , H01L2224/17107 , H01L2224/73204 , H01L2224/8112 , H01L2224/8114 , H01L2224/81193 , H01L2224/81194 , H01L2224/81203 , H01L2224/81439 , H01L2924/00014 , H01L2924/01028 , H01L2924/01029 , H01L2924/01047 , H01L2924/01079 , H01L2924/3025 , H01L2924/3841 , H05K1/181 , H05K3/341 , H05K3/3457 , H05K13/0465 , H05K2203/0278 , Y02P70/613 , H01L2224/13012 , H01L2924/00012 , H01L2224/05552
摘要： Provided are a method of manufacturing an electronic component module in which joining portions joining outer terminals of an electronic component and surface electrodes of a substrate are not contacted with a lateral surface of the electronic component, and the electronic component module manufactured by the manufacturing method. Bumps 6, each including a thicker portion having a relatively large thickness and a thinner portion having a relatively small thickness, are formed on one surface of the substrate such that, when looking at the electronic component in a mounted state in a plan view, the thicker portion is positioned on the side closer to a center of the electronic component relative to a corresponding outer terminal 2, and the thinner portion is positioned on the opposite side away from the center of the electronic component relative to the corresponding outer terminal 2. Joining portions 7 joining the outer terminals 2 respectively to the bumps 6, having been formed in the preceding step, through deformation of the bumps are formed such that a height of each joining portion on the opposite side away from the center of the electronic component when looking at the mounted electronic component in a plan view is lower than a height of the joining portion on the side closer to the center of the electronic component.
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公开(公告)号：EP3187299A4
公开(公告)日：2018-04-25
申请号：EP14900789
申请日：2014-08-29
IPC分类号： B23K35/26 , B22F1/00 , B22F1/02 , B23K35/02 , B23K35/365 , C22C13/00 , C23C8/10 , C23C8/12 , C23C28/00 , H01L23/00
CPC分类号： B23K35/0244 , B22F1/02 , B22F2999/00 , B23K35/26 , B23K35/262 , B23K35/365 , C22C13/00 , C23C8/10 , C23C8/36 , C23C28/04 , H01L24/11 , H01L24/13 , H01L2224/11318 , H01L2224/1182 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/1312 , H01L2224/13139 , H01L2224/13147 , H01L2224/13155 , H01L2224/13157 , H01L2224/1316 , H01L2224/13561 , H01L2224/13687 , H01L2924/0105 , H01L2924/014 , H01L2924/0544 , C22C1/0483
摘要： Provided is a solder material which enables a growth of an oxide film to be inhibited. A solder ball 1A which is a solder material is composed of a solder layer 2 and a covering layer 3 covering the solder layer 2. The solder layer 2 is spherical and is composed of a metal material containing an alloy including Sn content of 40% and more. Otherwise the solder layer 2 is composed of a metal material including Sn content of 100%. In the covering layer 3, a S n O film 3a is formed outside the solder layer 2, and a S n O 2 film 3b is formed outside the S n O film 3a. A thickness of the covering layer 3 is preferably more than 0nm and equal to or less than 4.5nm. Additionally, a yellow chromaticity of the solder ball 1A is preferably equal to or less than 5.7.
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公开(公告)号：EP3062343A1
公开(公告)日：2016-08-31
申请号：EP16000370.3
申请日：2011-02-22
申请人： Interposers GmbH
发明人： Jakob, Andreas , Kaiser, Thomas
IPC分类号： H01L25/065 , H01L23/538 , H01L21/48
CPC分类号： H01L24/14 , H01L21/4867 , H01L23/538 , H01L24/11 , H01L24/81 , H01L25/0657 , H01L25/50 , H01L2224/11318 , H01L2224/48463 , H01L2225/0651 , H01L2225/06513 , H01L2225/06527 , H01L2225/06568 , H01L2225/06572 , H01L2924/01029 , H01L2924/01047 , H01L2924/01079 , H01L2924/14 , H01L2924/1461 , H01L2924/00
摘要： Bei einem Verfahren zum Herstellen eines Halbleitermoduls (10) mit mindestens zwei Halbleiterchips (12, 14) sowie einem Interposer (20), welcher die Halbleiterchips (12, 14) miteinander verbindende, elektrisch leitende Strukturen (28) aufweist, wird der Interposer (20) direkt auf einen ersten (12) der Halbleiterchips aufgedruckt. Beim Aufdrucken des Interposers (20) werden die elektrisch leitenden Strukturen (28) mittels elektrisch leitfähiger Tinte (68) erzeugt. Der zweite Halbleiterchip (14) wird derart am Interposer (20) montiert, dass die beiden Halbleiterchips (12, 14) übereinander angeordnet sind und der Interposer (20) eine Zwischenschicht zwischen den beiden Halbleiterchips (12, 14) bildet.
摘要翻译： 在制造包括至少两个半导体芯片（12,14）的半导体模块（10）的方法和具有将半导体芯片（12,14）连接的导电结构（28）的插入器（20） ），所述插入器（20）被直接印刷到所述半导体芯片的第一（12）上。 当打印介质（20）时，导电结构（28）通过导电油墨（68）产生。 第二半导体芯片（14）安装在插入器（20）上，使得两个半导体芯片（12,14）彼此上下排列，并且插入件（20）在两个半导体芯片之间形成中间层 半导体芯片（12,14）。
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公开(公告)号：EP2539933B1
公开(公告)日：2016-02-17
申请号：EP11708699.1
申请日：2011-02-22
申请人： Interposers GmbH
发明人： Jakob, Andreas , Kaiser, Thomas
IPC分类号： H01L25/065 , H01L23/538 , H01L21/48
CPC分类号： H01L24/14 , H01L21/4867 , H01L23/538 , H01L24/11 , H01L24/81 , H01L25/0657 , H01L25/50 , H01L2224/11318 , H01L2224/48463 , H01L2225/0651 , H01L2225/06513 , H01L2225/06527 , H01L2225/06568 , H01L2225/06572 , H01L2924/01029 , H01L2924/01047 , H01L2924/01079 , H01L2924/14 , H01L2924/1461 , H01L2924/00
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