公开(公告)号：EP2783393A4

公开(公告)日：2016-03-23

申请号：EP12792149

申请日：2012-06-01

申请人： TEXAS INSTRUMENTS INC

发明人： WEST JEFFREY ALAN

IPC分类号： H01L21/60 ,  H01L21/98 ,  H01L23/48 ,  H01L23/485 ,  H01L25/065

CPC分类号： H01L23/538 ,  H01L21/563 ,  H01L23/481 ,  H01L23/562 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/13027 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13566 ,  H01L2224/1357 ,  H01L2224/13582 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/13664 ,  H01L2224/13666 ,  H01L2224/13671 ,  H01L2224/13673 ,  H01L2224/13681 ,  H01L2224/14181 ,  H01L2224/1613 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81002 ,  H01L2224/81005 ,  H01L2224/81007 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01015 ,  H01L2924/01005 ,  H01L2924/01074

公开(公告)号：EP0540522A1

公开(公告)日：1993-05-12

申请号：EP91905975.0

申请日：1990-10-16

申请人： International Business Machines Corporation

发明人： AGARWALA, Birendra, Nath ,  AHSAN, Aziz, Mohammed ,  BROSS, Arthur ,  CHADURJIAN, Mark, Frank ,  KOOPMAN, Nicholas, George ,  LEE, Li-Chung ,  PUTTLITZ, Karl, J. ,  RAY, Sudipta, Kumar ,  RYAN, James, Gardner ,  SCHAEFER, Joseph, George ,  SRIVASTAVA, Kamalesh, Kumar ,  TOTTA, Paul, Anthony ,  WALTON, Erick, Gregory ,  WIRSING, Adolf, Ernest

IPC分类号： H01L21 ,  H01L23 ,  H05K3

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05644 ,  H01L2224/13017 ,  H01L2224/13076 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/1357 ,  H01L2224/13582 ,  H01L2224/13583 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/1366 ,  H01L2224/13664 ,  H01L2224/13666 ,  H01L2224/13669 ,  H01L2224/1367 ,  H01L2224/13671 ,  H01L2224/13672 ,  H01L2224/13676 ,  H01L2224/13679 ,  H01L2224/1368 ,  H01L2224/13681 ,  H01L2224/13684 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/15787 ,  H05K3/3431 ,  H05K3/3457 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/29099 ,  H01L2924/00

摘要： The present invention relates generally to a new interconnection and a method for making the same, and more particularly, to an elongated solder interconnection and a method for making the same. On an electronic carrier, a pad is formed on which a solder mass is deposited and capped with a metal layer, thereby forming an elongated solder interconnection. A further elongated solder interconnection can now be formed by forming a second solder mass on the first solder mass that has been capped by a metal layer. Additional elongated solder interconnection can be formed by capping the preceding solder mass and/or the last solder mass with a metal capping layer. Alternatively, the encapsulating layer can be in the form of a sidewall spacer formed on the sidewalls of the solder mass.

公开(公告)号：EP3164887A4

公开(公告)日：2018-03-07

申请号：EP15815539

申请日：2015-07-01

申请人： TEXAS INSTRUMENTS INC

发明人： MASUMOTO MUTSUMI

IPC分类号： H01L23/538 ,  H01L21/56 ,  H01L23/31

CPC分类号： H01L23/3171 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3114 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/19 ,  H01L24/83 ,  H01L24/97 ,  H01L2224/02379 ,  H01L2224/03334 ,  H01L2224/0345 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/06131 ,  H01L2224/06135 ,  H01L2224/1181 ,  H01L2224/11825 ,  H01L2224/11826 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13666 ,  H01L2224/1367 ,  H01L2224/13671 ,  H01L2224/1368 ,  H01L2224/13681 ,  H01L2224/13684 ,  H01L2224/8385 ,  H01L2224/8389 ,  H01L2224/96 ,  H01L2924/10253 ,  H01L2924/18162 ,  H01L2924/3511 ,  H01L2224/19 ,  H01L2924/00014

摘要： A method for fabricating packaged semiconductor devices in panel format. A flat panel sheet dimensioned for a set of contiguous chips includes a stiff substrate of an insulating plate, and a tape having a surface layer of a first adhesive releasable at elevated temperatures, a core base film, and a bottom layer with a second adhesive attached to the substrate. Attaching a set onto the first adhesive layer, the chip terminals having terminals with metal bumps facing away from the first adhesive layer. Laminating low CTE insulating material to fill gaps between the bumps and to form an insulating frame surrounding the set. Grinding lamination material to expose the bumps. Plasma-cleaning assembly, sputtering uniform metal layer across assembly, optionally plating metal layer, and patterning metal layer to form rerouting traces and extended contact pads.

公开(公告)号：EP2783393A2

公开(公告)日：2014-10-01

申请号：EP12792149.2

申请日：2012-06-01

申请人： Texas Instruments Incorporated

发明人： WEST, Jeffrey, Alan

IPC分类号： H01L21/768 ,  H01L21/60 ,  H01L23/48

CPC分类号： H01L23/538 ,  H01L21/563 ,  H01L23/481 ,  H01L23/562 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/13027 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13566 ,  H01L2224/1357 ,  H01L2224/13582 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/13664 ,  H01L2224/13666 ,  H01L2224/13671 ,  H01L2224/13673 ,  H01L2224/13681 ,  H01L2224/14181 ,  H01L2224/1613 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81002 ,  H01L2224/81005 ,  H01L2224/81007 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01015 ,  H01L2924/01005 ,  H01L2924/01074

摘要： A method (100) of protecting through-substrate via (TSV) die from bonding damage includes providing a substrate including a plurality of TSV die having a topside including active circuitry, a bottomside, and a plurality of TSVs that include an inner metal core that reaches from the topside to protruding TSV tips that extend out from the bottomside (101). A protective layer is formed on or applied to the bottomside of the TSV die including between and over the protruding TSV tips (102). The TSV die is bonded with its topside down onto a workpiece having a workpiece surface and its bottomside up and in contact with a bond head (104). The protective layer reduces damage from the bonding process including warpage of the TSV die by preventing the bond head from making direct contact to the protruding TSV tips.

公开(公告)号：EP1709684A1

公开(公告)日：2006-10-11

申请号：EP04775652.3

申请日：2004-10-09

申请人： Advanpack Solutions Pte Ltd

发明人： TAN, Kim Hwee, Block 104A, Ang Mo Kio Street 11 ,  CH'NG, Han-Shen, 688E Woodlands Drive 75 ,  TAGAPULOT, Rosemarie, Advanpack Solutions Pte Ltd ,  BONG, Yin Yen ,  MA, L. Nang Htoi, Advanpack Solutions Pte Ltd ,  LIM, Tiong Soon, Advanpack Solutions Pte Ltd ,  LIU, Shikui, Block 683D, Woodlands Drive 62 ,  BALASUBRAMANIAN,S., Block 803,Yishun RingRoad

IPC分类号： H01L23/485 ,  H01L21/48 ,  H01L21/60 ,  H01L21/768

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05556 ,  H01L2224/05568 ,  H01L2224/13012 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/1357 ,  H01L2224/13655 ,  H01L2224/13671 ,  H01L2224/14051 ,  H01L2924/00013 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01061 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15747 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00012 ,  H01L2224/29099 ,  H01L2924/00

摘要： A die, comprising a substrate (10), has pillar bumps (34) formed over its surface in a series of rows and columns. The pillar bump is comprised a copper pillar (26) topped with a solder cap (28) which has been refloewd (28’). The solder can be lead or lead-free. The pillar bump can be columnar, rectangular, ring shaped or wall shaped. The pillar bump may form a square. The pillar bump can find use in high power applications such a Surface Acoustic Wave devices or MEM devices.

公开(公告)号：EP3164887A1

公开(公告)日：2017-05-10

申请号：EP15815539.0

申请日：2015-07-01

申请人： Texas Instruments Incorporated

发明人： MASUMOTO, Mutsumi

IPC分类号： H01L23/538 ,  H01L21/56

CPC分类号： H01L23/3171 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3114 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/19 ,  H01L24/83 ,  H01L24/97 ,  H01L2224/02379 ,  H01L2224/03334 ,  H01L2224/0345 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/06131 ,  H01L2224/06135 ,  H01L2224/1181 ,  H01L2224/11825 ,  H01L2224/11826 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13666 ,  H01L2224/1367 ,  H01L2224/13671 ,  H01L2224/1368 ,  H01L2224/13681 ,  H01L2224/13684 ,  H01L2224/8385 ,  H01L2224/8389 ,  H01L2224/96 ,  H01L2924/10253 ,  H01L2924/18162 ,  H01L2924/3511 ,  H01L2224/19 ,  H01L2924/00014

摘要： A method for fabricating packaged semiconductor devices in panel format. A flat panel sheet dimensioned for a set of contiguous chips includes a stiff substrate of an insulating plate, and a tape having a surface layer of a first adhesive releasable at elevated temperatures, a core base film, and a bottom layer with a second adhesive attached to the substrate. Attaching a set onto the first adhesive layer, the chip terminals having terminals with metal bumps facing away from the first adhesive layer. Laminating low CTE insulating material to fill gaps between the bumps and to form an insulating frame surrounding the set. Grinding lamination material to expose the bumps. Plasma-cleaning assembly, sputtering uniform metal layer across assembly, optionally plating metal layer, and patterning metal layer to form rerouting traces and extended contact pads.

摘要翻译： 一种用于制造包装在面板格式的半导体器件的方法。 尺寸构造成用于一组邻接的芯片的平板片材包括绝缘板的刚性基板，和连接的具有第一粘合剂在升高的温度，一个核心基片可释放的表面层的胶带，并与第二粘合剂底层 到承印物。 附接一组到第一粘合剂层，具有与从第一粘合剂层背向金属凸块端子的芯片端子。 层叠低CTE绝缘材料填充凸块之间的间隙，并形成绝缘框架包围所述一组的。 磨层压材料暴露的颠簸。 等离子体清洁组件，跨越组件溅射均匀的金属层，任选电镀金属层，和图案化金属层以形成重新路由迹线和延长的接触垫。

公开(公告)号：EP2843693A1

公开(公告)日：2015-03-04

申请号：EP14178105.4

申请日：2014-07-23

申请人： COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

发明人： Colonna, Jean-Philippe ,  Coudrain, Perceval

IPC分类号： H01L21/60 ,  H01L21/768 ,  H01L21/48 ,  H01L23/485 ,  H01L23/31

CPC分类号： H01L24/19 ,  H01L21/30604 ,  H01L21/4853 ,  H01L21/6836 ,  H01L21/7685 ,  H01L21/76898 ,  H01L23/3171 ,  H01L23/481 ,  H01L24/11 ,  H01L24/13 ,  H01L24/20 ,  H01L2224/11462 ,  H01L2224/11472 ,  H01L2224/13009 ,  H01L2224/13076 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13084 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13166 ,  H01L2224/13171 ,  H01L2224/13181 ,  H01L2224/13186 ,  H01L2224/1356 ,  H01L2224/13565 ,  H01L2224/13582 ,  H01L2224/13583 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13666 ,  H01L2224/13671 ,  H01L2224/13681 ,  H01L2224/13686 ,  H01L2224/14181 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/15788 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/00012 ,  H01L2924/00

摘要： L'invention concerne un procédé de réalisation d'un plot d'interconnexion (125) sur un élément conducteur (100) comprenant une face supérieure et une paroi latérale ; le procédé étant réalisé à partir d'un substrat (50) dont au moins la face supérieure est isolante ; l'élément conducteur (100) traversant au moins une partie isolante du substrat (50), le procédé étant caractérisé en ce qu'il comprend la séquence d'étapes suivantes : une étape de mise en relief de l'élément conducteur (100), une étape de formation au-dessus de la face supérieure isolante du substrat (50) d'un empilement de couches comportant au moins une couche électriquement conductrice (120) et une couche électriquement résistive (130), une étape de retrait partiel de la couche électriquement résistive (130), une étape de croissance électrolytique sur la partie de la couche électriquement conductrice (120) de sorte à former au moins un plot d'interconnexion (125) sur ledit élément conducteur (100).

公开(公告)号：EP1653503A3

公开(公告)日：2012-04-18

申请号：EP05023273.5

申请日：2005-10-25

申请人： Seiko Epson Corporation

发明人： Tanaka, Shuichi

IPC分类号： H01L23/485 ,  H01L21/60

CPC分类号： H01L23/562 ,  G02F1/13458 ,  H01L21/563 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/90 ,  H01L24/91 ,  H01L2224/0231 ,  H01L2224/02313 ,  H01L2224/0233 ,  H01L2224/0236 ,  H01L2224/02377 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/114 ,  H01L2224/116 ,  H01L2224/11831 ,  H01L2224/13016 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/1319 ,  H01L2224/13624 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2224/13666 ,  H01L2224/13671 ,  H01L2224/13684 ,  H01L2224/16225 ,  H01L2224/27825 ,  H01L2224/27831 ,  H01L2224/29008 ,  H01L2224/29013 ,  H01L2224/29017 ,  H01L2224/29023 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/29191 ,  H01L2224/29563 ,  H01L2224/2957 ,  H01L2224/29582 ,  H01L2224/29624 ,  H01L2224/29644 ,  H01L2224/29647 ,  H01L2224/29655 ,  H01L2224/29664 ,  H01L2224/29666 ,  H01L2224/29671 ,  H01L2224/29684 ,  H01L2224/29695 ,  H01L2224/30155 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83101 ,  H01L2224/83191 ,  H01L2224/83856 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01066 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/01023 ,  H01L2924/00 ,  H01L2924/01028 ,  H01L2924/01084

摘要： A semiconductor device including a semiconductor element (121), an electrode pad (24) formed on the semiconductor element (121), and a bump electrode (10) conductively connected to the electrode pad (24) which includes a resin bump (12) formed on an active face (121a) of the semiconductor element (121) and a conductive layer (20) provided from the electrode pad (24) to the surface of the resin bump (12), the conductive layer (20) and the resin bump (12) being arranged without adhesion.

公开(公告)号：EP1653503A2

公开(公告)日：2006-05-03

申请号：EP05023273.5

申请日：2005-10-25

申请人： SEIKO EPSON CORPORATION

发明人： Tanaka, Shuichi

IPC分类号： H01L21/60

CPC分类号： H01L23/562 ,  G02F1/13458 ,  H01L21/563 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/90 ,  H01L24/91 ,  H01L2224/0231 ,  H01L2224/02313 ,  H01L2224/0233 ,  H01L2224/0236 ,  H01L2224/02377 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/114 ,  H01L2224/116 ,  H01L2224/11831 ,  H01L2224/13016 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/1319 ,  H01L2224/13624 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2224/13666 ,  H01L2224/13671 ,  H01L2224/13684 ,  H01L2224/16225 ,  H01L2224/27825 ,  H01L2224/27831 ,  H01L2224/29008 ,  H01L2224/29013 ,  H01L2224/29017 ,  H01L2224/29023 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/29191 ,  H01L2224/29563 ,  H01L2224/2957 ,  H01L2224/29582 ,  H01L2224/29624 ,  H01L2224/29644 ,  H01L2224/29647 ,  H01L2224/29655 ,  H01L2224/29664 ,  H01L2224/29666 ,  H01L2224/29671 ,  H01L2224/29684 ,  H01L2224/29695 ,  H01L2224/30155 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83101 ,  H01L2224/83191 ,  H01L2224/83856 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01066 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/01023 ,  H01L2924/00 ,  H01L2924/01028 ,  H01L2924/01084

摘要： A semiconductor device including a semiconductor element (121), an electrode pad (24) formed on the semiconductor element (121), and a bump electrode (10) conductively connected to the electrode pad (24) which includes a resin bump (12) formed on an active face (121a) of the semiconductor element (121) and a conductive layer (20) provided from the electrode pad (24) to the surface of the resin bump (12), the conductive layer (20) and the resin bump (12) being arranged without adhesion.

摘要翻译： 包括半导体元件（121），形成在半导体元件（121）上的电极焊盘（24））的半导体器件和与包括树脂凸块（12）的电极焊盘（24）导电连接的突起电极（10） 形成在所述半导体元件（121）的有源面（121a）上，以及从所述电极焊盘（24）向所述树脂凸块（12）的表面设置的导电层（20），所述导电层（20）和所述树脂 凹凸（12）没有粘附地排列。

公开(公告)号：EP0965143A1

公开(公告)日：1999-12-22

申请号：EP98905447.0

申请日：1998-02-26

申请人： NOKIA MOBILE PHONES LTD.

发明人： PIENIMAA, Seppo

IPC分类号： H01L21 ,  H01L23

CPC分类号： H01L24/81 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/13099 ,  H01L2224/13611 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13671 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2224/83856 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01058 ,  H01L2924/01061 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/00014 ,  H01L2924/01083

摘要： The invention is related to a method of fabricating an attachment bump of a component (11). In accordance with the invention, a flexible preform (13a) is fabricated, which is plated with materials (13b) appropriate for metallurgical bonding. The invention is also related to a method of attaching a component (11) to the surface of a circuit card (15) using bumps. In accordance with the invention, bumps are formed from preforms (13a) made from a flexible material, which preforms (13a) are metallized (13b) over their entire surface. The bump (13a, 13b) is attached to the attachment pads (12a, 16a) of the component (11) and the circuit card (15) by means of metallizations (12b, 13b, 16b) between the attachment pads and the bump. The bond is formed metallurgically by transfusion. The surface of the bonding side of the component (11) is coated with an insulating material (14) before the mentioned bonding elsewhere than at the attachment pads (12). The mentioned insulating material (14) is thermoplastic, thermoplastic resin or thermosetting plastic in the B state. To accomplish metallurgical bonding of the bonding material, bismuth (Bi) is used as part of the material.