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公开(公告)号:EP4402721A1
公开(公告)日:2024-07-24
申请号:EP22870489.6
申请日:2022-08-22
Applicant: INTEL Corporation
IPC: H01L25/10 , H01L23/538 , H01L23/00 , H01L25/18
CPC classification number: H01L23/5389 , H01L23/49816 , H01L23/5385 , H01L2924/0001420130101 , H01L2224/4809120130101 , H01L2224/1622520130101 , H01L2924/1816120130101 , H01L2924/18120130101 , H01L24/48 , H01L25/105 , H01L25/0657 , H01L2225/065120130101 , H01L25/0652 , H01L2225/0657220130101 , H01L2225/0651320130101 , H01L2225/0651720130101 , H01L2225/0652420130101 , H01L2225/0654120130101 , H01L2225/0654820130101 , H01L25/50 , H01L21/568 , H01L21/6835 , H01L2221/6835920130101 , H01L2221/6834520130101 , H01L2221/6837220130101 , H01L24/18 , H01L2224/1622120130101 , H01L2224/1718120130101 , H01L24/17
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2.
公开(公告)号:EP4427269A1
公开(公告)日:2024-09-11
申请号:EP22887944.1
申请日:2022-10-17
Applicant: Micron Technology, Inc.
Inventor: PAREKH, Kunal, R.
IPC: H01L25/065 , H01L23/00 , H01L23/31
CPC classification number: H01L2225/0651320130101 , H01L24/16 , H01L23/3738 , H01L23/36 , H01L25/0652 , H01L25/0655 , H01L25/50 , H01L2225/0654820130101 , H01L2225/0658920130101 , H01L2225/0658620130101 , H01L2225/0651720130101 , H01L23/562 , H01L25/18 , H01L23/481
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公开(公告)号:EP4437588A1
公开(公告)日:2024-10-02
申请号:EP22914071.0
申请日:2022-12-06
Applicant: Yangtze Memory Technologies Co., Ltd.
Inventor: ZENG, Xinru , CHEN, Peng , ZHOU, HouDe
IPC: H01L25/065 , H01L25/18 , H01L23/485 , H01L21/56 , H01L21/60
CPC classification number: H01L2224/4814720130101 , H01L2224/9620130101 , H01L2224/1820130101 , H01L2224/4809120130101 , H01L2224/4822720130101 , H01L2924/18120130101 , H01L2224/3214520130101 , H01L2224/7326520130101 , H01L25/18 , H01L25/0657 , H01L25/0652 , H01L25/50 , H01L2225/0650620130101 , H01L2225/0654820130101 , H01L2225/0652420130101 , H01L2225/0656220130101 , H01L21/568 , H01L23/3135 , H01L24/13
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公开(公告)号:EP4427270A1
公开(公告)日:2024-09-11
申请号:EP22890767.1
申请日:2022-11-03
Inventor: HABA, Belgacem
IPC: H01L25/065 , H01L25/18
CPC classification number: H01L25/18 , H01L2225/0654120130101 , H01L25/0657 , H01L2225/0656520130101 , H01L23/481 , H01L2225/0658620130101 , H01L2225/0657220130101 , H01L2225/0654820130101 , H01L21/76898
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公开(公告)号:EP4340023A3
公开(公告)日:2024-06-12
申请号:EP23220590.6
申请日:2020-02-03
Applicant: INTEL Corporation
Inventor: MAHAJAN, Ravindranath Vithal , MALLIK, Debendra , SHARAN, Sujit , RAORANE, Digvijay
IPC: H01L23/38 , H01L23/538
CPC classification number: H01L23/5389 , H01L23/38 , H01L23/49827 , H01L23/49816 , H01L23/49811 , H01L25/0652 , H01L2225/0651720130101 , H01L2225/0654820130101 , H01L2225/0657220130101 , H01L2225/0652720130101 , H01L2225/0655520130101 , H01L2225/0654120130101 , H01L2225/0651320130101 , H01L25/18 , H01L2224/8120320130101 , H01L2224/8181520130101 , H01L2224/7320420130101 , H01L2224/1626520130101 , H01L2224/1718120130101 , H01L2924/1015820130101 , H01L2224/1623820130101 , H01L2924/1515320130101 , H01L2924/1816120130101 , H01L24/16 , H01L2224/1614520130101 , H01L2224/13120130101 , H01L2224/1302520130101 , H01L23/147 , H01L21/486 , H01L23/5385
Abstract: Embodiments disclosed herein include electronic packages and methods of forming such electronic packages. In an embodiment, the electronic package comprises a base substrate. The base substrate may have a plurality of through substrate vias. In an embodiment, a first die is over the base substrate. In an embodiment a first cavity is disposed into the base substrate. In an embodiment, the first cavity is at least partially within a footprint of the first die. In an embodiment, a first component is in the first cavity.
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公开(公告)号:EP3866193B1
公开(公告)日:2024-10-09
申请号:EP20205957.2
申请日:2020-11-05
IPC: H01L25/16 , H01L23/498 , H01L23/00 , H01L25/065 , H01L25/18
CPC classification number: H01L2224/7325320130101 , H01L24/16 , H01L24/32 , H01L2224/3214520130101 , H01L23/49811 , H01L2224/1622720130101 , H01L2224/1210520130101 , H01L2924/1531120130101 , H01L2224/7320320130101 , H01L2224/7321720130101 , H01L2225/0654120130101 , H01L2225/0652420130101 , H01L2225/0656820130101 , H01L2225/0658920130101 , H01L24/20 , H01L24/73 , H01L25/18 , H01L25/0657 , H01L2225/0651720130101 , H01L2225/0654820130101
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公开(公告)号:EP3963631B1
公开(公告)日:2024-09-18
申请号:EP20936072.6
申请日:2020-05-29
CPC classification number: H01L25/0657 , H01L25/18 , H01L25/50 , H01L2225/0654820130101 , H01L2225/0656220130101 , H01L23/58 , H01L2224/0814520130101 , H01L24/73 , H01L24/08 , H01L2224/0502520130101 , H01L2224/0554720130101 , H01L2224/060320130101 , H01L2224/8035720130101 , H01L2224/0918120130101 , H01L2224/920220130101 , H10B43/50 , H10B43/40 , H10B43/27
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公开(公告)号:EP4393013A1
公开(公告)日:2024-07-03
申请号:EP22748695.8
申请日:2022-07-01
Applicant: QUALCOMM INCORPORATED
Inventor: VEMURI, Krishna , KIM, Jinseong
IPC: H01L23/538 , H01L25/065 , H01L23/48 , H01L23/00 , H01L25/00 , H01L25/18
CPC classification number: H01L23/5383 , H01L23/5385 , H01L25/0657 , H01L25/50 , H01L2225/065120130101 , H01L2225/0651720130101 , H01L2225/065220130101 , H01L2225/0652420130101 , H01L2225/0654820130101 , H01L2225/0656220130101 , H01L24/16 , H01L25/18 , H01L2224/1622720130101 , H01L2224/4822720130101 , H01L2224/3214520130101 , H01L2224/7325320130101 , H01L2224/7326520130101 , H01L2924/1531120130101 , H01L2924/1519220130101 , H01L2224/9224720130101 , H01L2224/7321520130101 , H01L2224/4809120130101 , H01L2924/1420130101 , H01L2924/0001420130101 , H01L2224/1310120130101 , H01L24/13 , H01L24/48 , H01L2924/18120130101 , H01L2224/291920130101 , H01L24/29 , H01L24/83 , H01L2224/838520130101 , H01L2224/8320320130101 , H01L24/73 , H01L24/32 , H01L23/49816
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公开(公告)号:EP4401078A1
公开(公告)日:2024-07-17
申请号:EP22871070.3
申请日:2022-11-25
Applicant: Yangtze Memory Technologies Co., Ltd.
Inventor: LIU, Peng , ZHANG, Baohua
IPC: G11C5/04 , H01L21/48 , H01L23/31 , H01L21/58 , H01L23/498 , H01L23/538 , H01L25/10
CPC classification number: G11C5/04 , H01L23/49822 , H01L23/5383 , H01L21/4857 , H01L23/49811 , H01L23/49816 , H01L23/552 , H01L25/0657 , H01L25/0655 , H01L25/105 , H01L2225/105820130101 , H01L2225/102320130101 , H01L2225/103520130101 , H01L2225/0654120130101 , H01L2225/0654820130101 , H01L25/50
Abstract: The present disclosure provides a chip package structure, a manufacturing method thereof and an electronic device, and relates to the field of semiconductor technologies, for the purposes of reducing the area of the chip package structure and improving the rate of signal transmission. The semiconductor structure includes a package substrate, a first chip, a conductive pillar and a second chip, wherein the package substrate has a first surface; the first chip is located on the first surface of the package substrate and electrically connected to the package substrate; the conductive pillar is located on the first surface of the package substrate and electrically connected to the package substrate; the second chip is located on a side of the first chip and the conductive pillar away from the package substrate and electrically connected to the conductive pillar; and an orthographic projection of the conductive pillar on the package substrate is located within a range of an orthographic projection of the first chip or the second chip on the package substrate. The chip package structure is configured for connection with a circuit board in the electronic device.
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10.
公开(公告)号:EP4322215A3
公开(公告)日:2024-07-03
申请号:EP23199195.1
申请日:2011-01-31
Applicant: Micron Technology, Inc.
Inventor: KIRBY, Kyle, K. , PAREKH, Kunal, R. , NIROUMAND, Sarah, A.
IPC: H01L21/768 , H01L23/48 , H01L23/522 , H01L25/065
CPC classification number: H01L23/481 , H01L24/06 , H01L24/13 , H01L25/0657 , H01L25/50 , H01L2224/0500920130101 , H01L2224/055720130101 , H01L2224/0564720130101 , H01L2224/0618120130101 , H01L2224/1302520130101 , H01L2224/1614620130101 , H01L2225/0651320130101 , H01L2225/0654420130101 , H01L2225/0654820130101 , H01L2924/0101320130101 , H01L2924/0102920130101 , H01L2924/0107320130101 , H01L2924/0107920130101 , H01L2924/0108220130101 , H01L2924/01420130101 , H01L2924/0494120130101 , H01L2924/0100620130101 , H01L2924/0103320130101 , H01L2924/010520130101 , H01L2924/0107420130101 , H01L2924/1309120130101 , H01L2924/130620130101 , H01L2924/0001420130101 , H01L2924/000220130101 , H01L2224/040120130101 , H01L2924/1204220130101 , H01L2924/1420130101 , H01L21/76898 , H01L23/522
Abstract: Microelectronic devices with through-substrate interconnects and associated methods of manufacturing are disclosed herein. In one embodiment, a semiconductor device includes a semiconductor substrate carrying first and second metallization layers. The second metallization layer is spaced apart from the semiconductor substrate with the first metallization layer therebetween. The semiconductor device also includes a conductive interconnect extending at least partially through the semiconductor substrate. The first metallization layer is in electrical contact with the conductive interconnect via the second metallization layer.
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