摘要:
Processes for fabricating photovoltaic devices in which the front side contact metal semiconductor alloy metallization patterns have a uniform thickness at edge portions as well as a central portion of each metallization pattern are provided. In one embodiment, a method of forming a photovoltaic device is provided that includes a p-n junction with a p-type semiconductor portion and an n-type semiconductor portion one on top of the other, wherein an upper exposed surface of one of the semiconductor portions represents a front side surface of the semiconductor substrate; forming a plurality of patterned antireflective coating layers on the front side surface of the semiconductor surface to provide a grid pattern including a busbar region and finger regions; forming a mask atop the plurality of patterned antireflective coating layers, the mask having a shape that mimics each patterned antireflective coating; electrodepositing a metal layer on the busbar region and the finger regions; removing the mask; and performing an anneal, wherein during the anneal metal atoms from the metal layer react with semiconductor atoms from the busbar region and the finger regions forming a metal semiconductor alloy.
摘要:
A chemical solution that removes undesired metal hard mask yet remains selective to the device wiring metallurgy and dielectric materials. The present invention decreases aspect ratio by selective removal of the metal hard mask before the metallization of the receiving structures without adverse damage to any existing metal or dielectric materials required to define the semiconductor device, e.g. copper metallurgy or device dielectric. Thus, an improved aspect ratio for metal fill without introducing any excessive trapezoidal cross-sectional character to the defined metal receiving structures of the device will result.
摘要:
Bonding of substrates including metal-dielectric patterns on a surface with the metal raised above the dielectric, as well as related structures, are disclosed. One method includes providing a first substrate having a metal-dielectric pattern on a surface thereof; providing a second substrate having a metal-dielectric pattern on a surface thereof; performing a process resulting in the metal being raised above the dielectric; cleaning the metal; and bonding the first substrate to the second substrate. A related structure is also disclosed. The bonding of raised metal provides a strong bonding medium, and good electrical and thermal connections enabling creation of three dimensional integrated structures with enhanced functionality.
摘要:
A method for capping lines includes forming a metal film layer on a copper line by a selective deposition process, the copper line disposed in a dielectric substrate, wherein the depositing also results in the deposition of stray metal material on the surface of the dielectric substrate, and etching with an isotropic etching process to remove a portion of the metal film layer and the stray metal material on the surface of the dielectric substrate, wherein the metal film layer is deposited at an initial thickness sufficient to leave a metal film layer cap remaining on the copper line following the removal of the stray metal material.
摘要:
In one embodiment, the present invention provides a method for patterning a surface that includes forming a block copolymer atop a heterogeneous reflectivity surface, wherein the block copolymer is segregated into first and second units; applying a radiation to the first units and second units, wherein the heterogeneous reflectivity surface produces an exposed portion of the first units and the second units; and applying a development cycle to selectively remove at least one of the exposed first and second units of the segregated copolymer film to provide a pattern.
摘要:
A hard mask is formed on an interconnect structure comprising a low-k material layer and a metal feature embedded therein. A block polymer is applied to the hard mask layer, self-assembled, and patterned to form a polymeric matrix of a polymeric block component and containing cylindrical holes. The hard mask and the low-k material layer therebelow are etched to form cavities. A conductive material is plated on exposed metallic surfaces including portions of top surfaces of the metal feature to form metal pads. Metal silicide pads are formed by exposure of the metal pads to a silicon containing gas. An etch is performed to enlarge and merge the cavities in the low-k material layer. The metal feature is protected from the etch by the metal silicide pads. An interconnect structure having an air gap and free of defects to surfaces of the metal feature is formed.
摘要:
Etching residue is selectively removed employing a substantially non-aqueous composition containing a fluoride containing compound and certain organic solvents. Preferred compositions also include an anhydride.
摘要:
Silicon oxide is removed from an article employing a liquid composition containing a fluoride-containing compound, organic solvent, and water. The methods of the invention are especially useful for removal of silicon oxide formed by thermal oxidation of a silicon substrate.
摘要:
Etching residue, etching mask and silicon nitride and/or silicon dioxide are etched or removed employing a composition containing a fluoride containing compound, water and certain organic solvents.
摘要:
An efficient cleaning process of microelectronics devices requires lower levels of megasonic power, lower temperature and much lower concentrations of chemicals. The method controls the effectiveness of megasonics-assisted cleaning of microelectronics devices by securing a gas concentration level in the cleaning solution, such that at the process temperature the solution is partially saturated with the gas. The gas concentration can be controlled either at the plant-wide level or, preferably, at the point of use. In the latter case, two water supply inputs are provided, one of vacuum-degassed water and the other of gas-saturated water. Process water in the desired gas concentration is then obtained by mixing water from the two sources in an appropriate ratio, which resulting mixture is fed to the wafer cleaning vessel.