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公开(公告)号：US09793226B2
公开(公告)日：2017-10-17
申请号：US15055089
申请日：2016-02-26
CPC分类号： H01L23/66 , G01R1/07342 , G01R31/2851 , G01R31/2889 , G01R31/2896 , G01R31/31905 , H01L23/642
摘要： The present invention describes essentially three different embodiments for the implementation of low impedance (over frequency) power delivery to a die. Such low impedance to a high frequency allows the die to operate at package-level speed, thus reducing yield loss at the packaging level. Each embodiment addresses a slightly different aspect of the overall wafer probe application. In each embodiment, however, the critical improvement of this disclosure is the location of the passive components used for supply filtering/decoupling relative to prior art. All three embodiments require a method to embed the passive components in close proximity to the pitch translation substrate or physically in the pitch translation substrate.
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2.发明申请公开(公告)号：US20170250146A1
公开(公告)日：2017-08-31
申请号：US15055089
申请日：2016-02-26
CPC分类号： H01L23/66 , G01R1/07342 , G01R31/2851 , G01R31/2889 , G01R31/2896 , G01R31/31905 , H01L23/642
摘要： The present invention describes essentially three different embodiments for the implementation of low impedance (over frequency) power delivery to a die. Such low impedance to a high frequency allows the die to operate at package-level speed, thus reducing yield loss at the packaging level. Each embodiment addresses a slightly different aspect of the overall wafer probe application. In each embodiment, however, the critical improvement of this disclosure is the location of the passive components used for supply filtering/decoupling relative to prior art. All three embodiments require a method to embed the passive components in close proximity to the pitch translation substrate or physically in the pitch translation substrate.
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3.发明授权Method and structure for forming contact pads on a printed circuit board using zero under cut technology 有权使用零切割技术在印刷电路板上形成接触焊盘的方法和结构公开(公告)号：US09468108B2
公开(公告)日：2016-10-11
申请号：US13987440
申请日：2013-07-25
申请人： Dan Turpuseema , James V. Russell
发明人： Dan Turpuseema , James V. Russell
CPC分类号： H05K3/425 , H05K1/113 , H05K1/115 , H05K3/0094 , H05K3/243 , H05K3/4007 , H05K3/427 , H05K2201/0959 , Y10T29/49156
摘要： A method and an apparatus for forming a contact pad on a printed circuit board over a filled plate via or blind in which an additional metallic or a non metallic coating is applied to a final surface finished plate which encapsulates the side walls of the wear resistant surface plate, and also covers the side walls of the metal layer plated onto the filled via and the wrap around plated metal which was plated in the via and onto the surface of the base metal to the extents of the pad geometry. This prevents subsequent undermining through the etching process and ensuring the integrity and reliability of the vias' electrical connection when an underlying base metal such as but not limited to copper and the surface plated metal are formed when plating metal in the via and consequently onto the surface.
摘要翻译： 一种用于在印刷电路板上形成接触焊盘的方法和装置，该印刷电路板在填充板通孔或盲孔上，其中附加的金属或非金属涂层施加到封装耐磨表面的侧壁的最终表面成品板 并且还覆盖镀在填充的通孔上的金属层的侧壁和镀在金属上的包裹物，其镀覆在基底金属的通孔中并达到基底金属的表面，达到垫几何形状的范围。 这防止了当通过通孔电镀金属并因此到达表面时形成下面的基底金属（例如但不限于铜）和表面电镀金属时，通过蚀刻工艺的后续破坏并确保通孔的电连接的完整性和可靠性 。
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4.发明申请Method and structure for forming contact pads on a printed circuit board using zero under cut technology 有权使用零切割技术在印刷电路板上形成接触焊盘的方法和结构公开(公告)号：US20140069704A1
公开(公告)日：2014-03-13
申请号：US13987440
申请日：2013-07-25
申请人： Dan Turpuseema , James V. Russell
发明人： Dan Turpuseema , James V. Russell
CPC分类号： H05K3/425 , H05K1/113 , H05K1/115 , H05K3/0094 , H05K3/243 , H05K3/4007 , H05K3/427 , H05K2201/0959 , Y10T29/49156
摘要： A method and an apparatus for forming a contact pad on a printed circuit board over a filled plate via or blind in which an additional metallic or a non metallic coating is applied to a final surface finished plate which encapsulates the side walls of the wear resistant surface plate, and also covers the side walls of the metal layer plated onto the filled via and the wrap around plated metal which was plated in the via and onto the surface of the base metal to the extents of the pad geometry. This prevents subsequent undermining through the etching process and ensuring the integrity and reliability of the vias' electrical connection when an underlying base metal such as but not limited to copper and the surface plated metal are formed when plating metal in the via and consequently onto the surface.
摘要翻译： 一种用于在印刷电路板上形成接触焊盘的方法和装置，该印刷电路板在填充板通孔或盲孔上，其中附加的金属或非金属涂层施加到封装耐磨表面的侧壁的最终表面成品板 并且还覆盖镀在填充的通孔上的金属层的侧壁和镀在金属上的包裹物，其镀覆在基底金属的通孔中并达到基底金属的表面，达到垫几何形状的范围。 这防止了当通过通孔电镀金属并因此到达表面时形成下面的基底金属（例如但不限于铜）和表面电镀金属时，通过蚀刻工艺的后续破坏并确保通孔的电连接的完整性和可靠性 。
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公开(公告)号：US20120048593A1
公开(公告)日：2012-03-01
申请号：US13136361
申请日：2011-07-29
申请人： James V. Russell
发明人： James V. Russell
CPC分类号： H01R13/2414 , H01R43/007 , Y10T29/49117
摘要： A looped conductive wire or alternatively a conductive material such as a conductive foil is electrically connected with elastomeric material to provide electrical connections with one or more electronic devices.
摘要翻译： 环状导电线或可选地导电材料例如导电箔与弹性体材料电连接以提供与一个或多个电子器件的电连接。
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6.发明申请Method and structure for coaxial via routing in printed circuit boards for improved signal integrity 有权用于印刷电路板中同轴通孔布线的方法和结构，用于改善信号完整性公开(公告)号：US20110203842A1
公开(公告)日：2011-08-25
申请号：US12798217
申请日：2010-03-31
申请人： James V. Russell
发明人： James V. Russell
CPC分类号： H05K1/0222 , H05K1/0251 , H05K1/116 , H05K3/4069 , H05K3/42 , H05K2201/0187 , H05K2201/096 , H05K2201/09609 , H05K2201/09727 , H05K2201/09809 , Y10T29/49124 , Y10T29/49165
摘要： A method and a structure for a coaxial via that extend along the entire length of a signal via in a printed circuit board. Signal integrity is improved by providing ground shield for the entire length of the coaxial via. The ground shielding can be implemented by either providing ground cage vias around a signal via and routing a trace to the signal via on a built up layer or by providing a semi circle ground trench through a build up layer to permit a trace access to the signal via.
摘要翻译： 一种用于沿着印刷电路板中的信号通道的整个长度延伸的同轴通孔的方法和结构。 通过为同轴通孔的整个长度提供接地屏蔽来改善信号完整性。 接地屏蔽可以通过在信号通孔周围提供接地保持架通孔，并将迹线路由到建立层上的信号通道或者通过建立层提供半圆接地沟槽来实现，以允许对信号进行跟踪访问 通过。
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公开(公告)号：US20110155792A1
公开(公告)日：2011-06-30
申请号：US12798216
申请日：2010-03-31
申请人： James V. Russell
发明人： James V. Russell
CPC分类号： B23K1/20 , B21C51/005 , B23K26/361 , B23K2101/40
摘要： The present disclosure provides for scoring a line on metal to form a solder dam to define a solderable area on a metal surface. The solderable area can define solderable pads on a solid copper plane or at the end point of a trace on a circuit board. The present disclosure provides for soldering metallic surfaces together and for aligning solderable objects to one another. The surface tension of solder enables the parts to be aligned through the manipulations of the skived patterns and their placement. The skiving can be done either by laser skiving or by mechanical scoring on the metallic surfaces.
摘要翻译： 本公开提供了在金属上划线以形成焊料坝以在金属表面上限定可焊接区域。 可焊接区域可以在实心铜平面上或电路板上的迹线终点上定义可焊接焊盘。 本公开提供了将金属表面焊接在一起并且用于将可焊接物体彼此对准的方式。 焊料的表面张力使得零件能够通过刮削图案的操作和它们的放置进行对准。 可以通过激光切割或金属表面的机械刻痕来进行切割。
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公开(公告)号：US20190053374A1
公开(公告)日：2019-02-14
申请号：US16108527
申请日：2018-08-22
摘要： The present invention provides for a method and structure for forming three-dimensionally routed dielectric wires between discrete points on the two or more parallel circuit planes. The wires may be freely routed in three-dimensional space as to create the most efficient routing between the two arbitrarily defined points on the two or more parallel circuit planes. Metalizing the outer surfaces of these three dimensional dielectric wires electrically coupling the discrete wires to their respective discrete contact points. Two or more of these wires may be in intimate contact to one another electrically coupling to each other as well as to two or more discrete contact pads. These electrically coupled contact pads may be on opposite sides or on the same side of the structure and the formed metalized wires may originate on one side and terminate on the other or originate and terminate from the same side.
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公开(公告)号：US08848385B2
公开(公告)日：2014-09-30
申请号：US13200672
申请日：2011-09-28
CPC分类号： H05K1/0233 , H05K1/113 , H05K1/185 , H05K2201/1053 , H05K2201/10636 , Y02P70/611 , Y10T29/4913
摘要： The present disclosure relates to reducing unwanted RF noise in a printed circuit board (PCB) containing an RF device. An isolation filter is embedded in a PCB containing an RDF device. By placing the isolation filter as close as possible to the RF device in order to dramatically reduce unwanted RF noise due to unavoidable coupling between Vias and planes in the PCB structure.
摘要翻译： 本公开涉及减少包含RF设备的印刷电路板（PCB）中的不期望的RF噪声。 隔离滤波器嵌入在包含RDF设备的PCB中。 通过将隔离滤波器放置在尽可能靠近RF器件的位置，以便显着减少不必要的RF噪声，这是由于通孔和PCB结构中的平面之间的不可避免的耦合。
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10.发明授权Method for providing improved power distribution or power dissipation to an electrical component attached to main circuit board 有权为连接到主电路板的电气部件提供改进的配电或功率消耗的方法公开(公告)号：US08792248B2
公开(公告)日：2014-07-29
申请号：US13507380
申请日：2012-06-22
申请人： James V Russell
发明人： James V Russell
IPC分类号： H05K1/18
CPC分类号： H05K1/185 , H05K1/023 , H05K1/0231 , H05K1/0234 , H05K3/4046 , H05K2201/096 , H05K2201/10636 , Y02P70/611 , Y10T29/4913 , Y10T29/49139 , Y10T29/49146 , Y10T29/53174
摘要： The present invention provides a method for embedding a power modification component such as a capacitance inside of an adaptor board located to extend over and beyond the vias of the main circuit board so that a portion of the interposer board containing the embedded capacitance is located beyond where the vias or blind vias are located. This permits that via to conduct through the opening. In this way, the capacitance and the resistance will have a closer contact point to the electrical component. With this methodology a resistance can also be embedded in an opening in the adaptor board and be vertically aligned within the opening to make contact with a pad on top of the adaptor board and a pad at the bottom of the adaptor board so that electricity conducts through the embedded component.
摘要翻译： 本发明提供了一种用于将诸如电容内部的电容的功率改进组件嵌入位于延伸超过主电路板的通孔的适配器板的方法，使得包含嵌入电容的插入板的一部分位于 通孔或盲孔位于。 这允许via通过开放。 以这种方式，电容和电阻将具有与电气部件更接近的接触点。 使用这种方法，电阻也可以嵌入在适配器板的开口中，并且在开口内垂直对准，以使接触适配器板顶部的焊盘和适配器板底部的焊盘，使得电通过 嵌入式组件。
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