公开(公告)号：US20160284708A1

公开(公告)日：2016-09-29

申请号：US15078602

申请日：2016-03-23

Applicant: ABB Technology AG

Inventor： Neophythos Lophitis ,  Florin Udrea ,  Umamaheswara Vemulapati ,  lulian Nistor ,  Martin Arnold ,  Jan Vobecky ,  Munaf Rahimo

IPC: H01L27/102 ,  H01L29/417 ,  H01L29/87

CPC classification number: H01L27/1027 ,  H01L29/0696 ,  H01L29/0839 ,  H01L29/41716 ,  H01L29/7416 ,  H01L29/744 ,  H01L29/87

Abstract: A RC power semiconductor is provided which comprises a plurality of diode cells and a plurality of GCT cells. Each GCT cell comprises a first cathode layer with at least three cathode layer regions, which are separated from each other by a base layer. In orthogonal projection onto a plane parallel to the first main side each one of the cathode layer regions is strip-shaped and a width (w, w′), wherein the diode cells alternate with the GCT cells in a lateral direction in at least a mixed part, wherein in each GCT cell, the width (w′) of each one of the two outer cathode layer regions next to a diode cell neighbouring to that GCT cell is less than the width (w) of any intermediate cathode layer region between the two outer cathode layer regions in that GCT cell.

Abstract translation: 提供了一种RC功率半导体，其包括多个二极管单元和多个GCT单元。 每个GCT单元包括具有至少三个阴极层区域的第一阴极层，其通过基底层彼此分离。 在与第一主面平行的平面上的正交投影中，每个阴极层区域是带状的和宽度（w，w'），其中二极管单元在横向方向上与至少一个 混合部分，其中在每个GCT单元中，与所述GCT单元相邻的二极管单元旁边的两个外部阴极层区域中的每一个的宽度（w'）小于所述GCT单元之间的任何中间阴极层区域的宽度（w） 该GCT电池中的两个外阴极层区域。

公开(公告)号：US09000480B2

公开(公告)日：2015-04-07

申请号：US13861074

申请日：2013-04-11

Applicant: ABB Technology AG

Inventor： Munaf Rahimo ,  Wolfgang Janisch ,  Eustachio Faggiano

IPC: H01L29/66 ,  H01L27/06 ,  H01L29/08 ,  H01L29/417 ,  H01L29/739

CPC classification number: H01L27/0664 ,  H01L29/0834 ,  H01L29/41708 ,  H01L29/66333 ,  H01L29/7395

Abstract: A reverse-conducting semiconductor device (RC-IGBT) including a freewheeling diode and an insulated gate bipolar transistor (IGBT), and a method for making the RC-IGBT are provided. A first layer of a first conductivity type is created on a collector side before a second layer of a second conductivity type is created on the collector side. An electrical contact in direct electrical contact with the first and second layers is created on the collector side. A shadow mask is applied on the collector side, and a third layer of the first conductivity type is created through the shadow mask. At least one electrically conductive island, which is part of a second electrical contact in the finalized RC-IGBT, is created through the shadow mask. The island is used as a mask for creating the second layer, and those parts of the third layer which are covered by the island form the second layer.

Abstract translation: 提供了包括续流二极管和绝缘栅双极晶体管（IGBT）的反向导电半导体器件（RC-IGBT）以及制造RC-IGBT的方法。 在集电器侧产生第二导电类型的第二层之前，在集电极侧产生第一导电类型的第一层。 在集电器侧产生与第一和第二层直接电接触的电接触。 在收集器侧施加荫罩，通过荫罩产生第一导电类型的第三层。 通过荫罩产生至少一个作为最终RC-IGBT中的第二电接触部分的导电岛。 岛用作创建第二层的掩模，并且被岛覆盖的第三层的那些部分形成第二层。

公开(公告)号：US09324708B2

公开(公告)日：2016-04-26

申请号：US13716803

申请日：2012-12-17

Applicant: ABB Technology AG

Inventor： Liutauras Storasta ,  Arnost Kopta ,  Munaf Rahimo

IPC: H01L27/088 ,  H01L29/06 ,  H01L29/10 ,  H01L29/739

CPC classification number: H01L27/088 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/7395 ,  H01L29/7396

Abstract: An exemplary power semiconductor device with a wafer having an emitter electrode on an emitter side and a collector electrode on a collector side, an (n-) doped drift layer, an n-doped first region, a p-doped base layer, an n-doped source region, and a gate electrode, all of which being formed between the emitter and collector electrodes. The emitter electrode contacts the base layer and the source region within a contact area. An active semiconductor cell is formed within the wafer, and includes layers that lie in orthogonal projection with respect to the emitter side of the contact area of the emitter electrode. The device also includes a p-doped well, which is arranged in the same plane as the base layer, but outside the active cell. The well is electrically connected to the emitter electrode at least one of directly or via the base layer.

Abstract translation: 具有在发射极侧具有发射极的晶片和集电极侧的集电极，第（n-）掺杂漂移层，n掺杂的第一区，p掺杂的基极层，n 掺杂的源极区和栅电极，所有这些都形成在发射极和集电极之间。 发射极电极在接触区域内接触基极层和源极区域。 有源半导体单元形成在晶片内，并且包括相对于发射极电极的接触区域的发射极侧处于正交投影的层。 该器件还包括一个p掺杂的阱，它被布置在与基极层相同的平面中，但是在活性电池的外部。 阱直接或经由基底层至少一个电连接到发射极电极。

公开(公告)号：US08829563B2

公开(公告)日：2014-09-09

申请号：US13974178

申请日：2013-08-23

Applicant: ABB Technology AG

Inventor： Munaf Rahimo ,  Marco Bellini ,  Maxi Andenna ,  Friedhelm Bauer ,  Iulian Nistor

IPC: H01L29/66 ,  H01L29/08

CPC classification number: H01L29/0813 ,  H01L29/0634 ,  H01L29/0847 ,  H01L29/7395 ,  H01L29/7397

Abstract: An insulated gate bipolar device is disclosed which can include layers of different conductivity types between an emitter electrode on an emitter side and a collector electrode on a collector side in the following order: a source region of a first conductivity type, a base layer of a second conductivity type, which contacts the emitter electrode in a contact area, an enhancement layer of the first conductivity type, a floating compensation layer of the second conductivity type having a compensation layer thickness tp, a drift layer of the first conductivity type having lower doping concentration than the enhancement layer and a collector layer of the second conductivity type.

Abstract translation: 公开了一种绝缘栅极双极器件，其可以包括以下顺序在发射极侧的发射极和集电极侧的集电极之间具有不同导电类型的层：第一导电类型的源极区域，第一导电类型的基极层 在接触区域中与发射极接触的第二导电类型，第一导电类型的增强层，具有补偿层厚度tp的第二导电类型的浮置补偿层，具有较低掺杂的第一导电类型的漂移层 浓度比增强层和第二导电类型的集电极层。

公开(公告)号：US20160049342A1

公开(公告)日：2016-02-18

申请号：US14927006

申请日：2015-10-29

Applicant: ABB Technology AG

Inventor： Munaf Rahimo ,  Hamit Duran

IPC: H01L23/053 ,  H01L23/20 ,  H01L23/31 ,  H01L23/26 ,  H01L23/00 ,  H01L23/24

CPC classification number: H01L23/053 ,  H01L23/049 ,  H01L23/10 ,  H01L23/20 ,  H01L23/24 ,  H01L23/26 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/315 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/46 ,  H01L24/48 ,  H01L24/73 ,  H01L25/072 ,  H01L25/115 ,  H01L2224/291 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/48139 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/16251 ,  H01L2924/167 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A module arrangement for power semiconductor devices, including one or more power semiconductor modules, wherein the one or more power semiconductor modules include a substrate with a first surface and a second surface being arranged opposite to the first surface, wherein the substrate is at least partially electrically insulating, wherein a conductive structure is arranged at the first surface of the substrate, wherein at least one power semiconductor device is arranged on the conductive structure and electrically connected thereto, wherein the one or more modules includes an inner volume for receiving the at least one power semiconductor device which volume is hermetically sealed from its surrounding by a module enclosure, wherein the module arrangement includes an arrangement enclosure at least partly defining a volume for receiving the one or more modules, and wherein the arrangement enclosure seals covers the volume.

Abstract translation: 一种用于功率半导体器件的模块装置，包括一个或多个功率半导体模块，其中所述一个或多个功率半导体模块包括具有第一表面的衬底和与所述第一表面相对布置的第二表面，其中所述衬底至少部分地 电绝缘，其中导电结构布置在衬底的第一表面处，其中至少一个功率半导体器件布置在导电结构上并与其电连接，其中所述一个或多个模块包括用于接收至少 一个功率半导体器件，其体积通过模块外壳与其周围气密密封，其中所述模块装置包括至少部分地限定用于接收所述一个或多个模块的体积的布置外壳，并且其中所述布置外壳密封件覆盖所述体积。

公开(公告)号：US20150380534A1

公开(公告)日：2015-12-31

申请号：US14843631

申请日：2015-09-02

Applicant: ABB Technology AG

Inventor： Munaf Rahimo

IPC: H01L29/739 ,  H01L29/10 ,  H01L29/749 ,  H01L27/06 ,  H01L29/745 ,  H01L29/417 ,  H01L29/08

CPC classification number: H01L29/7395 ,  H01L27/0623 ,  H01L29/0696 ,  H01L29/0813 ,  H01L29/0821 ,  H01L29/083 ,  H01L29/1004 ,  H01L29/1012 ,  H01L29/1016 ,  H01L29/102 ,  H01L29/1095 ,  H01L29/41708 ,  H01L29/7455 ,  H01L29/749

Abstract: Power semiconductor device having a wafer, including emitter and collector electrodes arranged on opposite sides, wherein a gate electrode arranged on the emitter side has a conductive gate layer and an insulating layer arranged in the following order between the collector and emitter side: a p doped collector layer, an (n−) doped drift layer, an n doped enhancement layer, a p based base layer having a first and second base region, and an (n+) doped first and second emitter layer, wherein the emitter electrode contacts the first emitter layer and the first base region at an emitter contact area, wherein the second emitter layer is insulated from a direct contact to the emitter electrode by the insulating layer and wherein the second emitter layer is separated from the first emitter layer by the base layer.

Abstract translation: 具有晶片的功率半导体器件，包括布置在相对侧上的发射极和集电极，其中布置在发射极侧的栅电极具有在集电极和发射极侧之间按以下顺序布置的导电栅极层和绝缘层： （n）掺杂漂移层，n掺杂增强层，具有第一和第二基极区域的基于基底的基极层和掺杂（n +）的第一和第二发射极层，其中发射极电极接触第一发射极层 以及在发射极接触区域处的第一基极区域，其中第二发射极层通过绝缘层与发射极电极的直接接触绝缘，并且其中第二发射极层通过基极层与第一发射极层分离。

公开(公告)号：US09064925B2

公开(公告)日：2015-06-23

申请号：US13625591

申请日：2012-09-24

Applicant: ABB Technology AG

Inventor： Munaf Rahimo ,  Arnost Kopta ,  Christoph Von Arx ,  Maxi Andenna

IPC: H01L29/739 ,  H01L29/423

CPC classification number: H01L29/7397 ,  H01L29/4232 ,  H01L29/7395

Abstract: A power semiconductor device is disclosed with layers of different conductivity types between an emitter electrode on an emitter side and a collector electrode on a collector side. The device can include a drift layer, a first base layer in direct electrical contact to the emitter electrode, a first source region embedded into the first base layer which contacts the emitter electrode and has a higher doping concentration than the drift layer, a first gate electrode in a same plane and lateral to the first base layer, a second base layer in the same plane and lateral to the first base layer, a second gate electrode on top of the emitter side, and a second source region electrically insulated from the second base layer, the second source region and the drift layer by a second insulating layer.

Abstract translation: 在发射极侧的发射电极和集电极侧的集电极之间公开了具有不同导电类型的功率半导体器件。 该器件可以包括漂移层，与发射极直接电接触的第一基极层，嵌入到与发射极电极接触并且具有比漂移层更高的掺杂浓度的第一基极层中的第一源极区域，第一栅极 电极在同一平面中并且与第一基底层相对，第二基底层在同一平面中并且与第一基底层相对，第二栅电极位于发射极侧顶部，第二源极区域与第二基极层电绝缘 基极层，第二源极区域和漂移层通过第二绝缘层。

公开(公告)号：US20150109031A1

公开(公告)日：2015-04-23

申请号：US14519605

申请日：2014-10-21

Applicant: ABB Technology AG

Inventor： Munaf Rahimo

IPC: H03K3/012 ,  H03K17/74 ,  H03K17/66

CPC classification number: H03K3/012 ,  H03K17/08142 ,  H03K17/08148 ,  H03K17/10 ,  H03K17/12 ,  H03K17/66 ,  H03K17/74 ,  H03K2217/0036

Abstract: A semiconductor module as disclosed can include a reverse conducting transistor, with a gate, a collector and an emitter providing a reverse conducting diode between collector and emitter; at least one freewheeling diode connected antiparallel to the transistor having a forward voltage drop higher than the reverse conducting diode during a static state; and a controller to turn the transistor on and off. The controller can apply a pulse to the transistor gate before the reverse conducting diode enters a blocking state, such that when the reverse conducting diode enters the blocking state, a forward voltage drop of the reverse conducting diode is higher than of the at least one freewheeling diode.

Abstract translation: 所公开的半导体模块可以包括具有栅极，集电极和发射极的反向导通晶体管，其在集电极和发射极之间提供反向导通二极管; 在静态期间，反向并联到晶体管的至少一个续流二极管具有高于反向导通二极管的正向压降; 以及控制器来打开和关闭晶体管。 控制器可以在反向导通二极管进入阻塞状态之前向晶体管栅极施加脉冲，使得当反向导通二极管进入阻塞状态时，反向导通二极管的正向压降高于至少一个续流 二极管。

公开(公告)号：US09543305B2

公开(公告)日：2017-01-10

申请号：US15078602

申请日：2016-03-23

Applicant: ABB Technology AG

Inventor： Neophythos Lophitis ,  Florin Udrea ,  Umamaheswara Vemulapati ,  Lulian Nistor ,  Martin Arnold ,  Jan Vobecky ,  Munaf Rahimo

IPC: H01L29/66 ,  H01L27/102 ,  H01L29/87 ,  H01L29/417

CPC classification number: H01L27/1027 ,  H01L29/0696 ,  H01L29/0839 ,  H01L29/41716 ,  H01L29/7416 ,  H01L29/744 ,  H01L29/87

Abstract: A RC power semiconductor is provided which comprises a plurality of diode cells and a plurality of GCT cells. Each GCT cell comprises a first cathode layer with at least three cathode layer regions, which are separated from each other by a base layer. In orthogonal projection onto a plane parallel to the first main side each one of the cathode layer regions is strip-shaped and a width (w, w′), wherein the diode cells alternate with the GCT cells in a lateral direction in at least a mixed part, wherein in each GCT cell, the width (w′) of each one of the two outer cathode layer regions next to a diode cell neighboring to that GCT cell is less than the width (w) of any intermediate cathode layer region between the two outer cathode layer regions in that GCT cell.

Abstract translation: 提供了一种RC功率半导体，其包括多个二极管单元和多个GCT单元。 每个GCT单元包括具有至少三个阴极层区域的第一阴极层，其通过基底层彼此分离。 在与第一主面平行的平面上的正交投影中，每个阴极层区域是带状的和宽度（w，w'），其中二极管单元在横向方向上与至少一个 混合部分，其中在每个GCT单元中，与所述GCT单元相邻的二极管单元旁边的两个外部阴极层区域中的每一个的宽度（w'）小于所述GCT单元之间的任何中间阴极层区域的宽度（w） 该GCT电池中的两个外阴极层区域。

公开(公告)号：US09105680B2

公开(公告)日：2015-08-11

申请号：US14149412

申请日：2014-01-07

Applicant: ABB TECHNOLOGY AG

Inventor： Maxi Andenna ,  Munaf Rahimo ,  Chiara Corvasce ,  Arnost Kopta

IPC: H01L29/732 ,  H01L29/739 ,  H01L29/10 ,  H01L29/66

CPC classification number: H01L29/7397 ,  H01L29/0619 ,  H01L29/1095 ,  H01L29/66348 ,  H01L29/7395

Abstract: An IGBT has layers between emitter and collector sides. The layers include a collector layer on the collector side, a drift layer, a base layer of a second conductivity type, a first source region arranged on the base layer towards the emitter side, a trench gate electrode arranged lateral to the base layer and extending deeper into the drift layer than the base layer, a well arranged lateral to the base layer and extending deeper into the drift layer than the base layer, an enhancement layer surrounding the base layer so as to completely separate the base layer from the drift layer and the well, an electrically conducting layer covering the well and separated from the well by a second electrically insulating layer, and a third insulating layer having a recess on top of the electrically conducting layer such that the electrically conducting layer electrically contacts a emitter electrode.

Abstract translation: IGBT在发射极和集电极侧之间具有层。 这些层包括在集电极侧的集电极层，漂移层，第二导电类型的基极层，布置在基底层上朝向发射极侧的第一源极区域，设置在基极层的侧面并延伸的沟槽栅电极 漂移层比基层更深，井底侧布置在基层上并且比基层更深地延伸到漂移层中，围绕基层的增强层，以便使基层与漂移层完全分离，并且 阱，覆盖阱并通过第二电绝缘层与阱分离的导电层，以及在导电层顶部具有凹陷的第三绝缘层，使得导电层与发射极电气接触。