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公开(公告)号:US10925164B2
公开(公告)日:2021-02-16
申请号:US15702046
申请日:2017-09-12
Applicant: Apple Inc.
Inventor: Paul A. Martinez , Curtis C. Mead , Scott D. Morrison , Giancarlo F. De La Cruz , Lin Chen , Albert Wang , Brad W. Simeral
IPC: H05K1/18 , H03H1/00 , H03H7/01 , H03H7/38 , H05K3/34 , H01G4/30 , H01G2/06 , H01G4/40 , H01G4/228 , H01G4/12 , H01F27/29
Abstract: Methods and systems for producing circuitry using stackable passive components are discussed. More specifically, the present disclosure provides designs and fabrication methods for production of stackable devices that may be used as components in circuitry such as filters and impedance matching adaptors. Such components may be used to save space in printed circuit boards. Moreover, stackable passive components may be dual components, which may be improve the electrical performance in certain types of circuits such as matched component filters.
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公开(公告)号:US20190096581A1
公开(公告)日:2019-03-28
申请号:US15717431
申请日:2017-09-27
Applicant: Apple Inc.
Inventor: Behzad Reyhani Masoleh , Ming Y. Tsai , Paul A. Martinez , Scott D. Morrison , Tracey L. Chavers
CPC classification number: H01G4/248 , H01G2/22 , H01G4/002 , H01G4/005 , H01G4/224 , H01G4/232 , H01G4/30 , H05K1/0216 , H05K1/111 , H05K1/181 , H05K3/34 , H05K2201/10015 , H05K2201/10371
Abstract: Capacitor devices with electrodes that are geometrically arranged to reduce parasitic capacitances are described. The capacitors may be multilayer ceramic capacitor (MLCC) structures in which certain electrodes may have a clearance from a capacitor structure wall, such as top wall. In circuits and devices where that particular capacitor wall may be placed near a shielding structure, the clearance may reduce unintended parasitic capacitances between the shield structure and the electrodes. As a result, the shield structures may be placed closer to the electronic components, which may allow circuit boards and electronic devices with a lower profile.
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公开(公告)号:US20180068784A1
公开(公告)日:2018-03-08
申请号:US15405027
申请日:2017-01-12
Applicant: Apple Inc.
Inventor: Paul A. Martinez , Ming Y. Tsai , Federico P. Centola , Martin Schauer , Cheung-Wei Lam , Jason C. Sauers
CPC classification number: H01F27/365 , H01F17/0013 , H01F2017/008 , H05K1/023 , H05K1/18
Abstract: A system includes a circuit board, an inductor including windings mounted on the circuit board, and a plurality of magnetic field containment devices. Each magnetic field containment device includes an independent electrical circuit that is not directly electrically connected via a conductor to any other magnetic field containment device. Each magnetic field containment device also includes a material of a certain relative permeability. Each magnetic field containment device at least partially surrounds the inductor and, in operation, at least partially contains a magnetic B-Field generated by electrical current in the windings of the inductor. The plurality of magnetic field containment devices, in operation, enables a certain saturation current in the inductor.
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公开(公告)号:US10179254B2
公开(公告)日:2019-01-15
申请号:US15086813
申请日:2016-03-31
Applicant: Apple Inc.
Inventor: Paul A. Martinez , Jason C. Sauers , Shawn X. Arnold
IPC: H01G4/30 , A62C31/22 , H01G4/12 , H05K1/18 , A62C33/04 , F16L5/04 , H01G4/38 , H01G4/012 , H01G4/232 , A62C31/02 , E06B5/16
Abstract: This application relates to capacitors that resist deformation because of the configuration of their conductive and dielectric layers. The capacitors are multilayer capacitors that include multiple dielectric and conductive layers. The dielectric layers can be arranged in a way that creates a rigid barrier or dead zone, which can resist mechanical deformation when the multilayer capacitor is charged. In some embodiments, two or more multilayer capacitors are stacked together in an arrangement that causes each of the multilayer capacitors to cancel any deformations of the other when the multilayer capacitors are charged. In this way, noise exhibited by the multilayer capacitors can be reduced.
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公开(公告)号:US20180061578A1
公开(公告)日:2018-03-01
申请号:US15694726
申请日:2017-09-01
Applicant: Apple Inc.
Inventor: Gang Ning , Paul A. Martinez , Amanda R. Rainer , Won Seop Choi , Gemin Li , Zhong-Qing Gong , Shawn X. Arnold
CPC classification number: H01G4/30 , H01G2/065 , H01G4/008 , H01G4/012 , H01G4/1209 , H01G4/232 , H05K1/18 , H05K3/284 , H05K2201/0133 , H05K2201/10015
Abstract: Passive component structures that may save space, are readily manufactured, and are easy to use. In one example, a passive component structure may include two capacitors, each formed as a group of plates separate and apart from the other. The two groups of plates may have a spacing layer between them.
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公开(公告)号:US20160366765A1
公开(公告)日:2016-12-15
申请号:US14843000
申请日:2015-09-02
Applicant: Apple Inc.
Inventor: Paul A. Martinez , Tyler S. Bushnell , Jason C. Sauers
CPC classification number: H05K1/0295 , H05K3/301 , H05K3/3436 , H05K3/3442 , H05K2201/094 , H05K2201/09954 , H05K2201/1031 , H05K2201/10515 , H05K2201/10636 , H05K2201/10962 , H05K2201/2036 , Y02P70/611 , Y02P70/613
Abstract: An electronic device may include surface mount technology components mounted to a printed circuit board. The surface mount technology components may include electrical components such as resistors, inductors, and capacitors. In order to reduce the size of the electronic device, surface mount technology components may be stacked. A surface mount technology component may be mounted to metal members that electrically connect the surface mount technology component to contact pads on a printed circuit board. A surface mount technology component may be provided with integral standoff portions, and a second surface mount technology component may be mounted to the integral standoff portions. A single surface mount technology component may be used to implement different circuits depending on which face of the surface mount technology component is mounted to the printed circuit board.
Abstract translation: 电子设备可以包括安装到印刷电路板的表面贴装技术部件。 表面贴装技术部件可以包括诸如电阻器,电感器和电容器的电气部件。 为了减小电子设备的尺寸,可以堆叠表面贴装技术部件。 表面贴装技术部件可以安装到将表面贴装技术部件电连接到印刷电路板上的接触焊盘的金属部件上。 表面贴装技术部件可以设置有一体的支座部分,并且第二表面安装技术部件可以安装到整体支座部分。 可以使用单个表面贴装技术部件来实现不同的电路,这取决于表面贴装技术部件的哪个面安装到印刷电路板上。
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公开(公告)号:US10512406B2
公开(公告)日:2019-12-24
申请号:US15692736
申请日:2017-08-31
Applicant: Apple Inc.
Inventor: Paul A. Martinez , Tim P. D'Angelo , Justin P. Dobson , Kevin B. Jessop , Jose A. Castillo
IPC: A61B5/0205 , A61B5/00 , A61B5/11 , A61B5/0245 , A61B5/0402 , A61B5/024
Abstract: Disclosed systems and methods relate to determining an intensity level of an exercise using a photoplethysmogram (PPG) sensor. A method of determining an intensity level of an exercise for a user according to one embodiment of the present disclosure includes detecting, by a device, body signals from the user using a PPG sensor. The method includes determining, by the device, a heart rate of the user based on the body signals. The method includes determining, by the device, an error in the heart rate. The method also includes determining, by the device, the intensity level of the exercise for the user based at least on the error.
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公开(公告)号:US10510492B2
公开(公告)日:2019-12-17
申请号:US15600329
申请日:2017-05-19
Applicant: Apple Inc.
Inventor: Ming Y. Tsai , Albert Wang , Curtis C. Mead , Tyler S. Bushnell , Paul A. Martinez
Abstract: Monolithic capacitor structures having a main capacitor and a vise capacitor are discussed. The vise capacitor provides to the monolithic capacitor structure reduced vibrations and/or acoustic noise due to piezoelectric effects. To that end, vise capacitor may cause piezoelectric deformations that compensate the deformations that are caused by the electrical signals in the main capacitor. Embodiments of these capacitor structures may have the main capacitor and the vise capacitor sharing portions of a rigid dielectric. Electrical circuitry that employs the vise capacitor to reduce noise and/or vibration in the monolithic capacitor structures is also described. Methods for fabrication of these capacitors are discussed as well.
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公开(公告)号:US10461040B2
公开(公告)日:2019-10-29
申请号:US15636408
申请日:2017-06-28
Applicant: Apple Inc.
Inventor: Paul A. Martinez , Ming Y. Tsai , Won Seop Choi
Abstract: Capacitor devices having multiple capacitors with similar nominal capacitances are described. The capacitors may be multilayer ceramic capacitors (MLCCs) and may be fabricated employing class 2 materials. The arrangement of the electrodes in the device may reduce relative variations between the capacitors of the device. The capacitor devices may be allow high performance and compact electrical circuits that may employ matched capacitors.
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公开(公告)号:US10129979B2
公开(公告)日:2018-11-13
申请号:US15274302
申请日:2016-09-23
Applicant: Apple Inc.
Inventor: Albert Wang , Paul A. Martinez
IPC: H05K7/00 , H05K1/14 , H05K1/18 , H05K1/02 , H05K3/30 , H05K3/28 , H05K3/36 , H05K3/34 , H05K3/40 , H05K3/00
Abstract: Methods and devices related to the design and fabrication of molded cores for printed circuit board assemblies and system-on-package (SIP) devices are discussed. The discussed printed circuit board assemblies may have multiple electrical components embedded in a molded core matrix and forming electrical connections with one or more printed circuit boards attached to the molded core matrix. Methods for sourcing of electrical components and production of the molded cores and printed circuit board assemblies are also discussed. The methods and devices may increase a volumetric density of electrical components in printed circuit board assemblies and provide improved mechanical properties to the electrical circuit device.
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