摘要:
A liquid precursor containing a metal is applied to a substrate, RTP baked, and annealed to form a layered superlattice material. Prebaking the substrate and oxygen in the RTP and anneal is essential, except for high bismuth content precursors. Excess bismuth between 110% and 140% of stoichiometry and RTP temperature of 725.degree. C. is optimum. The film is formed in two layers, the first of which uses a stoichiometric precursor and the second of which uses an excess bismuth precursor. The electronic properties are so regularly dependent on process parameters and material composition, and such a wide variety of materials are possible, that electronic devices can be designed by selecting from a continuous record of the values of one or more electronic properties as a continuous function of the process parameters and material composition, and utilizing the selected process and material composition to make a device.
摘要:
A liquid precursor containing a metal is applied to a substrate, RTP baked, and annealed to form a layered superlattice material. Prebaking the substrate and oxygen in the RTP and anneal is essential, except for high bismuth content precursors. Excess bismuth between 110% and 140% of stoichiometry and RTP temperature of 725.degree. C. is optimum. The film is formed in two layers, the first of which uses a stoichiometric precursor and the second of which uses an excess bismuth precursor. The electronic properties are so regularly dependent on process parameters and material composition, and such a wide variety of materials are possible, that electronic devices can be designed by selecting from a continuous record of the values of one or more electronic properties as a continuous function of the process parameters and material composition, and utilizing the selected process and material composition to make a device.
摘要:
A liquid precursor containing a metal is applied to a substrate, RTP baked, and annealed to form a layered superlattice material. Prebaking the substrate and oxygen in the RTP and anneal is essential, except for high bismuth content precursors. Excess bismuth between 110% and 140% of stoichiometry and RTP temperature of 725.degree. C. is optimum. The film is formed in two layers, the first of which uses a stoichiometric precursor and the second of which uses an excess bismuth precursor. The electronic properties are so regularly dependent on process parameters and material composition, and such a wide variety of materials are possible, that electronic devices can be designed by selecting from a continuous record of the values of one or more electronic properties as a continuous function of the process parameters and material composition, and utilizing the selected process and material composition to make a device.
摘要:
A method of fabricating a ferroelectric or layered superlattice DRAM compatible with conventional silicon CMOS technology. A MOSFET is formed on a silicon substrate. A thick layer of BPSG followed by a thin SOG layer overlies the MOSFET. A capacitor is formed by depositing a layer of platinum, annealing, depositing an intermediate layer comprising a ferroelectric or layer superlattice material, annealing, depositing a second layer of platinum, then patterning the capacitor. Another SOG layer is deposited, contact holes to the MOSFET and capacitor are partially opened, the SOG is annealed, the contact holes are completely opened, and a Pt/Ti/PtSi wiring layer is deposited.
摘要翻译:制造与常规硅CMOS技术兼容的铁电或分层超晶格DRAM的方法。 在硅衬底上形成MOSFET。 厚层的BPSG后面是薄的SOG层覆盖在MOSFET上。 通过沉积铂层,退火,沉积包含铁电体或层超晶格材料的中间层,退火,沉积第二层铂,然后构图电容器,形成电容器。 沉积另一个SOG层,MOSFET和电容器的接触孔部分打开,SOG退火,接触孔完全打开,并沉积Pt / Ti / PtSi布线层。
摘要:
A method of fabricating a ferroelectric or layered superlattice DRAM compatible with conventional silicon CMOS technology. A MOSFET is formed on a silicon substrate. A thick layer of BPSG followed by a thin SOG layer overlies the MOSFET. A capacitor is formed by depositing a layer of platinum, annealing, depositing an intermediate layer comprising a ferroelectric or layered superlattice material, annealing, depositing a second layer of platinum, then patterning the capacitor. Another SOG layer is deposited, contact holes to the MOSFET and capacitor are partially opened, the SOG is annealed, the contact holes are completely opened, and a Pt/Ti/PtSi wiring layer is deposited.
摘要翻译:制造与常规硅CMOS技术兼容的铁电或分层超晶格DRAM的方法。 在硅衬底上形成MOSFET。 厚层的BPSG后面是薄的SOG层覆盖在MOSFET上。 通过沉积铂层,退火,沉积包含铁电或层状超晶格材料的中间层,退火,沉积第二层铂,然后构图电容器,形成电容器。 沉积另一个SOG层,MOSFET和电容器的接触孔部分打开,SOG退火,接触孔完全打开,并沉积Pt / Ti / PtSi布线层。
摘要:
A liquid precursor containing a metal is applied to a substrate, RTP baked, and annealed to form a layered superlattice material. Special polyoxyalkylated precursor solutions are designed to optimize polarizability of the corresponding metal oxide materials by adding dopants including stoichiometric excess amounts of bismuth and tantalum. The RTP baking process is especially beneficial in optimizing the polarizability of the resultant metal oxide.
摘要:
An antifuse element has a dielectric layer comprising materials whose dielectric constant increases in the presence of a DC electric field, such as a ferroelectric. An applied AC electric field and a DC electric field breaks down the dielectric material to form a conductive filament. The AC electric field causes the physical reorientation of the electric dipole of the molecules in the ferroelectric material which creates heat within the ferroelectric material. The DC electric field enhances the heating effect of the AC electric field by enlarging the electric dipole of the ferroelectric molecules. The synergy of the two electric fields permits programming antifuse elements of the present invention by applying DC electric fields as low as 2 volts amplitude.
摘要:
A substrate is prebaked in an oxygen furnace. A thin film of layered superlattice oxide is formed on the substrate by a chemical vapor deposition process. The film is RTP baked to provide grains with a mixed phase of A-axis and C-axis orientation. The film may be treated by ion implantation prior to the RTP bake and oxygen furnace annealed after the RTP bake. An electrode is deposited on the layered superlattice thin film and then the film and electrode are oxygen furnace annealed.
摘要:
A xylene exchange is performed on a stock solution of BST of greater then 99.999% purity dissolved in methoxyethanol, and a carboxylate of a dopant metal, such as magnesium 2-ethylhexanoate is added to form a precursor. The precursor is spun on a first electrode, dried at 400.degree. C. for 2 minutes, then annealed at 750.degree. C. to 800.degree. C. for about an hour to form a layer of accurately doped BST. A second electrode is deposited, patterned, and annealed at between 750.degree. C. to 800.degree. C. for about 30 minutes. Excellent leakage current results if the dopant is magnesium of about 5% molarity. For other dopants, such as Mg, Nb, Y, Bi, and Sn the preferred dopant range is 0.2% to 0.3% molarity. The magnesium-doped material is used as a buffer layer between the electrodes and BST dielectric of an undoped BST capacitor.
摘要:
A non-volatile memory includes a constant voltage source, a bit line, a memory cell having a first ferroelectric capacitor connected between the bit line and the constant voltage source, a source of a reference voltage, and a latch connected between the bit line and the reference voltage. The latch drives the bit line to the same logic state as the ferroelectric capacitor to read and rewrite the capacitor in a single operation. The reference voltage is provided by a ferroelectric dummy capacitor having an area smaller than the area of the first capacitor but greater than 1/2 the area of the first capacitor.