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公开(公告)号:US11683065B2
公开(公告)日:2023-06-20
申请号:US17150610
申请日:2021-01-15
Applicant: QUALCOMM Incorporated
Inventor: Ravi Pramod Kumar Vedula , George Pete Imthurn , Anton Arriagada , Sinan Goktepeli
IPC: H04B1/44 , H03K17/687
CPC classification number: H04B1/44 , H03K17/6874
Abstract: A radio frequency (RF) switch includes switch transistors coupled in series. The RF switch includes a distributed gate bias network coupled to gate electrodes of the switch transistors. The RF switch also includes a distributed body bias network coupled to body electrodes of the switch transistors.
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公开(公告)号:US10896958B2
公开(公告)日:2021-01-19
申请号:US16690454
申请日:2019-11-21
Applicant: QUALCOMM Incorporated
Inventor: Sinan Goktepeli , George Pete Imthurn , Yun Han Chu , Qingqing Liang
Abstract: In certain aspects, an apparatus comprises an SOI MOSFET having a diffusion region as a source or a drain on a back insulating layer, wherein the diffusion region has a front diffusion side and a back diffusion side opposite to the front diffusion side; a silicide layer on the front diffusion side having a back silicide side facing the diffusion region and a front silicide side opposite to the back silicide side; and a backside contact connected to the silicide layer, wherein at least a portion of the backside contact is in the back insulating layer.
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公开(公告)号:US10559520B2
公开(公告)日:2020-02-11
申请号:US15975434
申请日:2018-05-09
Applicant: QUALCOMM Incorporated
Inventor: Sinan Goktepeli , George Pete Imthurn , Stephen Alan Fanelli
IPC: H01L23/48 , H01L21/762 , H01L23/522 , H01L21/768 , H01L21/8234 , H01L25/065 , H01L25/11 , H01L49/02
Abstract: A radio frequency integrated circuit (RFIC) includes a bulk semiconductor die. The RFIC also includes a first active/passive device on a first-side of the bulk semiconductor die, and a first deep trench isolation region extending from the first-side to a second-side opposite the first-side of the bulk semiconductor die. The RFIC also includes a contact layer on the second-side of the bulk semiconductor die. The RFIC further includes a second-side dielectric layer on the contact layer. The first deep trench isolation region may extend through the contact layer and into the second-side dielectric layer.
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公开(公告)号:US10475816B2
公开(公告)日:2019-11-12
申请号:US16000501
申请日:2018-06-05
Applicant: QUALCOMM Incorporated
Inventor: Ravi Pramod Kumar Vedula , Sinan Goktepeli , Jarred Moore
Abstract: A radio frequency integrated circuit (RFIC) is described. The RFIC includes a switch field effect transistor (FET), including a source region, a drain region, a body region, and a gate. The RFIC also includes a body bypass resistor coupled between the gate and the body region. The RFIC further includes a gate isolation resistor coupled between the gate and the body region. The RFIC also includes a diode coupled between the body bypass resistor and the gate isolation resistor.
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公开(公告)号:US10418465B1
公开(公告)日:2019-09-17
申请号:US15969986
申请日:2018-05-03
Applicant: QUALCOMM Incorporated
Inventor: Qingqing Liang , Francesco Carobolante , Sinan Goktepeli , George Imthurn , Fabio Alessio Marino , Narasimhulu Kanike
IPC: H01L29/792 , H01L29/66 , H01L29/788 , H01L27/11556 , G11C16/34 , G11C16/04 , H01L27/105 , H01L27/11 , H01L29/78
Abstract: Certain aspects of the present disclosure provide a memory device. One example memory device generally includes a first semiconductor region having a first region, a second region, and a third region, the second region being between the first region and the third region and having a different doping type than the first region and the third region. In certain aspects, the memory device also includes a first non-insulative region, a first insulative region being disposed between the first non-insulative region and the first semiconductor region. In certain aspects, the memory device may include a second non-insulative region, and a second insulative region disposed between the second region and the second non-insulative region, wherein the first insulative region and the second insulative region are disposed adjacent to opposite sides of the second region.
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公开(公告)号:US09917062B1
公开(公告)日:2018-03-13
申请号:US15266972
申请日:2016-09-15
Applicant: Qualcomm Incorporated
Inventor: Sinan Goktepeli
IPC: H01L23/544 , H01L27/12 , H01L21/683 , H01L21/84 , H01L21/762 , H01L27/13
CPC classification number: H01L23/544 , H01L21/6835 , H01L21/76224 , H01L21/84 , H01L21/845 , H01L27/0694 , H01L27/1203 , H01L27/1211 , H01L27/1266 , H01L27/13 , H01L2221/6835
Abstract: An integrated circuit structure may include an alignment column on a front-side surface of an isolation layer. The alignment column may extend through a backside surface opposite the front-side surface of the isolation layer. The integrated circuit structure may also include front-side transistors on the front-side surface of the isolation layer. The integrated circuit structure may further include backside transistors on the backside surface of the isolation layer. A first front-side transistor is aligned with a first backside transistor according to the alignment column.
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公开(公告)号:US11081559B1
公开(公告)日:2021-08-03
申请号:US16778546
申请日:2020-01-31
Applicant: QUALCOMM Incorporated
Inventor: Qingqing Liang , Sivakumar Kumarasamy , George Pete Imthurn , Sinan Goktepeli
Abstract: Certain aspects of the present disclosure generally relate to a semiconductor device having a backside gate contact. An example semiconductor device generally includes a transistor disposed above a substrate, wherein the transistor comprises a gate region, a channel region, a source region, and a drain region and wherein the gate region is disposed adjacent to the channel region. The semiconductor device further includes a backside gate contact that is electrically coupled to a bottom surface of the gate region and that extends below a bottom surface of the substrate.
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公开(公告)号:US10600910B2
公开(公告)日:2020-03-24
申请号:US16156729
申请日:2018-10-10
Applicant: QUALCOMM Incorporated
Inventor: Qingqing Liang , Ravi Pramod Kumar Vedula , Sivakumar Kumarasamy , George Pete Imthurn , Sinan Goktepeli
IPC: H01L29/78 , H01L29/66 , H01L29/49 , H01L21/762 , H01L29/786 , H01L27/12 , H01L21/28 , H01L29/08
Abstract: An integrated circuit is described. The integrated circuit includes a metal oxide semiconductor field effect transistor (MOSFET). The MOSFET is on a first surface of an insulator layer of the integrated circuit. The MOSFET including a source region, a drain region, and a front gate. The MOSFET also includes an extended drain region between the drain region and a well proximate the front gate. The integrated circuit also includes back gates on a second surface opposite the first surface of the insulator layer. The back gates are overlapped by the extended drain region.
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公开(公告)号:US10083963B2
公开(公告)日:2018-09-25
申请号:US15387501
申请日:2016-12-21
Applicant: QUALCOMM Incorporated
Inventor: Sinan Goktepeli , Jean Richaud
IPC: H01L27/092 , H01L21/8238 , H01L29/06 , H01L29/423 , H01L21/768 , H01L21/822 , H01L27/06
CPC classification number: H01L27/0924 , H01L21/76895 , H01L21/76897 , H01L21/76898 , H01L21/8221 , H01L21/823821 , H01L21/823871 , H01L21/823878 , H01L21/84 , H01L21/845 , H01L23/481 , H01L23/485 , H01L27/0694 , H01L27/092 , H01L27/1203 , H01L27/1211 , H01L29/0649 , H01L29/0676 , H01L29/42392
Abstract: An integrated circuit device may include a p-type metal oxide semiconductor (PMOS) transistor supported by a backside of an isolation layer. The integrated circuit device may also include an n-type metal oxide semiconductor (NMOS) transistor supported by a front-side of the isolation layer, opposite the backside. The integrated circuit device may further include a shared contact extending through the isolation layer and electrically coupling a first terminal of the PMOS transistor to the first terminal of the NMOS transistor.
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公开(公告)号:US10002838B2
公开(公告)日:2018-06-19
申请号:US15189893
申请日:2016-06-22
Applicant: QUALCOMM Incorporated
Inventor: Sinan Goktepeli
IPC: H01L21/70 , H01L23/66 , H01L41/09 , H01L27/146 , H01L23/522 , H01L21/768
CPC classification number: H01L23/66 , H01L23/481 , H01L23/5225 , H01L27/1203 , H01L27/1464 , H01L29/66742 , H01L29/78603 , H01L29/78633 , H01L29/78648 , H01L41/09 , H01L2224/03002 , H01L2224/0401 , H01L2224/11002 , H01L2224/13022 , H01L2924/1421
Abstract: An integrated radio frequency (RF) circuit structure may include an active device on a first surface of an isolation layer. The integrated RF circuit structure may also include a back-bias metallization on a second surface opposite the first surface of the isolation layer. A body of the active device is biased by the back-bias metallization. The integrated RF circuit structure may further include a handle substrate on a front-side dielectric layer on the active device.
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