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公开(公告)号:US20180122766A1
公开(公告)日:2018-05-03
申请号:US15729715
申请日:2017-10-11
Applicant: Renesas Electronics Corporation
Inventor: Noriko OKUNISHI , Toshinori KIYOHARA
IPC: H01L23/00 , H01L23/495 , H01L23/29 , H01L23/31
CPC classification number: H01L24/46 , H01L21/565 , H01L23/293 , H01L23/3107 , H01L23/3114 , H01L23/4951 , H01L23/49524 , H01L23/49562 , H01L23/49575 , H01L24/09 , H01L24/45 , H01L24/49 , H01L24/85 , H01L2224/04042 , H01L2224/0603 , H01L2224/45124 , H01L2224/45144 , H01L2224/4807 , H01L2224/48175 , H01L2224/48247 , H01L2224/4903 , H01L2924/13055 , H01L2924/183 , H01L2924/00 , H01L2924/00014
Abstract: A performance of a semiconductor device is improved. The semiconductor device according to one embodiment includes a wire that is bonded to one bonding surface at a plurality of parts in an opening formed in an insulating film of a semiconductor chip. The semiconductor device includes also a sealer that seals the semiconductor chip and the wire so that the sealer is in contact with the bonding surface. An area of a part of the bonding surface, the part not overlapping the wire, is small.
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公开(公告)号:US20200035638A1
公开(公告)日:2020-01-30
申请号:US16594160
申请日:2019-10-07
Applicant: Renesas Electronics Corporation
Inventor: Noriko OKUNISHI , Toshinori KIYOHARA
IPC: H01L23/00 , H01L23/29 , H01L23/31 , H01L23/495
Abstract: A performance of a semiconductor device is improved. The semiconductor device according to one embodiment includes a wire that is bonded to one bonding surface at a plurality of parts in an opening formed in an insulating film of a semiconductor chip. The semiconductor device includes also a sealer that seals the semiconductor chip and the wire so that the sealer is in contact with the bonding surface. An area of a part of the bonding surface, the part not overlapping the wire, is small.
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公开(公告)号:US20160204057A1
公开(公告)日:2016-07-14
申请号:US14901424
申请日:2013-07-05
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Yuichi YATO , Hiroi OKA , Noriko OKUNISHI , Keita TAKADA
IPC: H01L23/498 , H01L23/31 , H01L23/13
CPC classification number: H01L23/49513 , H01L21/565 , H01L23/13 , H01L23/16 , H01L23/24 , H01L23/3121 , H01L23/3142 , H01L23/4952 , H01L23/49524 , H01L23/49541 , H01L23/49548 , H01L23/49562 , H01L23/49582 , H01L23/49805 , H01L23/49844 , H01L23/562 , H01L24/05 , H01L24/06 , H01L24/29 , H01L24/32 , H01L24/37 , H01L24/40 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/743 , H01L24/77 , H01L2224/05624 , H01L2224/05644 , H01L2224/0603 , H01L2224/2929 , H01L2224/29339 , H01L2224/32245 , H01L2224/37147 , H01L2224/40091 , H01L2224/40095 , H01L2224/40245 , H01L2224/40247 , H01L2224/45014 , H01L2224/45124 , H01L2224/45144 , H01L2224/48247 , H01L2224/48624 , H01L2224/48644 , H01L2224/73221 , H01L2224/73263 , H01L2224/73265 , H01L2224/743 , H01L2224/83192 , H01L2224/83439 , H01L2224/8385 , H01L2224/83862 , H01L2224/84205 , H01L2224/84439 , H01L2224/8501 , H01L2224/85181 , H01L2224/85205 , H01L2224/85439 , H01L2224/92157 , H01L2224/92247 , H01L2924/00014 , H01L2924/1301 , H01L2924/13091 , H01L2924/15747 , H01L2924/181 , H01L2924/18301 , H01L2924/351 , H01L2924/00 , H01L2924/0665 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
Abstract: A semiconductor device according to an embodiment is a semiconductor device in which a semiconductor chip mounted on a chip mounting part is sealed by resin and a first member is fixed to a chip mounting surface side between a peripheral portion of the semiconductor chip and a peripheral portion of the chip mounting part. Also, the first member is sealed by the resin. Also, a length of the first part of the chip mounting part in the first direction is larger than a length of the semiconductor chip in the first direction, in a plan view.
Abstract translation: 根据实施例的半导体器件是半导体器件,其中安装在芯片安装部分上的半导体芯片被树脂密封,并且第一构件固定到半导体芯片的周边部分与周边部分之间的芯片安装表面侧 的芯片安装部分。 此外,第一构件被树脂密封。 此外,芯片安装部分的第一方向的第一部分的长度在平面图中大于半导体芯片沿第一方向的长度。
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公开(公告)号:US20220392865A1
公开(公告)日:2022-12-08
申请号:US17717756
申请日:2022-04-11
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Noriko OKUNISHI , Toshiyuki HATA
IPC: H01L23/00
Abstract: In order to reduce on-resistance in a semiconductor device to be used for high current applications, the semiconductor device includes a source terminal lead located between a gate terminal lead and a Kelvin terminal lead in plan view and electrically connected with a source terminal via a plurality of wires.
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公开(公告)号:US20170170100A1
公开(公告)日:2017-06-15
申请号:US15444773
申请日:2017-02-28
Applicant: Renesas Electronics Corporation
Inventor: Yuichi YATO , Hiroi OKA , Noriko OKUNISHI , Keita TAKADA
IPC: H01L23/495 , H01L23/24 , H01L23/00 , H01L23/13 , H01L23/31
CPC classification number: H01L23/49513 , H01L21/565 , H01L23/13 , H01L23/16 , H01L23/24 , H01L23/3121 , H01L23/3142 , H01L23/4952 , H01L23/49524 , H01L23/49541 , H01L23/49548 , H01L23/49562 , H01L23/49582 , H01L23/49805 , H01L23/49844 , H01L23/562 , H01L24/05 , H01L24/06 , H01L24/29 , H01L24/32 , H01L24/37 , H01L24/40 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/743 , H01L24/77 , H01L2224/05624 , H01L2224/05644 , H01L2224/0603 , H01L2224/2929 , H01L2224/29339 , H01L2224/32245 , H01L2224/37147 , H01L2224/40091 , H01L2224/40095 , H01L2224/40245 , H01L2224/40247 , H01L2224/45014 , H01L2224/45124 , H01L2224/45144 , H01L2224/48247 , H01L2224/48624 , H01L2224/48644 , H01L2224/73221 , H01L2224/73263 , H01L2224/73265 , H01L2224/743 , H01L2224/83192 , H01L2224/83439 , H01L2224/8385 , H01L2224/83862 , H01L2224/84205 , H01L2224/84439 , H01L2224/8501 , H01L2224/85181 , H01L2224/85205 , H01L2224/85439 , H01L2224/92157 , H01L2224/92247 , H01L2924/00014 , H01L2924/1301 , H01L2924/13091 , H01L2924/15747 , H01L2924/181 , H01L2924/18301 , H01L2924/351 , H01L2924/00 , H01L2924/0665 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
Abstract: A semiconductor device according to an embodiment is a semiconductor device in which a semiconductor chip mounted on a chip mounting part is sealed by resin and a first member is fixed to a chip mounting surface side between a peripheral portion of the semiconductor chip and a peripheral portion of the chip mounting part. Also, the first member is sealed by the resin. Also, a length of the first part of the chip mounting part in the first direction is larger than a length of the semiconductor chip in the first direction, in a plan view.
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