公开(公告)号：US20190043798A1

公开(公告)日：2019-02-07

申请号：US16157430

申请日：2018-10-11

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Lu-Yi Chen ,  Hung-Yuan Li ,  Chieh-Lung Lai ,  Shih-Liang Peng ,  Chang-Lun Lu

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00 ,  H01L25/065 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/561 ,  H01L21/563 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2224/85 ,  H01L2924/014 ,  H01L2924/00014

Abstract: An electronic package is provided, which includes: a circuit structure having opposite first and second surfaces; a metal layer formed on the first surface of the circuit structure; an electronic element disposed on the metal layer; an encapsulant encapsulating the electronic element; a plurality of conductive posts disposed on the second surface of the circuit structure; and an insulating layer encapsulating the conductive posts. The conductive posts of various sizes can be fabricated according to different aspect ratio requirements so as to make end products lighter, thinner, shorter and smaller. The disclosure further provides a method for fabricating the electronic package.

公开(公告)号：US20170243834A1

公开(公告)日：2017-08-24

申请号：US15149576

申请日：2016-05-09

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chieh-Lung Lai ,  Mao-Hua Yeh ,  Hung-Yuan Li ,  Shih-Liang Peng ,  Chang-Lun Lu

IPC: H01L23/00 ,  H01L21/56 ,  H01L21/48 ,  H01L23/498 ,  H01L23/31

CPC classification number: H01L23/562 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/565 ,  H01L23/147 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L24/97 ,  H01L2021/60022 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2924/37001 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A semiconductor substrate is provided, including a substrate body, a plurality of conductive through holes penetrating the substrate body, and at least one pillar disposed in the substrate body with the at least one pillar being free from penetrating the substrate body. When the semiconductor substrate is heated, the at least one pillar adjusts the expansion of upper and lower sides of the substrate body. Therefore, the upper and lower sides of the substrate body have substantially the same thermal deformation, and the substrate body is prevented from warpage.

公开(公告)号：US09831191B2

公开(公告)日：2017-11-28

申请号：US15149576

申请日：2016-05-09

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chieh-Lung Lai ,  Mao-Hua Yeh ,  Hung-Yuan Li ,  Shih-Liang Peng ,  Chang-Lun Lu

IPC: H01L23/498 ,  H01L23/31 ,  H01L21/48 ,  H01L23/00 ,  H01L21/56 ,  H01L21/60

CPC classification number: H01L23/562 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/565 ,  H01L23/147 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L24/97 ,  H01L2021/60022 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2924/37001 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A semiconductor substrate is provided, including a substrate body, a plurality of conductive through holes penetrating the substrate body, and at least one pillar disposed in the substrate body with the at least one pillar being free from penetrating the substrate body. When the semiconductor substrate is heated, the at least one pillar adjusts the expansion of upper and lower sides of the substrate body. Therefore, the upper and lower sides of the substrate body have substantially the same thermal deformation, and the substrate body is prevented from warpage.

公开(公告)号：US09899309B2

公开(公告)日：2018-02-20

申请号：US15084762

申请日：2016-03-30

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Shih-Ching Chen ,  Shih-Liang Peng ,  Chieh-Lung Lai ,  Jia-Wei Pan ,  Chang-Lun Lu

IPC: H01L23/00 ,  H01L23/48 ,  H01L29/02 ,  H01L25/065 ,  H01L23/498 ,  H01L23/31 ,  H01L25/16 ,  H01L21/48

CPC classification number: H01L21/4846 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/562 ,  H01L24/17 ,  H01L25/0655 ,  H01L25/16 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2924/15151

Abstract: A semiconductor substrate is provided, including a substrate body having a lateral surface, and a protruding structure extending outward from the lateral surface. The semiconductor substrate distributes stresses generated during a manufacturing process through the protruding structure, and is thus prevented from delamination or being cracked. An electronic package having the semiconductor substrate is also provided.

公开(公告)号：US09058971B2

公开(公告)日：2015-06-16

申请号：US13905703

申请日：2013-05-30

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chih-Yuan Shih ,  Shih-Liang Peng ,  Jung-Pin Huang ,  Chin-Yu Ku ,  Hsien-Wen Chen

IPC: H01L27/15 ,  H01L29/26 ,  H01L31/12 ,  H01L33/00 ,  H01L25/00 ,  H01S5/022 ,  H01S5/024 ,  H01S5/062 ,  H01S5/42

CPC classification number: H01L25/00 ,  H01L2224/48091 ,  H01S5/02252 ,  H01S5/0226 ,  H01S5/02276 ,  H01S5/02288 ,  H01S5/02469 ,  H01S5/06226 ,  H01S5/423 ,  H01L2924/00014

Abstract: An electro-optical module is provided, which includes: a substrate having a first surface with a groove and an opposite second surface; a plurality of support members disposed on the first surface of the substrate; at least an electro-optical element having opposite active and non-active surfaces and disposed in the groove of the substrate via the non-active surface thereof; an interposer disposed on the first surface of the substrate and the electro-optical element for electrically connecting the electro-optical element to the substrate, wherein the interposer has a through hole corresponding in position to the active surface of the electro-optical element; and a transparent plate disposed over the first surface of the substrate and the interposer through the support members and having a lens portion corresponding in position to the through hole of the interposer, thereby reducing signal losses, improving alignment precision, and achieving preferred thermal dissipation and EMI shielding effects.

Abstract translation: 提供了一种电光模块，其包括：具有第一表面和第二表面的基板; 设置在所述基板的第一表面上的多个支撑构件; 至少一个电光元件具有相对的有源和非有源表面，并经由其非有效表面设置在衬底的沟槽中; 设置在基板的第一表面上的插入器和用于将电光元件电连接到基板的电光元件，其中插入器具有与电光元件的有源表面相对应的通孔; 以及设置在基板的第一表面上的透明板和穿过支撑构件的中介层，并且具有与插入件的通孔对应的透镜部分，从而减少信号损失，提高对准精度，并实现优选的散热和 EMI屏蔽效果。

公开(公告)号：US20140192832A1

公开(公告)日：2014-07-10

申请号：US13905703

申请日：2013-05-30

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chih-Yuan Shih ,  Shih-Liang Peng ,  Jung-Pin Huang ,  Chin-Yu Ku ,  Hsien-Wen Chen

IPC: H01S5/062

CPC classification number: H01L25/00 ,  H01L2224/48091 ,  H01S5/02252 ,  H01S5/0226 ,  H01S5/02276 ,  H01S5/02288 ,  H01S5/02469 ,  H01S5/06226 ,  H01S5/423 ,  H01L2924/00014

Abstract: An electro-optical module is provided, which includes: a substrate having a first surface with a groove and an opposite second surface; a plurality of support members disposed on the first surface of the substrate; at least an electro-optical element having opposite active and non-active surfaces and disposed in the groove of the substrate via the non-active surface thereof; an interposer disposed on the first surface of the substrate and the electro-optical element for electrically connecting the electro-optical element to the substrate, wherein the interposer has a through hole corresponding in position to the active surface of the electro-optical element; and a transparent plate disposed over the first surface of the substrate and the interposer through the support members and having a lens portion corresponding in position to the through hole of the interposer, thereby reducing signal losses, improving alignment precision, and achieving preferred thermal dissipation and EMI shielding effects.

Abstract translation: 提供了一种电光模块，其包括：具有第一表面和第二表面的基板; 设置在所述基板的第一表面上的多个支撑构件; 至少一个电光元件具有相对的有源和非有源表面，并经由其非有效表面设置在衬底的沟槽中; 设置在基板的第一表面上的插入器和用于将电光元件电连接到基板的电光元件，其中插入器具有与电光元件的有源表面相对应的通孔; 以及设置在基板的第一表面上的透明板和穿过支撑构件的中介层，并且具有与插入件的通孔对应的透镜部分，从而减少信号损失，提高对准精度，并实现优选的散热和 EMI屏蔽效果。

公开(公告)号：US10403570B2

公开(公告)日：2019-09-03

申请号：US16157430

申请日：2018-10-11

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Lu-Yi Chen ,  Hung-Yuan Li ,  Chieh-Lung Lai ,  Shih-Liang Peng ,  Chang-Lun Lu

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L25/065 ,  H01L25/00 ,  H01L23/00

Abstract: An electronic package is provided, which includes: a circuit structure having opposite first and second surfaces; a metal layer formed on the first surface of the circuit structure; an electronic element disposed on the metal layer; an encapsulant encapsulating the electronic element; a plurality of conductive posts disposed on the second surface of the circuit structure; and an insulating layer encapsulating the conductive posts. The conductive posts of various sizes can be fabricated according to different aspect ratio requirements so as to make end products lighter, thinner, shorter and smaller. The disclosure further provides a method for fabricating the electronic package.

公开(公告)号：US10128178B2

公开(公告)日：2018-11-13

申请号：US15258441

申请日：2016-09-07

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Lu-Yi Chen ,  Hung-Yuan Li ,  Chieh-Lung Lai ,  Shih-Liang Peng ,  Chang-Lun Lu

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L25/065 ,  H01L25/00 ,  H01L23/00

Abstract: An electronic package is provided, which includes: a circuit structure having opposite first and second surfaces; a metal layer formed on the first surface of the circuit structure; an electronic element disposed on the metal layer; an encapsulant encapsulating the electronic element; a plurality of conductive posts disposed on the second surface of the circuit structure; and an insulating layer encapsulating the conductive posts. The conductive posts of various sizes can be fabricated according to different aspect ratio requirements so as to make end products lighter, thinner, shorter and smaller. The disclosure further provides a method for fabricating the electronic package.

公开(公告)号：US20170338173A1

公开(公告)日：2017-11-23

申请号：US15258441

申请日：2016-09-07

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Lu-Yi Chen ,  Hung-Yuan Li ,  Chieh-Lung Lai ,  Shih-Liang Peng ,  Chang-Lun Lu

IPC: H01L23/498 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00 ,  H01L21/48

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/561 ,  H01L21/563 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2224/85 ,  H01L2924/014 ,  H01L2924/00014

Abstract: An electronic package is provided, which includes: a circuit structure having opposite first and second surfaces; a metal layer formed on the first surface of the circuit structure; an electronic element disposed on the metal layer; an encapsulant encapsulating the electronic element; a plurality of conductive posts disposed on the second surface of the circuit structure; and an insulating layer encapsulating the conductive posts. The conductive posts of various sizes can be fabricated according to different aspect ratio requirements so as to make end products lighter, thinner, shorter and smaller. The disclosure further provides a method for fabricating the electronic package.

公开(公告)号：US20170256481A1

公开(公告)日：2017-09-07

申请号：US15084762

申请日：2016-03-30

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Shih-Ching Chen ,  Shih-Liang Peng ,  Chieh-Lung Lai ,  Jia-Wei Pan ,  Chang-Lun Lu

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L25/16 ,  H01L23/31 ,  H01L25/065

CPC classification number: H01L21/4846 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/562 ,  H01L24/17 ,  H01L25/0655 ,  H01L25/16 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2924/15151

Abstract: A semiconductor substrate is provided, including a substrate body having a lateral surface, and a protruding structure extending outward from the lateral surface. The semiconductor substrate distributes stresses generated during a manufacturing process through the protruding structure, and is thus prevented from delamination or being cracked. An electronic package having the semiconductor substrate is also provided.