公开(公告)号：US08486834B2

公开(公告)日：2013-07-16

申请号：US13115039

申请日：2011-05-24

申请人： Ping Hsu ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Ping Hsu ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L21/768

CPC分类号： H01L27/10873 ,  H01L21/76834 ,  H01L21/7684 ,  H01L23/485 ,  H01L27/10888 ,  H01L2924/0002 ,  H01L2924/00

摘要： The disclosure provides a method for manufacturing a memory device, including: providing a plurality of gate structures formed on a substrate, wherein the gate structures comprise a cap layer disposed on the top of the gate structure, and each two adjacent gate structures are separated by a gap; blanketly forming a polysilicon layer on the substrate to fill the gap; performing a planarization process to the polysilicon layer, obtaining a polysilicon plug; and performing an oxidation process after the planarization process, converting a part of the polysilicon plug and a residual polysilicon layer over the gate structure to silicon oxide.

摘要翻译： 本公开提供了一种用于制造存储器件的方法，包括：提供形成在衬底上的多个栅极结构，其中栅极结构包括设置在栅极结构的顶部上的覆盖层，并且每个两个相邻的栅极结构由 一个沟; 在基底上覆盖地形成多晶硅层以填补间隙; 对多晶硅层进行平坦化处理，获得多晶硅插塞; 并且在平坦化处理之后进行氧化处理，将多晶硅插塞的一部分和栅极结构上的剩余多晶硅层转换成氧化硅。

公开(公告)号：US08470515B2

公开(公告)日：2013-06-25

申请号：US13233039

申请日：2011-09-15

申请人： Tse-Yao Huang ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Tse-Yao Huang ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： G03C5/00

CPC分类号： G03F7/094 ,  G03F7/095 ,  G03F7/32 ,  G03F7/38 ,  H01L21/0275 ,  H01L21/0277 ,  H01L21/32139

摘要： A method of forming an etch mask includes: providing a substrate having thereon a material layer to be etched; forming a hard mask layer consisting of a radiation-sensitive, single-layer resist material on the material layer; exposing the hard mask layer to actinic energy to change solvent solubility of exposed regions of the hard mask layer; and subjecting the hard mask layer to water treatment to remove the exposed regions of the hard mask layer, thereby forming a masking pattern consisting of unexposed regions of the hard mask layer.

摘要翻译： 形成蚀刻掩模的方法包括：提供其上具有要蚀刻的材料层的基板; 在材料层上形成由辐射敏感的单层抗蚀剂材料组成的硬掩模层; 将硬掩模层暴露于光化能以改变硬掩模层的暴露区域的溶剂溶解度; 并对硬掩模层进行水处理以除去硬掩模层的暴露区域，从而形成由硬掩模层的未曝光区域构成的掩模图案。

公开(公告)号：US08410535B2

公开(公告)日：2013-04-02

申请号：US13093840

申请日：2011-04-25

申请人： Kuo-Hui Su ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Kuo-Hui Su ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L27/108 ,  H01L29/76 ,  H01L21/8242

CPC分类号： H01L28/75

摘要： A capacitor and a manufacturing method thereof are provided. The capacitor includes a first electrode, a first metal layer, a dielectric layer and a second electrode. The first electrode is disposed on a substrate. The first metal layer is disposed on the first electrode. The dielectric layer is disposed on the first metal layer, wherein the material of the first metal layer does not react with the material of the dielectric layer. The second electrode is disposed on the dielectric layer.

摘要翻译： 提供电容器及其制造方法。 电容器包括第一电极，第一金属层，电介质层和第二电极。 第一电极设置在基板上。 第一金属层设置在第一电极上。 电介质层设置在第一金属层上，其中第一金属层的材料不与电介质层的材料反应。 第二电极设置在电介质层上。

公开(公告)号：US20130074878A1

公开(公告)日：2013-03-28

申请号：US13243315

申请日：2011-09-23

申请人： Jeng-Hsing Jang ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Jeng-Hsing Jang ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： B08B7/00

CPC分类号： B08B17/025 ,  H01L21/67051 ,  H01L21/6715 ,  Y10S134/902

摘要： A wafer scrubber is disclosed, including a chamber, and a holder connecting to a spindle disposed in the chamber, wherein the holder supports a wafer, and the wafer spins to remove water on the wafer, and a mashed inner cup comprising a plurality of through holes disposed between the holder and a wall of the chamber, wherein the mashed inner cup receives water from a surface of the wafer and rotates around the spindle to release the water through the through holes.

摘要翻译： 公开了一种晶片洗涤器，其包括腔室和连接到设置在腔室中的心轴的保持器，其中保持器支撑晶片，并且晶片旋转以去除晶片上的水，以及捣碎的内杯，其包括多个通孔 设置在保持器和室的壁之间的孔，其中，捣碎的内杯从晶片的表面接收水并围绕心轴旋转以通过通孔释放水。

公开(公告)号：US08399321B2

公开(公告)日：2013-03-19

申请号：US13111745

申请日：2011-05-19

申请人： Ping Hsu ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Ping Hsu ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L21/8242 ,  H01L21/336 ,  H01L21/425

CPC分类号： H01L27/10867 ,  H01L21/26586 ,  H01L27/10873 ,  H01L29/1083 ,  H01L29/66659

摘要： The method for manufacturing a memory device is provided. The method includes: implanting a first impurity into the substrate adjacent to the gate conductor structure to form a source region on a first side of the gate conductor structure and a drain region on a second side of the gate conductor structure; implanting a second impurity into the substrate to form a halo implantation region disposed adjacent to the source region, wherein the halo implantation region has a doping concentration which does not degrade a data retention time of the memory device; and performing an annealing process to the drain region, forming a diffusion region under the drain region, wherein the process temperature of the annealing process is controlled to ensure that the diffusion region has a doping concentration substantially equal to a threshold concentration which maintains an electrical connection between the drain and the deep trench capacitor.

摘要翻译： 提供了一种用于制造存储器件的方法。 该方法包括：将第一杂质注入到与栅极导体结构相邻的衬底中，以在栅极导体结构的第一侧上形成源极区，在栅极导体结构的第二侧上形成漏极区; 将第二杂质注入到所述衬底中以形成邻近所述源极区设置的卤素注入区，其中所述晕圈注入区具有不降解所述存储器件的数据保留时间的掺杂浓度; 对所述漏极区进行退火处理，在所述漏极区域下方形成扩散区域，其中，控制所述退火处理的工艺温度，以确保所述扩散区域的掺杂浓度基本上等于保持电连接的阈值浓度 在漏极和深沟槽电容器之间。

公开(公告)号：US20130043470A1

公开(公告)日：2013-02-21

申请号：US13214227

申请日：2011-08-21

申请人： Tse-Yao Huang ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Tse-Yao Huang ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L23/544 ,  H01L21/762 ,  H01L23/482

CPC分类号： H01L21/76224 ,  H01L23/562 ,  H01L23/585 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention in a first aspect proposes a semiconductor structure with a crack stop structure. The semiconductor structure includes a matrix, an integrated circuit and a scribe line. The matrix includes a scribe line region and a circuit region. The integrated circuit is disposed within the circuit region. The scribe line is disposed within the scribe line region and includes a crack stop trench which is disposed in the matrix and adjacent to the circuit region. The crack stop trench is parallel with one side of the circuit region and filled with a composite material in the form of a grid to form a crack stop structure.

摘要翻译： 本发明在第一方面提出了一种具有裂纹停止结构的半导体结构。 半导体结构包括矩阵，集成电路和划线。 矩阵包括划线区域和电路区域。 集成电路设置在电路区域内。 划痕线设置在划线区域内并且包括设置在矩阵中并且邻近电路区域的裂缝停止沟槽。 裂缝停止沟槽与电路区域的一侧平行，并填充有格栅形式的复合材料以形成裂纹停止结构。

公开(公告)号：US20120289134A1

公开(公告)日：2012-11-15

申请号：US13106861

申请日：2011-05-13

申请人： Li-Chung Liu ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Li-Chung Liu ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： B24B57/00

CPC分类号： B24B57/02 ,  B24B37/04

摘要： A CMP slurry mix and delivery system includes at least one container for holding a polishing agent; a pump connected to the container for pumping the polishing agent to a point of use; and a slurry dispersion unit installed between the pump and the point of use, wherein slurry dispersion unit provides megasonic energy that is capable of dispersing the polishing agent flowing through the slurry dispersion unit.

摘要翻译： CMP浆料混合和输送系统包括至少一个用于保持抛光剂的容器; 连接到容器以将抛光剂泵送到使用点的泵; 以及安装在泵和使用点之间的浆料分散单元，其中浆料分散单元提供能够分散流过浆料分散单元的抛光剂的兆声波能量。

公开(公告)号：US20120288968A1

公开(公告)日：2012-11-15

申请号：US13106837

申请日：2011-05-12

申请人： Ming-Teng Hsieh ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Ming-Teng Hsieh ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L21/66

CPC分类号： H01L22/20 ,  H01L22/14 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for repairing a semiconductor structure having a current-leakage issue includes finding a semiconductor structure having a current-leakage issue through application of a test voltage from an electric test device and applying an electric power stress to the semiconductor structure to melt a stringer or a bridge between two conductive elements or to allow the stringer or the bridge to be oxidized.

摘要翻译： 一种用于修复具有电流泄漏问题的半导体结构的方法包括通过施加来自电测试装置的测试电压来发现具有电流泄漏问题的半导体结构，并向半导体结构施加电力应力以熔化桁条或 两个导电元件之间的桥梁或允许桁条或桥被氧化。

公开(公告)号：US20120288967A1

公开(公告)日：2012-11-15

申请号：US13105909

申请日：2011-05-12

申请人： Ming-Teng Hsieh ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Ming-Teng Hsieh ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L21/30 ,  H01L21/306

CPC分类号： H01L21/56 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1434 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method for decapsulating an integrated circuit package without the need of using a mask during the decapsulation process is disclosed. First, a package is provided. The package includes at least a circuit element and a molding compound enclosing the circuit. Second, a caustic solution is simultaneously provided. The caustic solution is capable of etching the molding compound and intermittently contacts a pre-selected area of the molding compound to etch the molding compound. As a consequence, the caustic solution removes the molding compound in the pre-selected area so the circuit element in the package is substantially exposed.

摘要翻译： 公开了一种在解封装过程中不需要使用掩模的集成电路封装的封装方法。 首先，提供一个包装。 封装件至少包括电路元件和封装电路的模塑料。 其次，同时提供苛性碱溶液。 苛性溶液能够蚀刻模塑料并间歇地接触模塑料的预先选择的区域以蚀刻模塑料。 因此，苛性溶液去除了预选区域中的模塑料，使得包装中的电路元件基本上暴露出来。

公开(公告)号：US20120288684A1

公开(公告)日：2012-11-15

申请号：US13106841

申请日：2011-05-12

申请人： Ming-Teng Hsieh ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Ming-Teng Hsieh ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： B32B3/00 ,  B23K1/20 ,  B23K31/02

CPC分类号： H01L24/85 ,  H01L23/3121 ,  H01L23/4952 ,  H01L23/49575 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/78 ,  H01L25/0657 ,  H01L2224/1134 ,  H01L2224/13019 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/4847 ,  H01L2224/48479 ,  H01L2224/48499 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/81191 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/181 ,  Y10T428/24612 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/4554

摘要： A bump structure including a base portion, an inlaid wire segment, and a protruding tail segment is provided. The base portion is bonded on a bonding site. The inlaid wire segment is pressed into a top surface of the base portion. The protruding tail segment extends from the inlaid wire segment. The methods for forming the bump structure are also provided.

摘要翻译： 提供了包括基部，镶嵌线段和突出尾段的凸块结构。 基部结合在接合部位上。 嵌入的线段被压入基部的顶表面。 突出的尾部段从嵌入的线段延伸。 还提供了用于形成凸块结构的方法。