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公开(公告)号：US11769807B2
公开(公告)日：2023-09-26
申请号：US16948788
申请日：2020-10-01
发明人： Woochul Jeon
IPC分类号： H01L29/66 , H01L29/417 , H01L29/778 , H01L29/20
CPC分类号： H01L29/41758 , H01L29/66462 , H01L29/778 , H01L29/2003
摘要： Semiconductor devices, such as a lateral HEMT, may display current flow between a plurality of interdigitated source fingers and drain fingers, and controlled by a common gate connection. An extended source finger contact may enable improved voltage control across the source fingers, even for large devices with many and/or lengthy source fingers. In this way, unwanted subthreshold operations and switching oscillations may be avoided by reliably maintaining a source voltage at a desired level, to thereby provide fast and reliable switching.
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公开(公告)号：US20230299718A1
公开(公告)日：2023-09-21
申请号：US18322077
申请日：2023-05-23
CPC分类号： H03B5/1237 , H03B5/129 , H03B5/1271 , H03L7/00 , H03F3/45475 , H03K5/00006 , H03B5/1293
摘要： Circuits and processes for locking a voltage-controlled oscillator (VCO) at a high frequency signal are described. A circuit may include a voltage-controlled oscillator configured to generate a high frequency signal based on a control signal, a dummy load parallel to the voltage-controlled oscillator and configured to receive the control signal via a switch, and a digital-to-analog converter coupled to the voltage-controlled oscillator where the control signal is generated based on an output of the digital-to-analog converter.
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公开(公告)号：US11759822B2
公开(公告)日：2023-09-19
申请号：US16867298
申请日：2020-05-05
发明人： Zdenek Axman , Tomas Suchy , Petr Kamenicky
IPC分类号： B06B1/02
CPC分类号： B06B1/0215 , B06B2201/30 , B06B2201/55
摘要： Embodiments include a primary short circuit (PSC) coupled to a primary side of a transformer and a dampening element, coupled to a transducer coupled to a secondary side of the transformer, configured to dampen a received signal during a portion of a reverberation period. The PSC and the dampening element may be activated substantially simultaneously. Activation of the PSC circuit mitigates a parallel resonance otherwise arising, in part, in the transducer, but, increases the received signal by a DC shift voltage. The dampening element dampens the DC shift voltage. The received signal may be dampened prior to amplification of the received signal by an amplifier. The dampening facilitates earlier and more precise measurement, during the reverberation period, of at least one operating characteristic for the PAS sensor. Another embodiment prevents the DC shift voltage by selectively activating the PSC within a determined time of a zero-crossing of a given signal.
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公开(公告)号：US20230288951A1
公开(公告)日：2023-09-14
申请号：US17935967
申请日：2022-09-28
发明人： Moez KANOUN
IPC分类号： G05F3/26
CPC分类号： G05F3/26
摘要： A bandgap reference circuit includes a complimentary to absolute temperature (CTAT) current generator providing a CTAT current with a source degeneration resistor, and a proportional to absolute temperature (PTAT) current generator providing a PTAT current. The PTAT current generator includes a first branch with a source degeneration resistor, a first p-type metal-oxide semiconductor (PMOS) transistor, and a first n-type metal oxide semiconductor (NMOS) transistor, a resistor, and a diode-connected transistor. A second branch includes a source degeneration resistor, a second PMOS transistor, a second NMOS transistor, and a diode-connected transistor. The second branch coupled to the first branch in a current mirror configuration. A chopper circuit alternately couples drain terminals of the first and second PMOS transistors in series to the remainder of their respective branches.
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公开(公告)号：US11742857B2
公开(公告)日：2023-08-29
申请号：US17810745
申请日：2022-07-05
发明人： Alexander Heubi
IPC分类号： H03K19/01 , H03K19/0185 , H03K3/037 , H03K19/20
CPC分类号： H03K19/018521 , H03K3/037 , H03K19/20
摘要： A level shifter circuit shifts a digital signal between first and second voltage levels. For a LOW to HIGH transition, an output PMOS transistor is switched on using a first NMOS transistor activated by the digital signal at the first voltage level while a second NMOS transistor is switched off to uncouple the output PMOS transistor from ground, and a third NMOS transistor is switched off to uncouple a current mirror circuit from ground. For a HIGH to LOW transition, the output PMOS transistor is switched off and a fourth NMOS transistor is switched on using an output of the current mirror circuit. The second NMOS transistor is switched on using an inverted version of the digital signal, and the current in the current mirror circuit is turned off with a fifth NMOS transistor when the drain of the output PMOS transistor approaches the voltage level of ground.
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公开(公告)号：US11742381B2
公开(公告)日：2023-08-29
申请号：US16948801
申请日：2020-10-01
发明人： Peter Moens , Gordon M. Grivna , Yusheng Lin
IPC分类号： H01L29/06 , H01L25/07 , H01L29/20 , H01L21/762
CPC分类号： H01L29/0649 , H01L21/76224 , H01L25/071 , H01L29/2003
摘要： In a general aspect, a semiconductor device assembly can include a semiconductor substrate that excludes a buried oxide layer. The semiconductor device assembly can also include a first semiconductor device stack disposed on a first portion of the semiconductor substrate, and a second semiconductor device stack disposed on a second portion of the semiconductor substrate. The semiconductor device assembly can further include an isolation trench having a dielectric material disposed therein, the isolation trench being disposed between the first portion of the semiconductor substrate and the second portion of the semiconductor substrate. The isolation trench can electrically isolate the first portion of the semiconductor substrate from the second portion of the semiconductor substrate.
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公开(公告)号：US11735497B2
公开(公告)日：2023-08-22
申请号：US16722419
申请日：2019-12-20
发明人： Takashi Noma , Hideyuki Inotsume , Kazuo Okada
IPC分类号： H01L21/768 , H01L21/683 , H01L21/78 , H01L23/522 , H01L23/48 , H01L23/532 , H01L23/00 , H01L21/304 , H01L21/3065 , H01L21/311 , H01L21/288 , H01L23/528 , H01L49/02
CPC分类号： H01L23/481 , H01L21/288 , H01L21/2885 , H01L21/304 , H01L21/3065 , H01L21/31116 , H01L21/6836 , H01L21/76873 , H01L21/76874 , H01L21/76879 , H01L21/76898 , H01L21/78 , H01L23/5223 , H01L23/5227 , H01L23/5283 , H01L23/53238 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L28/10 , H01L28/20 , H01L28/40 , H01L2221/6834 , H01L2221/68327 , H01L2224/02372 , H01L2224/0401 , H01L2224/04026 , H01L2224/0557 , H01L2224/05548 , H01L2224/05572 , H01L2224/05647 , H01L2224/13024 , H01L2224/13025 , H01L2224/32225 , H01L2924/19011 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2224/05647 , H01L2924/00014
摘要： A method for making an integrated passive device (IPD) die includes grinding a backside of a semiconductor substrate to reduce a thickness of a central portion of the semiconductor substrate while leaving a mechanical support ring on an outer portion of the substrate, and forming a through-substrate via (TSV) from the backside of the substrate. The TSV defines interconnect access to at least one passive component embedded in an insulator material disposed on a front surface of the semiconductor substrate. The substrate has a thickness less than three-quarters of an original thickness of the substrate.
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公开(公告)号：US11728421B2
公开(公告)日：2023-08-15
申请号：US16802718
申请日：2020-02-27
发明人： Wonhwa Lee
IPC分类号： H01L29/78 , H01L29/06 , H01L29/66 , H01L29/423
CPC分类号： H01L29/7813 , H01L29/0634 , H01L29/0696 , H01L29/4236 , H01L29/66734
摘要： A power semiconductor device includes a semiconductor layer having a first conductivity type. A pillar is provided in the semiconductor layer and has a second conductivity type that is different than the first conductivity type. A first trench gate is provided in the pillar proximate to a first vertical edge of the pillar. A second trench gate is provided in the pillar proximate to a second vertical edge of the pillar, the second vertical edge being on an opposing side of the pillar of the first vertical edge. A first electrode is provided over a first side of the semiconductor layer. A second electrode is provided over a second side of the semiconductor layer.
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公开(公告)号：US11728331B2
公开(公告)日：2023-08-15
申请号：US17248390
申请日：2021-01-22
CPC分类号： H01L27/0629 , H01L28/20 , H01L28/40
摘要： In a general aspect, a semiconductor device can include a semiconductor region, an active region disposed in the semiconductor region, a termination region disposed on the semiconductor region and adjacent to the active region, and a resistor disposed in the termination region. The resistor can include a trench, a conductive material disposed in the trench, and a first cavity separating the trench from the semiconductor region. A portion of the first cavity can be disposed between a bottom of the trench and the semiconductor region. The resistor can further include a second cavity separating the trench from the semiconductor region.
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100.发明公开公开(公告)号：US20230253513A1
公开(公告)日：2023-08-10
申请号：US18194714
申请日：2023-04-03
IPC分类号： H01L31/02 , H01L27/146 , H01L31/055 , H01L31/107 , H01L31/0232 , G02B3/06
CPC分类号： H01L31/02027 , H01L27/14605 , H01L31/055 , H01L31/107 , H01L27/14643 , H01L27/14621 , H01L27/14627 , H01L27/14629 , H01L27/14649 , H01L31/02327 , G02B3/06 , H01L27/1463 , H01L27/1464 , H04N25/63
摘要： An imaging device may include single-photon avalanche diodes (SPADs). To improve the sensitivity and signal-to-noise ratio of the SPADs, light scattering structures may be formed in the semiconductor substrate to increase the path length of incident light through the semiconductor substrate. The light scattering structures may include a low-index material formed in trenches in the semiconductor substrate. One or more microlenses may focus light onto the semiconductor substrate. Areas of the semiconductor substrate that receive more light from the microlenses may have a higher density of light scattering structures to optimize light scattering while mitigating dark current.
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