公开(公告)号：US07420207B2

公开(公告)日：2008-09-02

申请号：US11305033

申请日：2005-12-19

Applicant: Tae-Jin Kim ,  Kwang-Joon Yoon ,  Phil-Jae Chang ,  Kye-Won Maeng ,  Young-Jun Park

Inventor： Tae-Jin Kim ,  Kwang-Joon Yoon ,  Phil-Jae Chang ,  Kye-Won Maeng ,  Young-Jun Park

IPC: H01L31/0368

CPC classification number: H01L31/103

Abstract: A photo-detecting device includes a buried doping layer of a first conductivity type and disposed at an upper portion of a silicon substrate. A first silicon epitaxial layer of first conductivity type is disposed on the buried doping layer, and a second silicon epitaxial layer of second conductivity type is disposed on the first silicon epitaxial layer. An isolation doping layer doped of first conductivity type is disposed at a predetermined region of the second silicon epitaxial layer to define a body region of second conductivity type. A silicon germanium epitaxial layer of second conductivity type is disposed on the body region.

Abstract translation: 光检测装置包括第一导电类型的掩埋掺杂层并且设置在硅衬底的上部。 第一导电类型的第一硅外延层设置在掩埋掺杂层上，并且第二导电类型的第二硅外延层设置在第一硅外延层上。 掺杂有第一导电类型的隔离掺杂层设置在第二硅外延层的预定区域，以限定第二导电类型的体区。 第二导电类型的硅锗外延层设置在身体区域上。

公开(公告)号：US20070135297A1

公开(公告)日：2007-06-14

申请号：US11671794

申请日：2007-02-06

Applicant: Tae-Woo Woo ,  Myung-Ahn Ok ,  Jong-Sok Hahn ,  Mal-Ou Lee ,  Sang-Ook Kang ,  Sung-Bo Ko ,  Tae-Jin Kim ,  Sung-Kwan Kim

Inventor： Tae-Woo Woo ,  Myung-Ahn Ok ,  Jong-Sok Hahn ,  Mal-Ou Lee ,  Sang-Ook Kang ,  Sung-Bo Ko ,  Tae-Jin Kim ,  Sung-Kwan Kim

IPC: B01J31/00 ,  C08F4/44

CPC classification number: C07F17/00 ,  C08F4/65908 ,  C08F4/65912 ,  C08F10/00 ,  C08F110/02 ,  C08F210/16 ,  C08F2420/03 ,  C08F4/6592 ,  C08F2500/12 ,  C08F210/14

Abstract: Disclosed is an arylphenoxy catalyst system for producing an ethylene homopolymer or copolymers of ethylene and α-olefins, and a method of producing an ethylene homopolymer or copolymers of ethylene and α-olefins having a high molecular weight under a high temperature solution polymerization condition using the same. The catalyst system includes a group 4 arylphenoxy-based transition metal catalyst and an aluminoxane cocatalyst or a boron compound cocatalyst. In the transition metal catalyst, a cyclopentadiene derivative and arylphenoxide as fixed ligands are located around the group 4 transition metal, arylphenoxide is substituted with at least one aryl derivative and is located at the ortho position thereof, and the ligands are not crosslinked to each other. The catalyst includes non-toxic raw materials, synthesis of the catalyst is economical, and thermal stability of the catalyst is excellent. It is useful for producing an ethylene homopolymer or copolymers of ethylene and α-olefins having various physical properties in commercial polymerization processes.

Abstract translation: 公开了用于生产乙烯均聚物或乙烯与α-烯烃的共聚物的芳基苯氧基催化剂体系，以及在高温溶液聚合条件下使用高温溶液聚合条件制备乙烯均聚物或乙烯与α-烯烃的共聚物的方法， 相同。 该催化剂体系包括基团4芳基苯氧基基过渡金属催化剂和铝氧烷助催化剂或硼化合物助催化剂。 在过渡金属催化剂中，作为固定配体的环戊二烯衍生物和芳基苯氧基位于第4族过渡金属周围，芳基酚被至少一个芳基衍生物取代，位于其邻位，并且配体彼此不交联 。 催化剂包括无毒原料，催化剂的合成是经济的，催化剂的热稳定性优异。 在商业聚合方法中生产具有各种物理性质的乙烯均聚物或乙烯和α-烯烃的共聚物是有用的。

公开(公告)号：US20070061075A1

公开(公告)日：2007-03-15

申请号：US11531065

申请日：2006-09-12

Applicant: Tae Jin KIM

Inventor： Tae Jin KIM

IPC: G01C21/00

CPC classification number: G01C21/3415 ,  G08G1/096783 ,  G08G1/096827

Abstract: Provided is a navigation system using a RFID system and a method for displaying a construction area road. The navigation system includes a RFID tag for storing construction information, and upon receipt of a predetermined command, transmitting the construction information; and a RFID reader for transmitting an information read command to the RFID tag, and receiving the construction information in response to the information read command. A bypass path is re-searched depending on the received construction information, and path guidance is performed.

Abstract translation: 提供了使用RFID系统的导航系统和用于显示建筑区域道路的方法。 导航系统包括用于存储施工信息的RFID标签，并且在接收到预定命令时，传送施工信息; 以及用于将信息读取命令发送到RFID标签的RFID读取器，以及响应于信息读取命令接收构造信息。 根据接收的构造信息重新搜索旁路路径，并执行路径引导。

公开(公告)号：US5838990A

公开(公告)日：1998-11-17

申请号：US905562

申请日：1997-08-04

Applicant: Churoo Park ,  Hyun-Soon Jang ,  Chull-Soo Kim ,  Myung-Ho Kim ,  Seung-Hun Lee ,  Si-Yeol Lee ,  Ho-Cheol Lee ,  Tae-Jin Kim ,  Yun-Ho Choi

Inventor： Churoo Park ,  Hyun-Soon Jang ,  Chull-Soo Kim ,  Myung-Ho Kim ,  Seung-Hun Lee ,  Si-Yeol Lee ,  Ho-Cheol Lee ,  Tae-Jin Kim ,  Yun-Ho Choi

IPC: G11C11/401 ,  G11C7/00 ,  G11C7/10 ,  G11C11/403 ,  G11C11/406 ,  G11C11/407 ,  G11C11/4076 ,  G11C11/408 ,  G11C11/409 ,  G06F9/00 ,  G06F13/16

CPC classification number: G11C7/1018 ,  G11C11/406 ,  G11C11/40618 ,  G11C11/4076 ,  G11C11/408 ,  G11C11/4082 ,  G11C11/4087 ,  G11C7/1045 ,  G11C7/1072 ,  G11C7/222 ,  G11C7/225 ,  G11C2207/2281

Abstract: A synchronous dynamic random access memory capable of accessing data in a memory cell array therein in synchronism with a system clock from an external system such as a central processing unit (CPU). The synchronous DRAM receives an external clock and includes a plurality of memory banks each including a plurality of memory cells and operable in either an active cycle or a precharge cycle, a circuit for receiving a row address strobe signal and latching a logic level of the row address strobe signal in response to the clock, an address input circuit for receiving an externally generated address selecting one of the memory banks, and a circuit for receiving the latched logic level and the address from the address input circuit and for outputting an activation signal to the memory bank selected by the address and an inactivation signals to unselected memory banks when the latched logic level is a first logic level, so that the selected memory bank responsive to the activation signal operates in the active cycle while the unselected memory banks responsive to the inactivation signals operate in the precharge cycle.

Abstract translation: 能够与来自诸如中央处理单元（CPU）的外部系统的系统时钟同步地访问其中的存储器单元阵列中的数据的同步动态随机存取存储器。 同步DRAM接收外部时钟并且包括多个存储器组，每个存储器组包括多个存储器单元并且可以在有效周期或预充电周期中操作，用于接收行地址选通信号并锁存该行的逻辑电平的电路 响应于时钟的地址选通信号，用于接收选择存储体之一的外部产生的地址的地址输入电路，以及用于从地址输入电路接收锁存的逻辑电平和地址的电路，并将激活信号输出到 当锁存的逻辑电平为第一逻辑电平时，由地址选择的存储器组和对未选择的存储体的失活信号，使得响应于激活信号的所选择的存储器组在活动周期中工作，而未选定的存储器组响应于 灭活信号在预充电循环中工作。

公开(公告)号：US5835956A

公开(公告)日：1998-11-10

申请号：US822148

申请日：1997-03-17

Applicant: Churoo Park ,  Hyun-Soon Jang ,  Chull-Soo Kim ,  Myung-Ho Kim ,  Seung-Hun Lee ,  Si-Yeol Lee ,  Ho-Cheol Lee ,  Tae-Jin Kim ,  Yun-Ho Choi

Inventor： Churoo Park ,  Hyun-Soon Jang ,  Chull-Soo Kim ,  Myung-Ho Kim ,  Seung-Hun Lee ,  Si-Yeol Lee ,  Ho-Cheol Lee ,  Tae-Jin Kim ,  Yun-Ho Choi

IPC: G11C11/401 ,  G11C7/00 ,  G11C7/10 ,  G11C11/403 ,  G11C11/406 ,  G11C11/407 ,  G11C11/4076 ,  G11C11/408 ,  G11C11/409 ,  G06F13/16

CPC classification number: G11C7/1018 ,  G11C11/406 ,  G11C11/40618 ,  G11C11/4076 ,  G11C11/408 ,  G11C11/4082 ,  G11C11/4087 ,  G11C7/1045 ,  G11C7/1072 ,  G11C7/222 ,  G11C7/225 ,  G11C2207/2281

Abstract: A synchronous dynamic random access memory capable of accessing data in a memory cell array therein in synchronism with a system clock from an external system such as a central processing unit (CPU). The synchronous DRAM receives an external clock and includes a plurality of memory banks each including a plurality of memory cells and operable in either an active cycle or a precharge cycle, a circuit for receiving a row address strobe signal and latching a logic level of the row address strobe signal in response to the clock, an address input circuit for receiving an externally generated address selecting one of the memory banks, and a circuit for receiving the latched logic level and the address from the address input circuit and for outputting an activation signal to the memory bank selected by the address and an inactivation signals to unselected memory banks when the latched logic level is a first logic level, so that the selected memory bank responsive to the activation signal operates in the active cycle while the unselected memory banks responsive to the inactivation signals operate in the precharge cycle.

Abstract translation: 能够与来自诸如中央处理单元（CPU）的外部系统的系统时钟同步地访问其中的存储器单元阵列中的数据的同步动态随机存取存储器。 同步DRAM接收外部时钟并且包括多个存储器组，每个存储器组包括多个存储器单元并且可以在有效周期或预充电周期中操作，用于接收行地址选通信号并锁存该行的逻辑电平的电路 响应于时钟的地址选通信号，用于接收选择存储体之一的外部产生的地址的地址输入电路，以及用于从地址输入电路接收锁存的逻辑电平和地址的电路，并将激活信号输出到 当锁存的逻辑电平为第一逻辑电平时，由地址选择的存储器组和对未选择的存储体的失活信号，使得响应于激活信号的所选择的存储器组在活动周期中工作，而未选定的存储器组响应于 灭活信号在预充电循环中工作。

公开(公告)号：US5703828A

公开(公告)日：1997-12-30

申请号：US580622

申请日：1995-12-29

Applicant: Churoo Park ,  Hyun-Soon Jang ,  Chull-Soo Kim ,  Myung-Ho Kim ,  Seung-Hun Lee ,  Si-Yeol Lee ,  Ho-Cheol Lee ,  Tae-Jin Kim ,  Yun-Ho Choi

Inventor： Churoo Park ,  Hyun-Soon Jang ,  Chull-Soo Kim ,  Myung-Ho Kim ,  Seung-Hun Lee ,  Si-Yeol Lee ,  Ho-Cheol Lee ,  Tae-Jin Kim ,  Yun-Ho Choi

IPC: G11C11/401 ,  G11C7/00 ,  G11C7/10 ,  G11C11/403 ,  G11C11/406 ,  G11C11/407 ,  G11C11/4076 ,  G11C11/408 ,  G11C11/409 ,  G11C8/00

CPC classification number: G11C7/1018 ,  G11C11/406 ,  G11C11/40618 ,  G11C11/4076 ,  G11C11/408 ,  G11C11/4082 ,  G11C11/4087 ,  G11C7/1045 ,  G11C7/1072 ,  G11C7/222 ,  G11C7/225 ,  G11C2207/2281

Abstract: A synchronous dynamic random access memory capable of accessing data in a memory cell array therein in synchronism with a system clock from an external system such as a central processing unit (CPU). The synchronous DRAM receives an external clock and includes a plurality of memory banks each including a plurality of memory cells and operable in either an active cycle or a precharge cycle, a circuit for receiving a row address strobe signal and latching a logic level of the row address strobe signal in response to the clock, an address input circuit for receiving an externally generated address selecting one of the memory banks, and a circuit for receiving the latched logic level and the address from the address input circuit and for outputting an activation signal to the memory bank selected by the address and an inactivation signals to unselected memory banks when the latched logic level is a first logic level, so that the selected memory bank responsive to the activation signal operates in the active cycle while the unselected memory banks responsive to the inactivation signals operate in the precharge cycle.

Abstract translation: 能够与来自诸如中央处理单元（CPU）的外部系统的系统时钟同步地访问其中的存储器单元阵列中的数据的同步动态随机存取存储器。 同步DRAM接收外部时钟并且包括多个存储器组，每个存储器组包括多个存储器单元并且可以在有效周期或预充电周期中操作，用于接收行地址选通信号并锁存该行的逻辑电平的电路 响应于时钟的地址选通信号，用于接收选择存储体之一的外部产生的地址的地址输入电路，以及用于从地址输入电路接收锁存的逻辑电平和地址的电路，并将激活信号输出到 当锁存的逻辑电平为第一逻辑电平时，由地址选择的存储器组和对未选择的存储体的失活信号，使得响应于激活信号的所选择的存储器组在活动周期中工作，而未选定的存储器组响应于 灭活信号在预充电循环中工作。

公开(公告)号：US5693558A

公开(公告)日：1997-12-02

申请号：US756566

申请日：1996-11-26

Applicant: Soo Won Lee ,  Gyu Seog Cho ,  Tae Jin Kim ,  Kyung Seok Oh

Inventor： Soo Won Lee ,  Gyu Seog Cho ,  Tae Jin Kim ,  Kyung Seok Oh

IPC: H01S5/00 ,  H01S5/22 ,  H01S5/227 ,  H01L21/20

CPC classification number: H01S5/227 ,  H01S5/2206 ,  H01S5/2275

Abstract: The present invention relates to a method for fabricating a semiconductor laser diode in optical communication system, having the steps for forming current blocking layers on the resulting structure of the mesa structure and then forming an opening through the current blocking layer on the mesa structure.

Abstract translation: 本发明涉及一种在光通信系统中制造半导体激光二极管的方法，具有在台结构的结构上形成电流阻挡层，然后通过台面结构上的电流阻挡层形成开口的步骤。

公开(公告)号：US09853413B2

公开(公告)日：2017-12-26

申请号：US14804072

申请日：2015-07-20

Applicant: Tae Jin Kim

Inventor： Tae Jin Kim

IPC: H01S5/00 ,  H01S5/42 ,  F21S8/00 ,  H01S5/022 ,  H01S5/024 ,  F21V29/70 ,  F21W111/06 ,  F21Y115/30 ,  F21Y115/10 ,  F21Y107/50 ,  F21Y113/13

CPC classification number: H01S5/005 ,  F21S8/00 ,  F21V29/70 ,  F21W2111/06 ,  F21Y2107/50 ,  F21Y2113/13 ,  F21Y2115/10 ,  F21Y2115/30 ,  H01S5/02212 ,  H01S5/02288 ,  H01S5/02415 ,  H01S5/423

Abstract: An airport runway approach lighting apparatus is disclosed. According to one embodiment. the airport runway approach light includes a visible light source configured to emit a visible light brain and an infrared light source configured to emit an infrared beam. A first lens is attached to the visible light source to change the visible light beam emitted from the visible light source to a desired visible light beam pattern. The infrared light source includes a plurality of semiconductor laser diodes distributed on a surface of a laser diode chip in an array.

公开(公告)号：US09040961B2

公开(公告)日：2015-05-26

申请号：US13342816

申请日：2012-01-03

Applicant: Tae-Jin Kim

Inventor： Tae-Jin Kim

IPC: H01L51/56 ,  H01L51/52 ,  H01L27/32

CPC classification number: H01L51/5246 ,  H01L27/3246 ,  H01L51/525 ,  H01L51/5256

Abstract: An organic light emitting diode (OLED) display includes a substrate main body, a plurality of organic light emitting elements on the substrate main body, a column spacer on the substrate main body and between two or more of the plurality of organic light emitting elements, and an encapsulation thin film covering at least one of the organic light emitting elements and having regions divided by the column spacer.

Abstract translation: 有机发光二极管（OLED）显示器包括基板主体，在基板主体上的多个有机发光元件，在基板主体上的列间隔件，以及多个有机发光元件中的两个或更多个之间， 以及覆盖所述有机发光元件中的至少一个并具有由所述柱间隔物分割的区域的封装薄膜。

公开(公告)号：US08784769B2

公开(公告)日：2014-07-22

申请号：US13319814

申请日：2010-04-07

Applicant: Young Min Chung ,  Yong Tak Kwon ,  Tae Jin Kim ,  Seung Hoon Oh ,  Chang Soo Lee ,  Bo Yeol Kim

Inventor： Young Min Chung ,  Yong Tak Kwon ,  Tae Jin Kim ,  Seung Hoon Oh ,  Chang Soo Lee ,  Bo Yeol Kim

IPC: C01B15/029 ,  B01J31/38 ,  B01J37/16 ,  B01J31/26 ,  B01J31/28 ,  B82Y30/00 ,  B01J31/06 ,  H01B1/12 ,  B01J37/02 ,  B01J31/10 ,  B01J23/70 ,  B01J35/00 ,  B01J23/50 ,  B01J23/44 ,  B01J23/74 ,  B01J23/40

CPC classification number: B01J23/44 ,  B01J23/40 ,  B01J23/50 ,  B01J23/70 ,  B01J23/74 ,  B01J31/10 ,  B01J35/0046 ,  B01J37/0219 ,  B01J37/0244 ,  B01J37/16 ,  C01B15/029 ,  Y10S977/773

Abstract: Disclosed herein is a catalyst, including, in one example: a carrier, a polymer electrolyte multilayer film formed on the carrier, and metal particles dispersed in the polymer electrolyte multilayer film. The catalyst can be easily prepared, and can be used to produce hydrogen peroxide in high yield in the presence of a reaction solvent including no acid promoter.

Abstract translation: 本文公开了一种催化剂，在一个实例中包括载体，形成在载体上的聚合物电解质多层膜和分散在聚合物电解质多层膜中的金属颗粒。 催化剂可以容易地制备，并且可以在不含酸促进剂的反应溶剂的存在下以高产率生产过氧化氢。