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    Memory Cells, Non-Volatile Memory Arrays, Methods Of Operating Memory Cells, Methods Of Reading To And Writing From A Memory Cell, And Methods Of Programming A Memory Cell
    101.
    发明申请
    Memory Cells, Non-Volatile Memory Arrays, Methods Of Operating Memory Cells, Methods Of Reading To And Writing From A Memory Cell, And Methods Of Programming A Memory Cell 有权
    存储单元，非易失性存储器阵列，操作存储器单元的方法，从存储器单元读取和写入的方法以及编程存储单元的方法

    公开(公告)号：US20120039109A1

    公开(公告)日：2012-02-16

    申请号：US12855624

    申请日：2010-08-12

    Applicant: Bhaskar Srinivasan ,  Gurtej S. Sandhu

    Inventor： Bhaskar Srinivasan ,  Gurtej S. Sandhu

    IPC: G11C11/00

    CPC classification number: G11C13/0002 ,  G11C13/0007 ,  G11C13/0011 ,  G11C13/003 ,  G11C13/004 ,  G11C13/0069 ,  G11C2213/12 ,  G11C2213/32 ,  G11C2213/34 ,  G11C2213/52 ,  G11C2213/56 ,  G11C2213/77 ,  H01L27/101 ,  H01L45/08 ,  H01L45/085 ,  H01L45/1206

    Abstract: In one aspect, a method of operating a memory cell includes using different electrodes to change a programmed state of the memory cell than are used to read the programmed state of the memory cell. In one aspect, a memory cell includes first and second opposing electrodes having material received there-between. The material has first and second lateral regions of different composition relative one another. One of the first and second lateral regions is received along one of two laterally opposing edges of the material. Another of the first and second lateral regions is received along the other of said two laterally opposing edges of the material. At least one of the first and second lateral regions is capable of being repeatedly programmed to at least two different resistance states. Other aspects and implementations are disclosed.

    Abstract translation: 一方面，操作存储单元的方法包括使用不同的电极来改变存储器单元的编程状态，而不是用于读取存储器单元的编程状态。 在一个方面，存储单元包括第一和第二相对电极，其间具有接收在其间的材料。 该材料具有彼此不同组成的第一和第二横向区域。 第一和第二横向区域中的一个沿材料的两个横向相对的边缘中的一个接收。 第一和第二横向区域中的另一个沿着材料的所述两个横向相对的边缘中的另一个被容纳。 第一和第二横向区域中的至少一个能够被重复编程至至少两个不同的阻力状态。 公开了其他方面和实现。

    Methods of forming a non-volatile resistive oxide memory array
    102.
    发明授权
    Methods of forming a non-volatile resistive oxide memory array 有权
    形成非易失性电阻氧化物存储器阵列的方法

    公开(公告)号：US08114468B2

    公开(公告)日：2012-02-14

    申请号：US12141559

    申请日：2008-06-18

    Applicant: Gurtej Sandhu ,  John Smythe ,  Bhaskar Srinivasan

    Inventor： Gurtej Sandhu ,  John Smythe ,  Bhaskar Srinivasan

    IPC: B05D5/12 ,  B28B19/00 ,  B29B15/00 ,  C23C18/00 ,  C23C20/00 ,  C23C24/00 ,  C23C26/00 ,  C23C28/00 ,  C23C30/00 ,  H01C17/06 ,  H05K3/00 ,  H01L47/00 ,  H01L29/08 ,  H01L35/24 ,  H01L51/00 ,  H01L29/02 ,  H01L21/00 ,  H01L21/16 ,  H01L21/20 ,  H01L21/36 ,  G11C11/00

    CPC classification number: H01L27/101 ,  H01L21/0271 ,  Y10S438/947

    Abstract: A method of forming a non-volatile resistive oxide memory array includes forming a plurality of one of conductive word lines or conductive bit lines over a substrate. Metal oxide-comprising material is formed over the plurality of said one of the word lines or bit lines. A series of elongated trenches is provided over the plurality of said one of the word lines or bit lines. A plurality of self-assembled block copolymer lines is formed within individual of the trenches in registered alignment with and between the trench sidewalls. A plurality of the other of conductive word lines or conductive bit lines is provided from said plurality of self-assembled block copolymer lines to form individually programmable junctions comprising said metal oxide-comprising material where the word lines and bit lines cross one another.

    Abstract translation: 形成非易失性电阻氧化物存储器阵列的方法包括在衬底上形成多个导电字线或导电位线。 含金属氧化物的材料形成在多条所述一条字线或位线中。 在多个所述一条字线或位线之间提供一系列细长的沟槽。 多个自组装嵌段共聚物线形成在沟槽中的各个内，与沟槽侧壁之间对准并且在沟槽侧壁之间形成。 从所述多个自组装嵌段共聚物线路提供多个导电字线或导电位线，以形成包含所述金属氧化物的材料的单独可编程的结，其中字线和位线彼此交叉。

    Methods Of Reading And Using Memory Cells
    106.
    发明申请
    Methods Of Reading And Using Memory Cells 有权
    阅读和使用记忆单元的方法

    公开(公告)号：US20110069529A1

    公开(公告)日：2011-03-24

    申请号：US12564265

    申请日：2009-09-22

    Applicant: Bhaskar Srinivasan ,  Gurtej S. Sandhu

    Inventor： Bhaskar Srinivasan ,  Gurtej S. Sandhu

    IPC: G11C11/00 ,  G11C7/00

    CPC classification number: G11C13/004 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/0061 ,  G11C2013/0052 ,  G11C2213/72

    Abstract: Some embodiments include methods of reading memory cells. The memory cells have a write operation that occurs only if a voltage of sufficient absolute value is applied for a sufficient duration of time; and the reading is conducted with a pulse that is of too short of a time duration to be sufficient for the write operation. In some embodiments, the pulse utilized for the reading may have an absolute value of voltage that is greater than or equal to the voltage utilized for the write operation. In some embodiments, the memory cells may comprise non-ohmic devices; such as memristors and diodes.

    Abstract translation: 一些实施例包括读取存储器单元的方法。 存储器单元具有写入操作，只有当足够的绝对值的电压施加足够的持续时间时才发生; 并且读取是用太短的持续时间的脉冲来进行的，以足以用于写入操作。 在一些实施例中，用于读取的脉冲可以具有大于或等于用于写入操作的电压的绝对值。 在一些实施例中，存储器单元可以包括非欧姆器件; 如忆阻器和二极管。

    Diodes, And Methods Of Forming Diodes
    109.
    发明申请
    Diodes, And Methods Of Forming Diodes 有权
    二极管和形成二极管的方法

    公开(公告)号：US20100330770A1

    公开(公告)日：2010-12-30

    申请号：US12875007

    申请日：2010-09-02

    Applicant: Gurtej S. Sandhu ,  Bhaskar Srinivasan

    Inventor： Gurtej S. Sandhu ,  Bhaskar Srinivasan

    IPC: H01L21/02

    CPC classification number: H01L45/00 ,  Y10S257/91 ,  Y10S438/90 ,  Y10S438/902 ,  Y10S438/983

    Abstract: Some embodiments include methods of forming diodes. The methods may include oxidation of an upper surface of a conductive electrode to form an oxide layer over the conductive electrode. In some embodiments, the methods may include formation of an oxidizable material over a conductive electrode, and subsequent oxidation of the oxidizable material to form an oxide layer over the conductive electrode. In some embodiments, the methods may include formation of a metal halide layer over a conductive electrode. Some embodiments include diodes that contain a metal halide layer between a pair of diode electrodes.

    Abstract translation: 一些实施例包括形成二极管的方法。 所述方法可以包括氧化导电电极的上表面以在导电电极上形成氧化物层。 在一些实施方案中，所述方法可包括在导电电​​极上形成可氧化材料，以及随后氧化可氧化材料以在导电电极上形成氧化物层。 在一些实施例中，所述方法可包括在导电电​​极上形成金属卤化物层。 一些实施例包括在一对二极管电极之间包含金属卤化物层的二极管。

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