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公开(公告)号:US08977808B2
公开(公告)日:2015-03-10
申请号:US14304420
申请日:2014-06-13
Applicant: Micron Technology, Inc.
Inventor: Sivagnanam Parthasarathy , Patrick R. Khayat , Mustafa N. Kaynak , Zhenlei Shen
CPC classification number: G11C16/107 , G06F12/0246 , G06F12/06 , G06F2206/1014 , G06F2212/7201 , G11C7/1006 , G11C11/5628 , G11C11/5642 , G11C13/0002 , G11C14/0018 , G11C14/0045 , G11C16/00 , G11C16/0483 , G11C16/10 , G11C2211/5641 , H03M7/14
Abstract: The present disclosure includes methods and apparatuses for mapping between program states and data patterns. One method includes: programming a group of G memory cells such that a combination of respective program states of the group maps to a constellation point corresponding to a received N unit data pattern, the group used to store N/G units of data per memory cell; wherein the constellation point is one of a number of constellation points of a constellation associated with mapping respective program state combinations of the group of memory cells to N unit data patterns; and wherein the constellation comprises a first mapping shell and a second mapping shell, the constellation points corresponding to the respective first and second mapping shells determined, at least partially, based on a polynomial expression of order equal to G.
Abstract translation: 本公开包括用于在程序状态和数据模式之间进行映射的方法和装置。 一种方法包括:对一组G存储器单元进行编程,使得该组的各个程序状态的组合映射到与接收到的N单位数据模式对应的星座点,该组用于存储每个存储单元的N / G个数据单元 ; 其中所述星座点是与将所述存储器单元组的各个程序状态组合映射到N个单位数据模式相关联的星座的多个星座点中的一个; 并且其中所述星座包括第一映射外壳和第二映射外壳,所述星座点对应于相应的第一和第二映射外壳,至少部分地基于等于G的等级的多项式表达式确定。
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公开(公告)号:US20140208189A1
公开(公告)日:2014-07-24
申请号:US13746195
申请日:2013-01-21
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Sivagnanam Parthasarathy , Patrick R. Khayat , Mustafa N. Kaynak
IPC: H03M13/13
CPC classification number: H03M13/45 , G06F11/1012 , G06F11/1076 , H03M13/098 , H03M13/1102 , H03M13/1111 , H03M13/13 , H03M13/152 , H03M13/19 , H03M13/2906
Abstract: Apparatuses and methods for determining soft data using a classification code are provided. One example apparatus can include a classification code (CC) decoder and an outer code decoder coupled to the CC decoder. The CC decoder is configured to receive a CC codeword. The CC codeword includes a piece of an outer code codeword and corresponding CC parity digits. The CC decoder is configured to determine soft data associated with the piece of the outer code codeword, at least partially, using the corresponding CC digits.
Abstract translation: 提供了使用分类代码确定软数据的装置和方法。 一个示例性设备可以包括分类代码(CC)解码器和耦合到CC解码器的外部码解码器。 CC解码器被配置为接收CC码字。 CC码字包括一段外码码字和相应的CC奇偶校验位。 CC解码器被配置为至少部分地使用相应的CC数字来确定与该外部码字符段相关联的软数据。
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公开(公告)号:US20140153332A1
公开(公告)日:2014-06-05
申请号:US13691266
申请日:2012-11-30
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Sivagnanam Parthasarathy , Patrick R. Khayat , Mustafa N. Kaynak
IPC: G11C29/52
CPC classification number: G11C29/52 , G06F11/1072 , G11C11/5642 , G11C16/26 , G11C16/3454 , G11C16/349 , G11C2029/0411
Abstract: Apparatuses and methods involving the determination of soft data from hard reads are provided. One example method can include determining, using a hard read, a state of a memory cell. Soft data is determined based, at least partially, on the determined state.
Abstract translation: 提供了涉及从硬读取确定软数据的装置和方法。 一个示例性方法可以包括确定使用硬读取存储器单元的状态。 至少部分地基于所确定的状态来确定软数据。
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公开(公告)号:US12197742B2
公开(公告)日:2025-01-14
申请号:US17860701
申请日:2022-07-08
Applicant: Micron Technology, Inc.
Inventor: Mustafa N. Kaynak , Patrick R. Khayat , Sivagnanam Parthasarathy
Abstract: Embodiments disclosed can include determining, for each memory cell connected to each wordline, a respective value of a metric that reflects a sensitivity of a threshold voltage associated with the memory cell to a change in a threshold voltage of an adjacent cell and determining, for each wordline, based on the determined sensitivity for each memory cell, a respective aggregate measure of adjacent cell dependence. They can further include comparing the determined aggregate measure of adjacent cell dependence to a threshold dependence value. They can also include identifying a first wordline group having wordlines with high adjacent cell dependence and a second wordline group having wordlines with low adjacent cell dependence and storing a record referencing the wordlines of the second wordline group, the record indicating a corresponding location on the die of the memory device.
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105.
公开(公告)号:US20240428858A1
公开(公告)日:2024-12-26
申请号:US18830272
申请日:2024-09-10
Applicant: Micron Technology, Inc.
Inventor: Mustafa N. Kaynak , Patrick R. Khayat , Sivagnanam Parthasarathy
Abstract: Embodiments disclosed can include determining, for a wordline of the plurality of wordlines, a respective value of a sensitivity metric that reflects a sensitivity of a threshold voltage of a memory cell associated with the wordline to a change in a threshold voltage of an adjacent memory cell. Embodiments can also include determining, for the wordline, that the respective value of the sensitivity metric satisfies a threshold criterion. Embodiments can further include responsive to determining that the respective value of the sensitivity metric satisfies the threshold criterion, associating the wordline with a first wordline group, wherein the first wordline group comprises one or more wordlines, and wherein each wordline of the one or more wordlines is associated with a respective value of the sensitivity metric that satisfies the threshold criterion. Embodiments can include performing, on a specified memory cell connected to the wordline associated with the first wordline group, a compensatory operation.
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公开(公告)号:US20240385926A1
公开(公告)日:2024-11-21
申请号:US18661526
申请日:2024-05-10
Applicant: Micron Technology, Inc.
Inventor: Steven Michael Kientz , Hyungseok Kim , Zixiang Loh , Patrick R. Khayat , Jun Wan
Abstract: A system having a processing device operatively coupled with a memory device to perform the following operations: responsive to detecting a triggering event, measuring a temperature of the memory device to obtain a suspend temperature value, enabling a suspend temperature flag to indicate that temperature input for a step of an error handling operation is based on the suspend temperature value. Updating an operating temperature with the suspend temperature value. Determining, using a data structure which maps temperatures to read level offsets, a read level offset for the step of the error handling operation, based on the operating temperature. Causing the step of the error handling operation to be performed on a set of cells using a read level value based on the read level offset and a base read level, an disabling the suspend temperature flag.
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公开(公告)号:US20240370206A1
公开(公告)日:2024-11-07
申请号:US18773373
申请日:2024-07-15
Applicant: Micron Technology, Inc.
Inventor: Kishore Kumar Muchherla , Violante Moschiano , Akira Goda , Jeffrey S. McNeil , Jung Sheng Hoei , Sivagnanam Parthasarathy , James Fitzpatrick , Patrick R. Khayat
IPC: G06F3/06
Abstract: Control logic in a memory device receives a request to read data from a memory array of a memory device, the request comprising an indication of a segment of the memory array where the data is stored, and determines whether a write temperature associated with the data is stored in a flag byte corresponding to the segment of the memory array. Responsive to determining that the write temperature associated with the data is stored in the flag byte, the control logic determines a cross-temperature for the data based on the write temperature and a read temperature at a time when the request to read the data is received, determines a program/erase cycle count associated with the segment of the memory array, and determines, based on the cross-temperature and the program/erase cycle count, whether to perform a corrective action to calibrate a read voltage level to be applied to the memory array to read the data from the segment.
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公开(公告)号:US20240331778A1
公开(公告)日:2024-10-03
申请号:US18744146
申请日:2024-06-14
Applicant: Micron Technology, Inc.
Inventor: Mustafa N. Kaynak , Patrick R. Khayat , Sivagnanam Parthasarathy
CPC classification number: G11C16/26 , G06F3/0604 , G06F3/0655 , G06F3/0679 , G11C16/3459 , G11C16/0483
Abstract: Embodiments disclosed can include selecting a target read window budget (RWB) increase and identifying a set of aggressor memory cells. They can also include generating a list of programming level states for the set of aggressor memory cells and identifying, in the list, an entry associated with a maximum RWB increase that is greater than or equal to the target RWB increase. They can further include responsive to identifying the entry with the total number of bits associated with a maximum RWB increase that is greater than or equal to the target RWB increase, modifying a parameter of the memory access operation with the adjustment associated with the identified entry.
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109.
公开(公告)号:US12087374B2
公开(公告)日:2024-09-10
申请号:US17884107
申请日:2022-08-09
Applicant: Micron Technology, Inc.
Inventor: Mustafa N. Kaynak , Patrick R. Khayat , Sivagnanam Parthasarathy
CPC classification number: G11C16/3459 , G11C16/08 , G11C16/102 , G11C16/26
Abstract: Embodiments disclosed can include determining, for a wordline of the plurality of wordlines, a target read window budget (RWB) increase, wherein the target RWB increase corresponds to a maximum RWB increase associated with using a different PV voltage offset for each respective programming level of a memory cell. Embodiments can also include segmenting the plurality of wordlines into one or more wordline groups, wherein each wordline group comprises one or more wordlines. Embodiments can further include determining, for each wordline group, a target adjustment to a parameter of a memory access operation that is performed with respect to a memory cell associated with a wordline of the wordline group. Embodiments can include determining an aggregate RWB increase for the block in view of the target adjustment to the parameter of the memory access operation. Embodiments can further include determining that the aggregate RWB increase for the block satisfies a threshold range associated with the target RWB increase. Embodiments can also include modifying the parameter of the memory access operation according to the target adjustment.
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公开(公告)号:US12072762B2
公开(公告)日:2024-08-27
申请号:US17884076
申请日:2022-08-09
Applicant: Micron Technology, Inc.
Inventor: Patrick R. Khayat , Vamsi Pavan Rayaprolu
CPC classification number: G06F11/1044 , G11C29/08
Abstract: Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations comprising selecting a source set of memory cells of the memory device, performing a data integrity check on the source set of memory cells to obtain a data integrity metric value; responsive to determining that a data integrity metric value satisfies the threshold criterion, performing a first error-handling operation on the data stored on the source set of memory cells; responsive to determining that the first error-handling operation fails to correct the data, performing a second error-handling operation on the data; and responsive to determining that the second error-handling operation corrected the data, causing the memory device to copy the corrected data to a destination set of memory cells of the memory device.
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