公开(公告)号：US20060060568A1

公开(公告)日：2006-03-23

申请号：US11205029

申请日：2005-08-17

Applicant: Jae-Hyun So ,  Sung-Taek Moon ,  Dong-Jun Lee ,  Nam-Soo Kim ,  Bong-Su Ahn ,  Kyoung-Moon Kang

Inventor： Jae-Hyun So ,  Sung-Taek Moon ,  Dong-Jun Lee ,  Nam-Soo Kim ,  Bong-Su Ahn ,  Kyoung-Moon Kang

IPC: C09K13/00 ,  C03C15/00 ,  B44C1/22 ,  H01L21/461

CPC classification number: H01L21/7684 ,  C09G1/02 ,  C09K3/1463 ,  H01L21/3212

Abstract: A slurry composition includes an acidic aqueous solution and one or both of, an amphoteric surfactant and a glycol compound. Examples of the amphoteric surfactant include a betaine compound and an amino acid compound, and examples of the amino acid compound include lysine, proline and arginine. Examples of the glycol compound include diethylene glycol, ethylene glycol and polyethylene glycol.

Abstract translation: 浆料组合物包括酸性水溶液和两性表面活性剂和二醇化合物中的一种或两种。 两性表面活性剂的实例包括甜菜碱化合物和氨基酸化合物，氨基酸化合物的实例包括赖氨酸，脯氨酸和精氨酸。 二醇化合物的实例包括二甘醇，乙二醇和聚乙二醇。

公开(公告)号：US20060034277A1

公开(公告)日：2006-02-16

申请号：US11202895

申请日：2005-08-12

Applicant: Kyung-Hun Jang ,  Jong-Ae Park ,  Dong-Jun Lee ,  Jin-Bong Chang ,  Young-Soo Kim

Inventor： Kyung-Hun Jang ,  Jong-Ae Park ,  Dong-Jun Lee ,  Jin-Bong Chang ,  Young-Soo Kim

IPC: H04L12/56

CPC classification number: H04L1/1614

Abstract: Disclosed is a bitmap structure which enables the size of a bitmap field containing reception result information to be significantly reduced while fully performing its acknowledgment function. To this end, a message region for recording indicators, which enables reception success or failure for the maximum allowable SN level packets treatable by block ACK to be confirmed, is assigned. A message region for recording only the reception results for unsuccessfully received packets is also assigned. A receiving party confirms the unsuccessfully received packets through the indicators, and retransmits the unsuccessfully received packets. Also, a transmitting party provides the number of SN level packets and the maximum number of fragmentation packets to the receiving party. The receiving party determines an optimized bitmap configuration scheme, and transmits the reception results for the respective fragmentation packets to the transmitting party based on the determined bitmap configuration scheme.

公开(公告)号：US20060029099A1

公开(公告)日：2006-02-09

申请号：US11199060

申请日：2005-08-08

Applicant: Kyung-Hun Jang ,  Dong-Jun Lee ,  Sung-Hyun Choi ,  Jin-Bong Chang ,  Young-Soo Kim

Inventor： Kyung-Hun Jang ,  Dong-Jun Lee ,  Sung-Hyun Choi ,  Jin-Bong Chang ,  Young-Soo Kim

IPC: H04J3/24

CPC classification number: H04L69/04 ,  H04W28/06 ,  H04W28/065

Abstract: In the data transmission method, a MAC layer receives data from an upper layer, classifies the data according to destination addresses and traffic identifiers, aggregates the data by destination address and traffic identifier as a first transmission unit, aggregates the first transmission units having the identical destination address as a second transmission unit, and transmits the second transmission units having different destination addresses in a single frame. The data transmission method allows packets transferred from the upper layer to be hierarchically aggregated by DAs and TIDs and then packaged into a data unit for each destination such that it is possible to transmit the data at an optimal data rate for each destination terminal.

公开(公告)号：US06479405B2

公开(公告)日：2002-11-12

申请号：US09985615

申请日：2001-11-05

Applicant: Jung-Ho Lee ,  Dong-Jun Lee ,  Dae-Won Kang ,  Sung-Taek Moon ,  Gi-Hag Lee ,  Jung-Sik Choi

Inventor： Jung-Ho Lee ,  Dong-Jun Lee ,  Dae-Won Kang ,  Sung-Taek Moon ,  Gi-Hag Lee ,  Jung-Sik Choi

IPC: H01L2131

CPC classification number: C23C18/1283 ,  C08G77/62 ,  C23C18/1212 ,  C23C18/122 ,  C23C18/1279 ,  H01L21/02164 ,  H01L21/02222 ,  H01L21/02282 ,  H01L21/02337 ,  H01L21/31051 ,  H01L21/3125 ,  H01L21/316 ,  H01L21/31612 ,  H01L21/76229 ,  H01L21/823481 ,  H01L27/105 ,  H01L27/11521

Abstract: A method of forming a silicon oxide layer of a semiconductor device comprising coating a spin-on glass (SOG) composition including perhydropolysilazane having a compound of the formula (SiH2NH2)n where n represents a positive integer on a semiconductor substrate having a surface discontinuity, to form a planar SOG layer; and forming a silicon oxide layer with a planar surface by implementing a first heat treatment to convert an SOG solution into oxide and a second heat treatment to densify thus obtained oxide. The silicon oxide layer of the present invention can bury a gap between gaps of VLSI having a high aspect ratio and gives the same characteristics as a CVD oxide layer. Further, the oxidation of silicon in the active region is restrained in the present invention to secure dimension stability. Also disclosed is a semiconductor device made by the method.

Abstract translation: 一种形成半导体器件的氧化硅层的方法，包括在具有表面不连续性的半导体衬底上涂覆包含具有式（SiH 2 NH 2）n的化合物的全氢聚硅氮烷的旋涂玻璃（SOG）组合物，其中n表示正整数， 以形成平面SOG层; 以及通过实施第一热处理以将SOG溶液转化为氧化物并进行第二热处理以致密化由此获得的氧化物，形成具有平坦表面的氧化硅层。 本发明的氧化硅层可以在具有高纵横比的VLSI的间隙之间埋设间隙，并赋予与CVD氧化物层相同的特性。 此外，本发明中限制了活性区域中硅的氧化以确保尺寸稳定性。 还公开了通过该方法制造的半导体器件。

公开(公告)号：US09165660B2

公开(公告)日：2015-10-20

申请号：US14471231

申请日：2014-08-28

Applicant: Dong-Jun Lee ,  Sungsu Moon ,  Jaihyuk Song ,  Changsub Lee

Inventor： Dong-Jun Lee ,  Sungsu Moon ,  Jaihyuk Song ,  Changsub Lee

IPC: G11C16/04 ,  G11C16/10 ,  G11C16/26

CPC classification number: G11C16/10 ,  G11C16/0483 ,  G11C16/26 ,  G11C16/3427

Abstract: Non-volatile memory devices and related methods are provided. The non-volatile memory devices include a memory cell array having a plurality of cell strings, each cell string including: a plurality of memory cells stacked in a direction perpendicular to a substrate, a ground selection transistor between the plurality of memory cells and the substrate, and a string selection transistor between the plurality of memory cells and a bit line; an address decoder coupled to the plurality of memory cells in the plurality of cell strings through word lines, to the string selection transistors in the plurality of cell strings through string selection lines, and to the ground selection transistors in the plurality of cell strings through a ground selection line; a read/write circuit coupled to the string selection transistors in the plurality of cell strings through the bit lines; and control logic configured to adjust a substrate voltage applied to the substrate such that threshold voltages of the ground selection transistors are higher than a predetermined level during read operations for at least one of the plurality of memory cells in the plurality of cell strings.

Abstract translation: 提供了非易失性存储器件和相关方法。 非易失性存储器件包括具有多个单元串的存储单元阵列，每个单元串包括：沿垂直于衬底的方向堆叠的多个存储单元，多个存储单元之间的接地选择晶体管和衬底 和多个存储单元之间的串选择晶体管和位线; 通过字线将多个单元串中的多个存储单元耦合到地址解码器，通过串选择线连接到多个单元串中的串选择晶体管，以及通过一个单元串的多个单元串中的地选择晶体管 地面选线; 读/写电路，通过位线耦合到多个单元串中的串选择晶体管; 以及控制逻辑，被配置为调整施加到所述衬底的衬底电压，使得所述接地选择晶体管的阈值电压在所述多个单元串中的所述多个存储器单元中的至少一个的读操作期间高于预定电平。

公开(公告)号：US09150002B2

公开(公告)日：2015-10-06

申请号：US13532063

申请日：2012-06-25

Applicant: Dong Jun Lee ,  Dong Ju Jeon ,  Jung Youn Pang ,  Seong Min Cho ,  Chi Seong Kim

Inventor： Dong Jun Lee ,  Dong Ju Jeon ,  Jung Youn Pang ,  Seong Min Cho ,  Chi Seong Kim

IPC: B32B15/10 ,  B32B15/01 ,  H05K7/00 ,  H05K3/24 ,  C22C19/03 ,  C23C18/16 ,  C23C18/32 ,  C23C18/54 ,  H05K1/09 ,  H05K1/02

CPC classification number: H05K1/0242 ,  B32B15/018 ,  C22C19/03 ,  C23C18/1651 ,  C23C18/32 ,  C23C18/54 ,  H01L2224/45144 ,  H01L2224/85444 ,  H05K1/0216 ,  H05K1/09 ,  H05K3/181 ,  H05K3/244 ,  H05K7/00 ,  H05K2201/0338 ,  H05K2201/0352 ,  H05K2203/072 ,  Y10T428/12889

Abstract: An electroless surface treatment plated layer of a printed circuit board, a method for preparing the same, and printed circuit board including the same. The electroless surface treatment plated layer includes: electroless nickel (Ni) plated coating/palladium (Pd) plated coating/gold (Au) plated coating, wherein the electroless nickel, palladium, and gold plated coatings have thicknesses of 0.02 to 1 μm, 0.01 to 0.3 μm, and 0.01 to 0.5 μm, respectively. In the electroless surface treatment plated layer of the printed circuit board, a thickness of the nickel plated coating is specially minimized to 0.02 to 1 μm, thereby making it possible to form an optimized electroless Ni/Pd/Au surface treatment plated layer.

Abstract translation: 印刷电路板的无电解表面处理镀层，其制备方法和包括该印刷电路板的印刷电路板。 无电解表面处理镀层包括：镀镍（Ni）镀层/钯（Pd）镀覆镀层/金（Au）镀层，其中无电镍，钯和镀金涂层的厚度为0.02至1μm，0.01 分别为0.3μm，0.01〜0.5μm。 在印刷电路板的化学镀处理镀层中，镀镍层的厚度被特别地最小化为0.02〜1μm，从而可以形成优化的无电Ni / Pd / Au表面处理镀层。

公开(公告)号：USRE45570E1

公开(公告)日：2015-06-16

申请号：US13434840

申请日：2012-03-29

Applicant: Kyung-Hun Jang ,  Dong-Jun Lee ,  Sunghyun Choi ,  Jin-Bong Chang ,  Young-Soo Kim

Inventor： Kyung-Hun Jang ,  Dong-Jun Lee ,  Sunghyun Choi ,  Jin-Bong Chang ,  Young-Soo Kim

IPC: H04J3/16 ,  H04L29/06 ,  H04W28/06

CPC classification number: H04L69/04 ,  H04W28/06 ,  H04W28/065

Abstract: In the data transmission method, a MAC layer receives data from an upper layer, classifies the data according to destination addresses and traffic identifiers, aggregates the data by destination address and traffic identifier as a first transmission unit, aggregates the first transmission units having the identical destination address as a second transmission unit, and transmits the second transmission units having different destination addresses in a single frame. The data transmission method allows packets transferred from the upper layer to be hierarchically aggregated by DAs and TIDs and then packaged into a data unit for each destination such that it is possible to transmit the data at an optimal data rate for each destination terminal.

Abstract translation: 在数据传输方法中，MAC层从上层接收数据，根据目的地址和业务标识符对数据进行分类，按目的地址和业务标识符将数据聚合为第一传输单元，聚合具有相同目的地址的第一传输单元 目的地地址作为第二发送单元，并且在单个帧中发送具有不同目的地地址的第二发送单元。 数据传输方法允许从上层传送的分组通过DA和TID进行分层聚合，然后封装成每个目的地的数据单元，使得可以以每个目的地终端的最佳数据速率发送数据。

公开(公告)号：US08948098B2

公开(公告)日：2015-02-03

申请号：US12990861

申请日：2009-04-30

Applicant: Jianjun Li ,  Zhengzi Li ,  Jung Nam Yun ,  Dong Jun Lee ,  Jae Hyeong Kim

Inventor： Jianjun Li ,  Zhengzi Li ,  Jung Nam Yun ,  Dong Jun Lee ,  Jae Hyeong Kim

IPC: H04W4/00 ,  H04B7/04 ,  H04B7/06

CPC classification number: H04B7/0452 ,  H04B7/0617 ,  H04B7/0626

Abstract: Disclosed is a frame transmission method using precoding for supporting MU-MIMO, which facilitates to reduce overhead of a downlink frame in a wireless communication system of FDD method, and a base station supporting that method. The frame transmission method comprises calculating a precoding matrix of a present frame based on channel state information (CSI) of each mobile station and a precoding matrix of a prior frame; precoding a dedicated pilot and downlink data to be transmitted to the mobile station by the use of precoding matrix of the present frame; and transmitting a downlink frame including the precoded dedicated pilot and precoded downlink data to the corresponding mobile station.

Abstract translation: 公开了一种使用用于支持MU-MIMO的预编码的帧传输方法，其有助于降低FDD方法的无线通信系统中的下行链路帧的开销，以及支持该方法的基站。 帧发送方法包括基于每个移动台的信道状态信息（CSI）和现有帧的预编码矩阵来计算当前帧的预编码矩阵; 通过使用当前帧的预编码矩阵来预编码要发送到移动台的专用导频和下行链路数据; 以及将包含预编码的专用导频和预编码的下行链路数据的下行链路帧发送到对应的移动台。

公开(公告)号：US08685865B2

公开(公告)日：2014-04-01

申请号：US13608403

申请日：2012-09-10

Applicant: Jeong-ju Park ,  Kyoung-mi Kim ,  Min-jung Kim ,  Dong-jun Lee ,  Boo-deuk Kim

Inventor： Jeong-ju Park ,  Kyoung-mi Kim ,  Min-jung Kim ,  Dong-jun Lee ,  Boo-deuk Kim

IPC: H01L21/32 ,  G03F7/20

CPC classification number: H01L21/32139 ,  G03F7/0392 ,  G03F7/095 ,  G03F7/2022 ,  G03F7/203 ,  H01L21/0274

Abstract: A method of forming patterns of a semiconductor device may include forming a photoresist layer that includes a photo acid generator (PAG) and a photo base generator (PBG), generating an acid from the PAG in a first exposed portion of the photoresist layer by first-exposing the photoresist layer, and generating a base from the PBG in a second exposed portion of the photoresist layer by second-exposing a part of the first exposed portion and neutralizing the acid. The method may also include baking the photoresist layer after the first and second-exposing and deblocking the photoresist layer of the first exposed portion in which the acid is generated to form a deblocked photoresist layer, and forming a photoresist pattern by removing the deblocked photoresist layer by using a developer.

Abstract translation: 形成半导体器件的图案的方法可以包括形成光致抗蚀剂层，该光致抗蚀剂层包括光酸产生剂（PAG）和光产生剂（PBG），首先在光致抗蚀剂层的第一暴露部分中从PAG产生酸 并且在所述光致抗蚀剂层的第二暴露部分中通过将所述第一暴露部分的一部分暴露并中和所述酸而从所述PBG生成碱。 该方法还可以包括在第一和第二次曝光和去除其中产生酸的第一暴露部分的光致抗蚀剂层以形成解封的光致抗蚀剂层之后烘烤光致抗蚀剂层，以及通过去除去封闭的光刻胶层形成光致抗蚀剂图案 通过使用开发人员。

公开(公告)号：US08659945B2

公开(公告)日：2014-02-25

申请号：US13024563

申请日：2011-02-10

Applicant: Seong Soo Kim ,  Yong seok Kim ,  Dong-Jun Lee

Inventor： Seong Soo Kim ,  Yong seok Kim ,  Dong-Jun Lee

IPC: G11C16/04

CPC classification number: G11C16/0483 ,  G11C16/12 ,  G11C16/3454

Abstract: A nonvolatile memory device comprises a bulk region and a plurality of memory cells connected to a source line and a plurality of wordlines. The method comprises applying a source line voltage to the source line with a first magnitude, applying a bulk voltage to the bulk region with a second magnitude lower than the first magnitude, and performing access operations on the plurality of memory cells while maintaining a substantially constant difference between the bulk voltage and the source line voltage.

Abstract translation: 非易失性存储器件包括体区域和连接到源极线和多个字线的多个存储器单元。 该方法包括以第一幅度对源极线施加源极线电压，以大于第一幅度的第二幅度对体区施加体电压，并且在保持基本上恒定的同时对多个存储器单元执行存取操作 体电压和源极线电压之间的差异。