公开(公告)号：US08846556B2

公开(公告)日：2014-09-30

申请号：US12952644

申请日：2010-11-23

申请人： Makoto Kubota ,  Tatsuo Furuta ,  Hiroshi Saito ,  Toshihiro Ifuku ,  Kenichi Takeda ,  Tetsuro Fukui

发明人： Makoto Kubota ,  Tatsuo Furuta ,  Hiroshi Saito ,  Toshihiro Ifuku ,  Kenichi Takeda ,  Tetsuro Fukui

IPC分类号： B41J2/045 ,  C04B35/00 ,  H01L41/00 ,  H02N2/00 ,  H01L41/18 ,  H01L41/187 ,  C04B35/468 ,  C04B35/628 ,  H01L41/09 ,  C04B35/626 ,  H02N2/10 ,  H02N2/16

CPC分类号： H01L41/1871 ,  C04B35/468 ,  C04B35/4682 ,  C04B35/62655 ,  C04B35/62805 ,  C04B35/62886 ,  C04B2235/3208 ,  C04B2235/3236 ,  C04B2235/3262 ,  C04B2235/449 ,  C04B2235/5445 ,  C04B2235/656 ,  C04B2235/6567 ,  C04B2235/762 ,  C04B2235/765 ,  C04B2235/77 ,  C04B2235/783 ,  C04B2235/786 ,  C04B2235/96 ,  H01L41/09 ,  H01L41/0973 ,  H01L41/43 ,  H02N2/106 ,  H02N2/163

摘要： A piezoelectric ceramic that includes barium titanate and 0.04 mass % or more and 0.20 mass % or less manganese relative to barium titanate. The piezoelectric ceramic is composed of crystal grains. The crystal grains include crystal grains A having an equivalent circular diameter of 30 μm or more and 300 μm or less and crystal grains B having an equivalent circular diameter of 0.5 μm or more and 3 μm or less. The crystal grains A and the crystal grains B individually form aggregates and the aggregates of the crystal grains A and the aggregates of the crystal grains B form a sea-island structure.

摘要翻译： 一种压电陶瓷，其包含钛酸钡，相对于钛酸钡为0.04质量％以上且0.20质量％以下的锰。 压电陶瓷由晶粒组成。 晶粒包括等效圆直径为30μm以上且300μm以下的晶粒A和等效圆直径为0.5μm以上且3μm以下的晶粒B. 晶粒A和晶粒B分别形成聚集体，并且晶粒A的聚集体和晶粒B的聚集体形成海岛结构。

公开(公告)号：US08749028B2

公开(公告)日：2014-06-10

申请号：US13381070

申请日：2009-07-01

申请人： Mayu Aoki ,  Kenichi Takeda ,  Kazuyuki Hozawa

发明人： Mayu Aoki ,  Kenichi Takeda ,  Kazuyuki Hozawa

IPC分类号： H01L23/522

CPC分类号： H01L23/522 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/564 ,  H01L25/0657 ,  H01L2924/0002 ,  H01L2924/00

摘要： When a silicon through electrode is to be formed from a back surface (the surface on which a semiconductor device is not formed) of a silicon substrate, a wide range of an interlayer insulating film made of a Low-k material absorbs moisture, and there is a problem that the electrical characteristics of wiring are degraded. The above-described problem can be solved by forming at least a single ring-shaped frame laid out to enclose the silicon through electrode by using metal wirings in plural layers and a connection via connecting the upper and lower metal wirings in a Low-k material layer penetrated by the silicon through electrode and by forming a moisture barrier film made up of at least a metal wiring and a connection via between the silicon through electrode and a circuit wiring formed in the vicinity of the silicon through electrode.

摘要翻译： 当从硅衬底的背面（未形成半导体器件的表面）形成硅通电极时，由Low-k材料制成的宽范围的层间绝缘膜吸收水分，在那里 是布线的电气特性劣化的问题。 上述问题可以通过形成至少一个单一的环形框架来布置，以通过使用多层金属布线将硅包围在电极中，并且通过在Low-k材料中连接上部和下部金属布线的连接 并且通过形成由至少金属布线构成的防潮膜和在硅通孔电极和形成在硅通孔电极附近的电路布线之间的连接通孔。

公开(公告)号：US08618667B2

公开(公告)日：2013-12-31

申请号：US13443869

申请日：2012-04-10

申请人： Kenichi Takeda ,  Mayu Aoki ,  Kazuyuki Hozawa

发明人： Kenichi Takeda ,  Mayu Aoki ,  Kazuyuki Hozawa

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L24/11 ,  H01L23/481 ,  H01L24/14 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L2224/0345 ,  H01L2224/0362 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05624 ,  H01L2224/1145 ,  H01L2224/1148 ,  H01L2224/11616 ,  H01L2224/13025 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/26125 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/73104 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/83203 ,  H01L2224/9211 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00015 ,  H01L2224/81 ,  H01L2224/83

摘要： A bump electrode, a dummy bump, and a heat-resistant polymer film, whose upper-surface heights are uniformed, are formed on each of a first silicon substrate and a second silicon substrate, and then, the first silicon substrate and the second silicon substrate are bonded to each other so that the bump electrodes formed on the respective substrates are electrically connected to each other. At this time, the dummy bump is arranged so as to be bonded to the heat-resistant polymer film on the silicon substrate opposed thereto, so that a semiconductor device having both of good electrical connection between the bump electrodes and bump protection performance obtained by a polymer film with high heat resistance and without voids can be achieved.

摘要翻译： 在第一硅衬底和第二硅衬底上的每个上形成凸起电极，虚拟凸块和上表面高度均匀的耐热聚合物膜，然后，第一硅衬底和第二硅 基板彼此接合，使得形成在各个基板上的凸块电极彼此电连接。 此时，虚拟凸块被布置成与其相对的硅衬底上的耐热聚合物膜结合，从而具有凸起电极之间良好的电连接和凸起保护性能两者的半导体器件 可以实现具有高耐热性和无空隙的聚合物膜。

公开(公告)号：US08480918B2

公开(公告)日：2013-07-09

申请号：US12135980

申请日：2008-06-09

申请人： Kaoru Miura ,  Toshihiro Ifuku ,  Kenichi Takeda ,  Tetsuro Fukui ,  Hiroshi Funakubo

发明人： Kaoru Miura ,  Toshihiro Ifuku ,  Kenichi Takeda ,  Tetsuro Fukui ,  Hiroshi Funakubo

IPC分类号： B06B1/06

CPC分类号： H01L41/1871 ,  H01L41/43

摘要： The present invention provides a piezoelectric material which can be applied even to the MEMS technique, exhibits satisfactory piezoelectricity even at high ambient temperatures and is environmentally clean, namely, a piezoelectric material including an oxide obtained by forming a solid solution composed of two perovskite oxides A(1)B(1)O3 and A(2)B(2)O3 different from each other in crystalline phase, the oxide being represented by the following general formula (1): X{A(1)B(1)O3}−(1−X){A(2)B(2)O3}  (1) wherein “A(1)” and “A(2)” are each an element including an alkali earth metal and may be the same or different from each other; “B(1)” and “B(2)” each include two or more metal elements, and either one of “B(1)” and “B(2)” contains Cu in a content of 3 atm % or more; and “X” satisfies the relation 0

摘要翻译： 本发明提供一种甚至可以应用于MEMS技术的压电材料，即使在高环境温度下也表现出令人满意的压电性，并且是环境清洁的，即包括通过形成由两种钙钛矿氧化物A形成的固溶体获得的氧化物的压电材料 （1）B（1）O 3和A（2）B（2）O 3在结晶相中彼此不同，氧化物由以下通式（1）表示：X {A（1）B（1）O 3 } - （1-X）{A（2）B（2）O3}（1）其中“A（1）”和“A（2）”分别是包含碱土金属的元素， 彼此不同; “B（1）”和“B（2）”各自包含两个或更多个金属元素，“B（1）”和“B（2）”中的任一个含有3atm％以上的Cu; 和“X”满足0

公开(公告)号：US08142678B2

公开(公告)日：2012-03-27

申请号：US11499722

申请日：2006-08-07

申请人： Takanori Matsuda ,  Katsumi Aoki ,  Toshihiro Ifuku ,  Kenichi Takeda ,  Tetsuro Fukui ,  Hiroshi Funakubo ,  Shintaro Yokoyama

发明人： Takanori Matsuda ,  Katsumi Aoki ,  Toshihiro Ifuku ,  Kenichi Takeda ,  Tetsuro Fukui ,  Hiroshi Funakubo ,  Shintaro Yokoyama

IPC分类号： C04B35/00

CPC分类号： C04B35/499 ,  C04B35/472 ,  C04B2235/3206 ,  C04B2235/3208 ,  C04B2235/3213 ,  C04B2235/3215 ,  C04B2235/3224 ,  C04B2235/3227 ,  C04B2235/3234 ,  C04B2235/3251 ,  C04B2235/3258 ,  C04B2235/3272 ,  C04B2235/3275 ,  C04B2235/3279 ,  C04B2235/3284 ,  C04B2235/3286 ,  C04B2235/3293 ,  C04B2235/3294 ,  C04B2235/3298 ,  C04B2235/76 ,  C04B2235/762 ,  C04B2235/765 ,  C04B2235/768 ,  C04B2235/787 ,  C04B2235/79 ,  H01L41/0973 ,  H01L41/1875 ,  H01L41/316

摘要： A perovskite type oxide of a single crystal structure or a uniaxial-oriented crystal structure is represented by ABO3. Site A includes Pb as a main component and site B includes a plurality of elements. The perovskite type oxide includes a plurality of crystal phases selected from the group consisting of tetragonal, rhombohedral, orthorhombic, cubic, pseudo-cubic and monoclinic systems and the plurality of crystal phases are oriented in the direction of .

摘要翻译： 由ABO3表示单晶结构或单轴取向晶体结构的钙钛矿型氧化物。 场地A包括Pb作为主要成分，场地B包括多个元素。 钙钛矿型氧化物包括选自四方晶系，菱方晶，斜方晶，立方晶，假立方晶系和单斜晶系的多个结晶相，多个结晶相朝<100>方向取向。

公开(公告)号：US20120068355A1

公开(公告)日：2012-03-22

申请号：US13178470

申请日：2011-07-07

申请人： Mayu Aoki ,  Kenichi Takeda ,  Kazuyuki Hozawa

发明人： Mayu Aoki ,  Kenichi Takeda ,  Kazuyuki Hozawa

IPC分类号： H01L23/48 ,  H01L21/28

CPC分类号： H01L25/50 ,  H01L23/481 ,  H01L23/562 ,  H01L24/05 ,  H01L24/08 ,  H01L24/13 ,  H01L24/29 ,  H01L24/80 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05547 ,  H01L2224/05557 ,  H01L2224/08121 ,  H01L2224/11462 ,  H01L2224/1148 ,  H01L2224/11602 ,  H01L2224/13019 ,  H01L2224/13147 ,  H01L2224/13565 ,  H01L2224/13582 ,  H01L2224/13647 ,  H01L2224/13687 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/26122 ,  H01L2224/2919 ,  H01L2224/73104 ,  H01L2224/81007 ,  H01L2224/81203 ,  H01L2224/83007 ,  H01L2224/83203 ,  H01L2224/83862 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2924/00013 ,  H01L2924/01029 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2924/04941 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/13099 ,  H01L2224/05099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00

摘要： A semiconductor device including two silicon wafers stacked and bonded together with bumps of one wafer electrically coupled with those of the other wafer, in which generation of voids on the junction surface between the silicon wafers is suppressed. Due to a recess made in the surface of a buried conductive film, a cavity is formed in the junction surface between the silicon wafers. The ends of the cavity extend to the periphery of the junction surface between the silicon wafers. This allows the air trapped on the junction surface between the silicon wafers to get out through the cavity, thereby reducing the possibility of generation of voids on the junction surface.

摘要翻译： 一种半导体器件，包括两个硅晶片，其叠置并与由另一个晶片电耦合的一个晶片的凸块结合在一起，其中硅晶片之间的接合表面上的空隙产生被抑制。 由于在掩埋导电膜的表面上形成的凹部，在硅晶片之间的接合表面中形成空腔。 腔的端部延伸到硅晶片之间的接合表面的周边。 这允许捕获在硅晶片之间的接合表面上的空气通过空腔排出，从而减少在接合表面上产生空隙的可能性。

公开(公告)号：US08005725B2

公开(公告)日：2011-08-23

申请号：US11798756

申请日：2007-05-16

申请人： Masato Takahashi ,  Keiji Nagai ,  Koji Dan ,  Yutaka Nakamura ,  Yuuki Inoue ,  Fujio Takahashi ,  Shogo Hyakutake ,  Yoshiaki Murata ,  Kenichi Takeda

发明人： Masato Takahashi ,  Keiji Nagai ,  Koji Dan ,  Yutaka Nakamura ,  Yuuki Inoue ,  Fujio Takahashi ,  Shogo Hyakutake ,  Yoshiaki Murata ,  Kenichi Takeda

IPC分类号： G06Q30/00 ,  G06Q10/00

CPC分类号： G03G15/55 ,  G03G15/5079 ,  G03G15/553 ,  G06Q10/087 ,  G06Q30/0601 ,  G06Q30/0633

摘要： An order supporting system includes a machine monitoring apparatus including an obtaining part for repetitively obtaining status data of plural supplies of plural machines connected to a network, a storing part for storing the status data obtained by the obtaining part, a detecting part for detecting change in the status of the supply by comparing the status data stored in the storing part and new status data that is newly obtained by the obtaining part, and a transmitting part for transmitting status data corresponding to the supply of the machine from which status change is detected by the detecting part, and an order supporting apparatus for receiving the status data transmitted from the transmitting part via the network and transmitting an electronic mail to a mail address associated to the machine corresponding to the transmitted status data in accordance with the received status data.

摘要翻译： 订单支持系统包括：机器监视装置，包括：重复获取连接到网络的多个机器的多个供应的状态数据的获取部，用于存储由获取部获得的状态数据的存储部;检测部， 通过比较存储在存储部分中的状态数据和由获取部分新获得的新状态数据来提供供应的状态，以及发送部分，用于发送对应于通过以下步骤检测到状态改变的机器供应的状态数据： 检测部分和用于经由网络接收从发送部分发送的状态数据的订单支持装置，并且根据接收到的状态数据将电子邮件发送到与发送的状态数据相对应的与机器相关联的邮件地址。

公开(公告)号：US07999441B2

公开(公告)日：2011-08-16

申请号：US12237933

申请日：2008-09-25

申请人： Katsumi Aoki ,  Kenichi Takeda ,  Toshihiro Ifuku ,  Takanori Matsuda ,  Tetsuro Fukui

发明人： Katsumi Aoki ,  Kenichi Takeda ,  Toshihiro Ifuku ,  Takanori Matsuda ,  Tetsuro Fukui

IPC分类号： H01L41/04

CPC分类号： B41J2/14233 ,  B41J2202/03 ,  H01L41/0478 ,  H01L41/0973 ,  H01L41/1875 ,  H01L41/316 ,  H01L41/319

摘要： The piezoelectric actuator includes a piezoelectric film between two electrode layers and a diaphragm. Assuming that: each elastic coefficient of all materials is isotropic and a distortion amount of the piezoelectric film by an electric field is isotropic in all in-plane directions; a point located on a diaphragm surface and having a maximum displacement when a predetermined electric field is applied to distort the piezoelectric film, is expressed by PδMAX; and a point located on a circumference of a reference-circle having PδMAX as a center and having a minimum difference in displacement from PδMAX is expressed by PδA, the diaphragm has a shape capable of determining an axis A1 set in a straight-line joining PδMAX and PδA, the diaphragm comprises a single-crystalline-material in which a plane orthogonal to A1 and perpendicular to an axis A2 on the diaphragm surface, is a {110}-plane, and the piezoelectric film is a {100}-single-orientation film.

摘要翻译： 压电致动器包括在两个电极层和隔膜之间的压电膜。 假设：所有材料的每个弹性系数是各向同性的，并且通过电场的压电膜的失真量在所有面内方向都是各向同性的; 当施加预定电场以使压电膜失真时，位于膜片表面上并具有最大位移的点由PδMAX表示; 以PδMAX为中心并且具有与PδMAX的位移的最小差异的基准圆的圆周上的点由PδA表示，所述隔膜具有能够确定在直线接合PδMAX中设定的轴A1的形状 和PδA，所述隔膜包括其中与A1正交并垂直于所述膜表面上的轴线A2的平面为{110}面的单晶材料，并且所述压电膜为{100} - 单晶材料， 定向电影。

公开(公告)号：US20110120494A1

公开(公告)日：2011-05-26

申请号：US12945523

申请日：2010-11-12

申请人： Toshihiro Ifuku ,  Tatsuo Furuta ,  Hiroshi Saito ,  Kenichi Takeda

发明人： Toshihiro Ifuku ,  Tatsuo Furuta ,  Hiroshi Saito ,  Kenichi Takeda

IPC分类号： F28G7/00

CPC分类号： G02B27/0006 ,  B06B1/0648 ,  B08B7/02 ,  G03B11/00 ,  G03B17/02 ,  G03B17/14 ,  H04N5/2171 ,  H04N5/2254

摘要： In a piezoelectric device, a first electrode and a second electrode are disposed to be opposed to each other on plate surfaces of the piezoelectric device, a first electrode plane of the piezoelectric device is fixedly bonded to a plate surface of a vibrating plate, a piezoelectric material forming the piezoelectric device is polarized in a direction parallel to the first electrode plane, the piezoelectric device is fixed to a base through a second electrode plane of the piezoelectric device, and the piezoelectric device generates a thickness-shear vibration with the fixed second electrode plane being a reference plane. The piezoelectric vibration generated by the piezoelectric device generates a flexural vibration in the vibrating plate, to thereby remove dust adhering to a surface of the vibrating plate.

摘要翻译： 在压电元件中，第一电极和第二电极在压电元件的板面彼此相对配置，压电元件的第一电极面与振动板的板面固定接合，压电 形成压电元件的材料在平行于第一电极平面的方向上极化，压电器件通过压电器件的第二电极平面固定到基底，并且压电器件产生与固定的第二电极的厚度 - 剪切振动 飞机是参考平面。 由压电装置产生的压电振动在振动板中产生弯曲振动，从而除去附着在振动板表面的灰尘。

公开(公告)号：US07934043B2

公开(公告)日：2011-04-26

申请号：US11882855

申请日：2007-08-06

申请人： Kenichi Takeda

发明人： Kenichi Takeda

IPC分类号： G06F13/00

CPC分类号： G06F13/28

摘要： A data processing apparatus contains a first bus connected to a first memory, a first central processing unit (CPU) being accessible to the first memory via the first bus, a first Direct Memory Access (DMA) controller being accessible to the first memory via the first bus, and a monitor circuit connected to the first bus and monitoring addresses transferred on the first bus. The addresses transferred on the first bus are transmitted from the first DMA controller to the first memory via the first bus. The monitor circuit compares the address transferred on the first bus with a preset monitor target address. The CPU acquires the comparison results by the monitor circuit. If the comparison results show an address match, then the CPU accesses the first memory. The CPU can in this way access the first memory at a correct timing.

摘要翻译： 数据处理装置包括连接到第一存储器的第一总线，经由第一总线可访问第一存储器的第一中央处理单元（CPU），经由第一存储器可访问的第一直接存储器存取（DMA）控制器， 第一总线，以及连接到第一总线的监视电路和监视在第一总线上传送的地址。 在第一总线上传送的地址通过第一总线从第一DMA控制器发送到第一存储器。 监视器电路将第一总线上传送的地址与预设的监视目标地址进行比较。 CPU通过监视电路获取比较结果。 如果比较结果显示地址匹配，则CPU访问第一个内存。 CPU可以以这种方式在正确的时机访问第一个内存。