公开(公告)号：US10121852B2

公开(公告)日：2018-11-06

申请号：US15794616

申请日：2017-10-26

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Bruce B. Doris ,  Hong He ,  Sivananda K. Kanakasabapathy ,  Gauri Karve ,  Fee Li Lie ,  Derrick Liu ,  Soon-Cheon Seo ,  Stuart A. Sieg

IPC: H01L29/06 ,  H01L29/66 ,  H01L29/78

Abstract: A semiconductor structure is provided that includes a semiconductor fin portion having an end wall and extending upward from a substrate. A gate structure straddles a portion of the semiconductor fin portion. A first set of gate spacers is located on opposing sidewall surfaces of the gate structure; and a second set of gate spacers is located on sidewalls of the first set of gate spacers. One gate spacer of the second set of gate spacers has a lower portion that directly contacts the end wall of the semiconductor fin portion.

公开(公告)号：US09985030B2

公开(公告)日：2018-05-29

申请号：US14581135

申请日：2014-12-23

Applicant: International Business Machines Corporation

Inventor： Kangguo Cheng ,  Hong He ,  Ali Khakifirooz ,  Chiahsun Tseng ,  Chun-chen Yeh ,  Yunpeng Yin

IPC: H01L21/8238 ,  H01L27/092 ,  B82Y40/00 ,  H01L29/66 ,  H01L29/10 ,  H01L29/06 ,  H01L21/02 ,  H01L21/306

CPC classification number: H01L27/0924 ,  B82Y40/00 ,  H01L21/02236 ,  H01L21/30604 ,  H01L21/823807 ,  H01L21/823821 ,  H01L29/0673 ,  H01L29/1054 ,  H01L29/66545 ,  H01L29/66795

Abstract: A method of fabricating a semiconductor device includes forming at least one semiconductor fin on a semiconductor substrate. A cladding layer is epitaxially grown on a portion of the at least one semiconductor fin. The cladding layer is oxidized such that r such that ions are condensed therefrom and are diffused into the at least one semiconductor fin while the cladding layer is converted to an oxide layer. The oxide layer is removed to expose the at least one semiconductor fin having a diffused fin portion that enhances electron hole mobility therethrough.

公开(公告)号：US20180076029A1

公开(公告)日：2018-03-15

申请号：US15813993

申请日：2017-11-15

Applicant: International Business Machines Corporation

Inventor： Kangguo Cheng ,  Hong He ,  Juntao Li

IPC: H01L21/02 ,  H01L29/06 ,  H01L29/10 ,  H01L27/12 ,  H01L29/66 ,  H01L29/775 ,  H01L21/311

CPC classification number: H01L21/02488 ,  H01L21/02521 ,  H01L21/02601 ,  H01L21/02603 ,  H01L21/02667 ,  H01L21/31111 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/1054 ,  H01L29/1079 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66742 ,  H01L29/66772 ,  H01L29/775 ,  H01L29/78603 ,  H01L29/78654 ,  H01L29/78684 ,  H01L29/78696

Abstract: A dense array of semiconductor single crystalline semiconductor nanocrystals is provided in the present application by forming an amorphous semiconductor material layer surrounding a plurality of patterned nanostructures comprised of a single crystalline semiconductor material portion. A thermal anneal, i.e., (solid phase epitaxy), is then performed to crystallize a portion of the amorphous semiconductor material layer that is in contact with each single crystalline semiconductor material portion and to provide a plurality of spaced apart single crystalline nanocrystals on a surface of an insulator. A remaining portion of the amorphous semiconductor material layer that was not crystallized is thereafter removed.

公开(公告)号：US09892910B2

公开(公告)日：2018-02-13

申请号：US14713099

申请日：2015-05-15

Applicant: International Business Machines Corporation

Inventor： Kangguo Cheng ,  Hong He ,  Juntao Li

IPC: H01L29/06 ,  H01L31/00 ,  H01L21/02 ,  H01L21/311 ,  H01L29/775 ,  H01L29/66 ,  H01L27/12 ,  H01L29/10

CPC classification number: H01L21/02488 ,  H01L21/02521 ,  H01L21/02601 ,  H01L21/02603 ,  H01L21/02667 ,  H01L21/31111 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/1054 ,  H01L29/1079 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775

Abstract: A dense array of semiconductor single crystalline semiconductor nanocrystals is provided in the present application by forming an amorphous semiconductor material layer surrounding a plurality of patterned nanostructures comprised of a single crystalline semiconductor material portion. A thermal anneal, i.e., (solid phase epitaxy), is then performed to crystallize a portion of the amorphous semiconductor material layer that is in contact with each single crystalline semiconductor material portion and to provide a plurality of spaced apart single crystalline nanocrystals on a surface of an insulator. A remaining portion of the amorphous semiconductor material layer that was not crystallized is thereafter removed.

公开(公告)号：US09876074B2

公开(公告)日：2018-01-23

申请号：US14719829

申请日：2015-05-22

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Bruce B. Doris ,  Hong He ,  Sivananda K. Kanakasabapathy ,  Gauri Karve ,  Fee Li Lie ,  Derrick Liu ,  Soon-Cheon Seo ,  Stuart A. Sieg

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L29/0649 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785

Abstract: A semiconductor structure is provided that includes a semiconductor fin portion having an end wall and extending upward from a substrate. A gate structure straddles a portion of the semiconductor fin portion. A first set of gate spacers is located on opposing sidewall surfaces of the gate structure; and a second set of gate spacers is located on sidewalls of the first set of gate spacers. One gate spacer of the second set of gate spacers has a lower portion that directly contacts the end wall of the semiconductor fin portion.

公开(公告)号：US09837535B2

公开(公告)日：2017-12-05

申请号：US15060116

申请日：2016-03-03

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hong He ,  Juntao Li ,  Junli Wang ,  Chih-Chao Yang

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/08 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66

CPC classification number: H01L29/66795 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/1037 ,  H01L29/1054 ,  H01L29/161 ,  H01L29/165 ,  H01L29/7848 ,  H01L29/785

Abstract: A method for forming a fin device includes forming semiconductor fins over a first dielectric layer. A second dielectric layer is directionally deposited into or on the first dielectric layer and on tops of the fins on horizontal surfaces. The second dielectric layer is configured to protect the first dielectric layer in subsequent processing. Sidewalls of the fins are precleaned while the first dielectric layer is protected by the second dielectric layer. The second dielectric layer is removed to expose the first dielectric layer in a protected state.

公开(公告)号：US20170294524A1

公开(公告)日：2017-10-12

申请号：US15627680

申请日：2017-06-20

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hong He ,  Juntao Li ,  Junli Wang ,  Chih-Chao Yang

IPC: H01L29/66 ,  H01L29/10 ,  H01L29/78

CPC classification number: H01L29/66795 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/1037 ,  H01L29/1054 ,  H01L29/161 ,  H01L29/165 ,  H01L29/7848 ,  H01L29/785

Abstract: A method for forming a fin device includes forming semiconductor fins over a first dielectric layer. A second dielectric layer is directionally deposited into or on the first dielectric layer and on tops of the fins on horizontal surfaces. The second dielectric layer is configured to protect the first dielectric layer in subsequent processing. Sidewalls of the fins are precleaned while the first dielectric layer is protected by the second dielectric layer. The second dielectric layer is removed to expose the first dielectric layer in a protected state.

公开(公告)号：US20170271167A1

公开(公告)日：2017-09-21

申请号：US15613774

申请日：2017-06-05

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hong He ,  Chiahsun Tseng ,  Chun-Chen Yeh ,  Yunpeng Yin

IPC: H01L21/308 ,  H01L21/3065 ,  H01L29/66

CPC classification number: H01L21/3086 ,  H01L21/0338 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/3085 ,  H01L21/32136 ,  H01L29/66545 ,  H01L29/66795

Abstract: Methods and structures for fabricating fins for multigate devices are disclosed. In accordance with one method, a plurality of sidewalls are formed in or on a plurality of mandrels over a semiconductor substrate such that each of the mandrels includes a first sidewall composed of a first material and a second sidewall composed of a second material that is different from the first material. The first sidewall of a first mandrel of the plurality of mandrels is selectively removed. In addition, a pattern composed of remaining sidewalls of the plurality of sidewalls is transferred onto an underlying layer to form a hard mask in the underlying layer. Further, the fins are formed by employing the hard mask and etching semiconducting material in the substrate.

公开(公告)号：US09728625B2

公开(公告)日：2017-08-08

申请号：US14976867

申请日：2015-12-21

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Kangguo Cheng ,  Bruce B. Doris ,  Hong He ,  Ali Khakifirooz ,  Yunpeng Yin

IPC: H01L29/66 ,  H01L21/225 ,  H01L29/78 ,  H01L21/306 ,  H01L29/06

CPC classification number: H01L29/66795 ,  H01L21/02532 ,  H01L21/2254 ,  H01L21/30604 ,  H01L21/324 ,  H01L21/823431 ,  H01L29/0649 ,  H01L29/66545 ,  H01L29/785 ,  H01L29/7851

Abstract: A method of forming a semiconductor device that includes forming a silicon including fin structure and forming a germanium including layer on the silicon including fin structure. Germanium is then diffused from the germanium including layer into the silicon including fin structure to convert the silicon including fin structure to silicon germanium including fin structure.

公开(公告)号：US09716045B2

公开(公告)日：2017-07-25

申请号：US15229754

申请日：2016-08-05

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Kangguo Cheng ,  Hong He ,  Juntao Li ,  Junli Wang

IPC: H01L27/092 ,  H01L27/12 ,  H01L29/161 ,  H01L21/8238 ,  H01L21/84 ,  H01L29/06 ,  H01L29/16 ,  H01L21/02 ,  H01L29/10 ,  H01L29/20 ,  H01L21/762

CPC classification number: H01L21/823807 ,  H01L21/02532 ,  H01L21/02538 ,  H01L21/76229 ,  H01L21/823821 ,  H01L21/823878 ,  H01L21/845 ,  H01L27/092 ,  H01L27/0924 ,  H01L27/1211 ,  H01L29/0649 ,  H01L29/1037 ,  H01L29/16 ,  H01L29/161 ,  H01L29/20

Abstract: Semiconductor mandrel structures are formed extending upward from a remaining portion of a semiconductor substrate. A first oxide isolation structure is formed on exposed surfaces of the remaining portion of the semiconductor substrate and between each semiconductor mandrel structure. A silicon germanium alloy fin is formed on opposing sidewalls of each semiconductor mandrel structure that is present in a pFET device region of the semiconductor substrate and directly on a surface of each first oxide isolation structure. Each semiconductor mandrel structure is removed and a second oxide isolation structure is formed between each first oxide isolation structure and extending beneath a bottommost surface of each first oxide isolation structure.