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公开(公告)号:US12055863B2
公开(公告)日:2024-08-06
申请号:US18139459
申请日:2023-04-26
申请人: ASM IP Holding B.V.
发明人: Daniele Piumi , David Kurt de Roest
CPC分类号: G03F7/70783 , G03F7/70033 , H01L23/562
摘要: Methods of forming structures including a stress management layer for photolithography and structures including the stress management layer are disclosed. Further disclosed are systems for depositing a stress management layer. Exemplary methods include forming the stress management layer using one or more of plasma-enhanced cyclic (e.g., atomic layer) deposition and plasma-enhanced chemical vapor deposition.
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公开(公告)号:US20240258102A1
公开(公告)日:2024-08-01
申请号:US18199018
申请日:2023-05-18
申请人: ASM IP Holding B.V.
发明人: Jihye Yang , Hongsuk Kim , JuHyuk Park , SungHa Choi , SangHeon Yong , KiHun Kim
IPC分类号: H01L21/02
CPC分类号: H01L21/02274 , H01L21/02164 , H01L21/0217 , H01L21/02219 , H01L21/0223 , H01L21/02252
摘要: A substrate processing method includes providing a substrate having a gap structure into a reaction space, and supplying a silicon precursor and nitrogen reactant gas into the reaction space, and depositing a flowable silicon nitride film on the substrate to fill at least a part of the gap of the substrate, while maintaining an inside of the reaction space in a plasma state by applying radio frequency (RF) power in a pulsed mode, wherein as a duty ratio of the RF power decreases, fewer micropores are generated in the silicon nitride film in the gap.
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公开(公告)号:US12040229B2
公开(公告)日:2024-07-16
申请号:US17989875
申请日:2022-11-18
申请人: ASM IP Holding B.V.
IPC分类号: H01L21/768 , G11C5/02 , G11C5/06 , H01L23/538 , H10B41/27 , H10B43/27
CPC分类号: H01L21/76879 , G11C5/025 , G11C5/06 , H01L21/76802 , H01L23/5384 , H10B41/27 , H10B43/27
摘要: A method for forming a structure with a hole on a substrate is disclosed. The method may comprise: depositing a first structure on the substrate; etching a first part of the hole in the first structure; depositing a plug fill in the first part of the hole; depositing a second structure on top of the first structure; etching a second part of the hole substantially aligned with the first part of the hole in the second structure; and, etching the plug fill of the first part of the hole and thereby opening up the hole by dry etching. In this way 3-D NAND device may be provided.
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14.
公开(公告)号:US20240234129A1
公开(公告)日:2024-07-11
申请号:US18402950
申请日:2024-01-03
申请人: ASM IP Holding B.V.
发明人: Charles Dezelah , Michael Eugene Givens , Eric Jen Cheng Liu , Eric James Shero , Fu Tang , Marko Tuominen , Eva Elisabeth Tois , Andrea Illiberi , Tatiana Ivanova , Paul Ma , Gejian Zhao
IPC分类号: H01L21/02 , H01L21/311
CPC分类号: H01L21/02178 , H01L21/02208 , H01L21/0228 , H01L21/02312 , H01L21/31111
摘要: Methods and systems for forming structure comprising a threshold voltage tuning layer are disclosed. Exemplary methods include providing a treatment reactant to a reaction chamber to form a treated surface on the substrate surface and depositing threshold voltage tuning material overlying the treated surface. Additionally or alternatively, exemplary methods can include direct formation of metal silicide layers. Additionally or alternatively, exemplary methods can include use of an etchant.
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公开(公告)号:US20240229237A9
公开(公告)日:2024-07-11
申请号:US18491546
申请日:2023-10-20
申请人: ASM IP Holding B.V.
IPC分类号: C23C16/455
CPC分类号: C23C16/45527 , C23C16/45544
摘要: A method and system for depositing a material on one or more substrates by atomic layer deposition. The method comprising a step of performing a pulse (1) of a precursor of said material, wherein at least one of the average flow rate (f) and the average partial pressure (r) of said precursor over a first half (2) of the pulse (1) is higher than over a second half (3) of the pulse (1).
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公开(公告)号:US12033885B2
公开(公告)日:2024-07-09
申请号:US17140661
申请日:2021-01-04
申请人: ASM IP Holding B.V.
发明人: Govindarajasekhar Singu , Dinkar Nandwana , Todd Robert Dunn , Shankar Swaminathan , Bhushan Zope , Carl Louis White
IPC分类号: H01L21/687 , H01L21/683
CPC分类号: H01L21/68742 , H01L21/6838
摘要: A reactor system may comprise a reaction chamber enclosed by a chamber sidewall, and a susceptor disposed in the reaction chamber between a reaction space and a lower chamber space comprised in the reaction chamber. The susceptor may comprise a pin hole disposed through the susceptor such that the pin hole is in fluid communication with the reaction space and the lower chamber space, and such that the reaction space is in fluid communication with the lower chamber space. A lift pin may be disposed in the pin hole. The lift pin may comprise a pin body comprising a pin channel, defined by a pin channel surface, disposed in the pin body such that the reaction space is in fluid communication with the lower chamber space when the lift pin is disposed in the pin hole.
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17.
公开(公告)号:US12031206B2
公开(公告)日:2024-07-09
申请号:US17812488
申请日:2022-07-14
申请人: ASM IP Holding, B.V.
发明人: Maart van Druenen , Qi Xie , Charles Dezelah , Petro Deminskyi , Lifu Chen , Giuseppe Alessio Verni , Ren-Jie Chang
CPC分类号: C23C16/14 , C23C16/18 , C23C16/4408
摘要: Disclosed are methods and systems for depositing layers comprising a transition metal and a group 13 element. The layers are formed onto a surface of a substrate. The deposition process may be a cyclical deposition process. Exemplary structures in which the layers may be incorporated include field effect transistors, VNAND cells, metal-insulator-metal (MIM) structures, and DRAM capacitors.
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公开(公告)号:US20240218505A1
公开(公告)日:2024-07-04
申请号:US18396829
申请日:2023-12-27
申请人: ASM IP Holding B.V.
发明人: Jiyeon Kim , YoungChol Byun , Petri Raisanen , Sang Ho Yu , Sukanya Datta , Chiyu Zhu , Jan Willem Maes , Saima Ali , Elina Färm
摘要: Methods of forming molybdenum silicide are disclosed. Exemplary methods can include selectively forming molybdenum silicide on a first surface relative to a second surface. Additionally or alternatively, exemplary methods can include a cleaning step prior to forming the molybdenum silicide.
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公开(公告)号:US20240213022A1
公开(公告)日:2024-06-27
申请号:US18545699
申请日:2023-12-19
申请人: ASM IP Holding B.V.
发明人: Brendan Marozas , Rami Khazaka , Gregory Deye
IPC分类号: H01L21/02 , C30B25/16 , C30B25/20 , C30B29/06 , H01L21/3065
CPC分类号: H01L21/0257 , C30B25/165 , C30B25/205 , C30B29/06 , H01L21/02381 , H01L21/02433 , H01L21/02532 , H01L21/30655
摘要: A method for epitaxially growing a phosphorus doped silicon layer on a substrate is disclosed. Embodiments of the presently described method comprise exposing a substrate to a silicon precursor and to a phosphorus precursor, wherein the exposure of the substrate to the phosphorus precursor is done during an overlapping period with the exposure to the silicon precursor.
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20.
公开(公告)号:US20240203733A1
公开(公告)日:2024-06-20
申请号:US18535715
申请日:2023-12-11
申请人: ASM IP Holding B.V.
发明人: Omar Elleuch , Yanfu Lu , Caleb Miskin , Alexandros Demos
CPC分类号: H01L21/0262 , C23C16/52 , H01L21/02532
摘要: A material layer deposition method includes supporting one and only one substrate in a chamber arrangement, exposing the substrate to a first material layer precursor and a second material layer precursor, and forming a first material layer overlaying the substrate using the first material layer precursor and the second material layer precursor. The first material layer is exposed to the first material layer to the first material layer precursor and a second material layer formed onto the first material layer using the first material layer precursor. The second material layer precursor includes a germanium-containing material layer precursor and the first material layer precursor includes at least one of trisilane (Si3H8) and tetrasilane (Si4H10). Material layer stacks, semiconductor processing systems, and computer program products are also described.
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