公开(公告)号：US07049606B2

公开(公告)日：2006-05-23

申请号：US10698726

申请日：2003-10-30

Applicant: Alexandros T. Demos ,  Hari K. Ponnekanti ,  Jun Zhao ,  Helen R. Armer

Inventor： Alexandros T. Demos ,  Hari K. Ponnekanti ,  Jun Zhao ,  Helen R. Armer

IPC: H01J37/30

CPC classification number: H01J37/317 ,  H01J3/025 ,  H01J37/077

Abstract: One embodiment of the present invention is an electron beam treatment apparatus that includes: (a) a chamber; (b) a cathode having a surface of relatively large area that is exposed to an inside of the chamber; (c) an anode having holes therein that is disposed inside the chamber and spaced apart from the cathode by a working distance; (d) a wafer holder disposed inside the chamber facing the anode; (e) a source of negative voltage whole output is applied to the cathode to provide a cathode voltage; (f) a source of voltage whose output is applied to the anode; (g) a gas inlet adapted to admit gas into the chamber at an introduction rate; and (h) a pump adapted to exhaust gas from the chamber at an exhaust rate, the introduction rate and the exhaust rate providing a gas pressure in the chamber; wherein values of cathode voltage, gas pressure, and the working distance are such that there is no arcing between the cathode and anode and the working distance is greater than an electron mean free path.

Abstract translation: 本发明的一个实施例是一种电子束处理装置，包括：（a）室; （b）具有暴露于所述室内部的相对较大面积表面的阴极; （c）其中具有孔的阳极，其设置在室内并与阴极间隔开工作距离; （d）设置在面向阳极的腔室内的晶片保持器; （e）将负电压全输出源施加到阴极以提供阴极电压; （f）其输出端施加到阳极的电压源; （g）气体入口，其适于以引入速率将气体引入所述腔室; 以及（h）适于以排气速度从所述室排出气体的泵，所述引入速率和排气速率在所述室中提供气体压力; 其中阴极电压，气体压力和工作距离的值使得阴极和阳极之间没有电弧，并且工作距离大于电子平均自由程。

公开(公告)号：US08702870B2

公开(公告)日：2014-04-22

申请号：US12987948

申请日：2011-01-10

Applicant: Sang In Yi ,  Kelvin Chan ,  Thomas Nowak ,  Alexandros T. Demos

Inventor： Sang In Yi ,  Kelvin Chan ,  Thomas Nowak ,  Alexandros T. Demos

IPC: B08B9/093

CPC classification number: H01L21/67028 ,  B08B7/0057 ,  H01L21/67115 ,  H01L21/6719

Abstract: A method for cleaning a substrate processing chamber, including processing a batch of substrates within a processing chamber defining one or more processing regions. Processing the batch of substrates may be executed in a sub-routine having various sub-steps including processing a substrate from the batch within the processing chamber, removing the substrate from the processing chamber, introducing ozone into the processing chamber, and exposing the chamber to ultraviolet light for less than one minute. The substrate batch processing sub-steps may be repeated until the last substrate in the batch is processed. After processing the last substrate in the batch, the method includes removing the last substrate from the processing chamber, introducing ozone into the processing chamber; and exposing the processing chamber to ultraviolet light for three to fifteen minutes.

Abstract translation: 一种用于清洁衬底处理室的方法，包括在限定一个或多个处理区域的处理室内处理一批衬底。 处理批次的基板可以在具有各种子步骤的子程序中执行，该子程序包括在处理室内处理来自批料的基板，从处理室移除基板，将臭氧引入处理室，以及将该室暴露于 紫外线不到一分钟。 可以重复衬底批处理子步骤，直到处理批次中的最后一个衬底。 在批次处理最后一个基板之后，该方法包括从处理室移除最后的基板，将臭氧引入处理室; 并将处理室暴露于紫外光下3至15分钟。

公开(公告)号：US08481422B2

公开(公告)日：2013-07-09

申请号：US13455299

申请日：2012-04-25

Applicant: Kelvin Chan ,  Khaled A. Elsheref ,  Alexandros T. Demos ,  Mei-Yee Shek ,  Lipan Li ,  Li-Qun Xia ,  Kang Sub Yim

Inventor： Kelvin Chan ,  Khaled A. Elsheref ,  Alexandros T. Demos ,  Mei-Yee Shek ,  Lipan Li ,  Li-Qun Xia ,  Kang Sub Yim

IPC: H01L21/4763

CPC classification number: H01L21/3141 ,  H01L21/02164 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/31105 ,  H01L21/31116 ,  H01L21/31608 ,  H01L21/76814 ,  H01L21/76831

Abstract: A method and apparatus for treating a substrate is provided. A porous dielectric layer is formed on the substrate. In some embodiments, the dielectric may be capped by a dense dielectric layer. The dielectric layers are patterned, and a dense dielectric layer deposited conformally over the substrate. The dense conformal dielectric layer seals the pores of the porous dielectric layer against contact with species that may infiltrate the pores. The portion of the dense conformal pore-sealing dielectric layer covering the field region and bottom portions of the pattern openings is removed by directional selective etch.

Abstract translation: 提供了一种处理基板的方法和装置。 在基板上形成多孔介电层。 在一些实施例中，电介质可以由致密的电介质层封盖。 对电介质层进行图案化，并且将致密的电介质层保形地沉积在衬底上。 密实的保形介电层密封多孔介电层的孔隙，防止与可能渗入孔隙的物质接触。 通过方向选择性蚀刻去除覆盖图案开口的场区域和底部的稠密共形孔隙电介质层的部分。

公开(公告)号：US08455849B2

公开(公告)日：2013-06-04

申请号：US13301558

申请日：2011-11-21

Applicant: Sanjeev Baluja ,  Juan Carlos Rocha-Alvarez ,  Alexandros T. Demos

Inventor： Sanjeev Baluja ,  Juan Carlos Rocha-Alvarez ,  Alexandros T. Demos

IPC: G01N21/23 ,  G02B13/14 ,  G02B21/16 ,  C23C16/48

CPC classification number: G02B5/22 ,  G02B5/208 ,  H01L21/67115

Abstract: A method and apparatus for providing a uniform UV radiation irradiance profile across a surface of a substrate is provided. In one embodiment, a substrate processing tool includes a processing chamber defining a processing region, a substrate support for supporting a substrate within the processing region, an ultraviolet (UV) radiation source spaced apart from the substrate support and configured to transmit ultraviolet radiation toward the substrate positioned on the substrate support, and a light transmissive window positioned between the UV radiation source and the substrate support, the light transmissive window having an optical film layer coated thereon. In one example, the optical film layer has a non-uniform thickness profile in a radial direction, wherein a thickness of the optical film layer at the peripheral area of the light transmissive window is relatively thicker than at the center region of the optical film layer.

Abstract translation: 提供了一种用于在衬底的表面上提供均匀的UV辐射辐照度分布的方法和装置。 在一个实施例中，衬底处理工具包括限定处理区域的处理室，用于支撑处理区域内的衬底的衬底支撑件，与衬底支撑件间隔开并且被配置成向衬底支撑件发射紫外线辐射的紫外线（UV）辐射源 位于基板支撑件上的基板和位于UV辐射源和基板支撑件之间的透光窗口，透光窗口具有涂覆在其上的光学膜层。 在一个示例中，光学膜层在径向上具有不均匀的厚度分布，其中在透光窗的周边区域处的光学膜层的厚度比在光学膜层的中心区域处的厚度更厚 。

公开(公告)号：US08349746B2

公开(公告)日：2013-01-08

申请号：US12660294

申请日：2010-02-23

Applicant: Bo Xie ,  Alexandros T. Demos ,  Daemian Raj ,  Sure Ngo ,  Kang Sub Yim

Inventor： Bo Xie ,  Alexandros T. Demos ,  Daemian Raj ,  Sure Ngo ,  Kang Sub Yim

IPC: H01L21/469

CPC classification number: H01L21/02274 ,  C23C16/30 ,  C23C16/45523 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02216 ,  H01L21/7682 ,  H01L21/76832 ,  H01L21/76835

Abstract: Embodiments of the present invention pertain to the formation of microelectronic structures. Low k dielectric materials need to exhibit a dielectric constant of less than about 2.6 for the next technology node of 32 nm. The present invention enables the formation of semiconductor devices which make use of such low k dielectric materials while providing an improved flexural and shear strength integrity of the microelectronic structure as a whole.

Abstract translation: 本发明的实施例涉及微电子结构的形成。 对于32nm的下一个技术节点，低k电介质材料需要表现出小于约2.6的介电常数。 本发明能够形成利用这种低k电介质材料的半导体器件，同时提供整体上微电子结构的改进的弯曲和剪切强度的完整性。

公开(公告)号：US20120187534A1

公开(公告)日：2012-07-26

申请号：US13011946

申请日：2011-01-24

Applicant: Bo Xie ,  Alexandros T. Demos ,  Juan Carlos Rocha-Alvarez ,  Sanjeev Baluja

Inventor： Bo Xie ,  Alexandros T. Demos ,  Juan Carlos Rocha-Alvarez ,  Sanjeev Baluja

IPC: H01L29/02 ,  H01L21/28

CPC classification number: H01L28/40 ,  H01L21/3105 ,  H01L28/90

Abstract: The present invention provides systems, methods and apparatus for manufacturing a memory cell. The invention includes forming a feature having sidewalls in a first dielectric material; forming a first conductive material on the sidewalls of the feature; depositing a layer of a second dielectric material on the conductive material; and exposing the second dielectric material to oxidizing species and ultraviolet light to oxidize the second dielectric material. Numerous additional aspects are disclosed.

Abstract translation: 本发明提供用于制造存储单元的系统，方法和装置。 本发明包括在第一介电材料中形成具有侧壁的特征; 在所述特征的侧壁上形成第一导电材料; 在导电材料上沉积第二介电材料层; 以及将所述第二电介质材料暴露于氧化物质和紫外光以氧化所述第二电介质材料。 公开了许多附加方面。

公开(公告)号：US08216861B1

公开(公告)日：2012-07-10

申请号：US13171132

申请日：2011-06-28

Applicant: Kang Sub Yim ,  Thomas Nowak ,  Bo Xie ,  Alexandros T. Demos

Inventor： Kang Sub Yim ,  Thomas Nowak ,  Bo Xie ,  Alexandros T. Demos

IPC: H01L21/00

CPC classification number: H01L21/3105 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/76802 ,  H01L21/76814 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76831

Abstract: Methods for the repair of damaged low k films are provided. Damage to the low k films occurs during processing of the film such as during etching, ashing, and planarization. The processing of the low k film causes water to store in the pores of the film and further causes hydrophilic compounds to form in the low k film structure. Repair processes incorporating ultraviolet (UV) radiation and carbon-containing compounds remove the water from the pores and further remove the hydrophilic compounds from the low k film structure.

Abstract translation: 提供修复损坏的低k膜的方法。 在薄膜的处理期间，例如在蚀刻，灰化和平坦化期间，低k膜的损伤发生。 低k膜的处理导致水存储在膜的孔中，并进一步在低k膜结构中形成亲水性化合物。 包含紫外线（UV）辐射和含碳化合物的修复过程从孔中除去水，并进一步从低k膜结构中除去亲水性化合物。

公开(公告)号：US20110206857A1

公开(公告)日：2011-08-25

申请号：US13028823

申请日：2011-02-16

Applicant: Kang Sub Yim ,  Alexandros T. Demos

Inventor： Kang Sub Yim ,  Alexandros T. Demos

IPC: C08F2/48 ,  C08F2/46

CPC classification number: H01L21/02126 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/02348 ,  H01L21/7681

Abstract: Methods for depositing a low dielectric constant layer on a substrate are provided. In one embodiment, the method includes introducing one or more organosilicon compounds into a chamber, wherein the one or more organosilicon compounds comprise a silicon atom and a porogen component bonded to the silicon atom, reacting the one or more organosilicon compounds in the presence of RF power to deposit a low dielectric constant layer on a substrate in the chamber, and post-treating the low dielectric constant layer to substantially remove the porogen component from the low dielectric constant layer. Optionally, an inert carrier gas, an oxidizing gas, or both may be introduced into the processing chamber with the one or more organosilicon compounds. The post-treatment process may be an ultraviolet radiation cure of the deposited material. The UV cure process may be used concurrently or serially with a thermal or e-beam curing process. The low dielectric constant layers have good mechanical properties and a desirable dielectric constant.

Abstract translation: 提供了在基片上沉积低介电常数层的方法。 在一个实施方案中，所述方法包括将一种或多种有机硅化合物引入室中，其中所述一种或多种有机硅化合物包含与硅原子键合的硅原子和致孔剂组分，在RF存在下使所述一种或多种有机硅化合物反应 在室中的基板上沉积低介电常数层的功能，并且对低介电常数层进行后处理，以从低介电常数层基本上除去致孔剂成分。 任选地，可以使用一种或多种有机硅化合物将惰性载气，氧化气体或二者引入处理室。 后处理过程可以是沉积材料的紫外线辐射固化。 UV固化工艺可以与热或电子束固化工艺同时使用或连续使用。 低介电常数层具有良好的机械性能和所需的介电常数。

公开(公告)号：US07947611B2

公开(公告)日：2011-05-24

申请号：US12170248

申请日：2008-07-09

Applicant: Dustin W. Ho ,  Juan Carlos Rocha-Alvarez ,  Alexandros T. Demos ,  Kelvin Chan ,  Nagarajan Rajagopalan ,  Visweswaren Sivaramakrishnan

Inventor： Dustin W. Ho ,  Juan Carlos Rocha-Alvarez ,  Alexandros T. Demos ,  Kelvin Chan ,  Nagarajan Rajagopalan ,  Visweswaren Sivaramakrishnan

IPC: H01L21/31

CPC classification number: H01L21/31695 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/0234 ,  H01L21/02348 ,  H01L21/02351

Abstract: A method for depositing a low dielectric constant film by flowing a oxidizing gas into a processing chamber, flowing an organosilicon compound from a bulk storage container through a digital liquid flow meter at an organosilicon flow rate to a vaporization injection valve, vaporizing the organosilicon compound and flowing the organosilicon compound and a carrier gas into the processing chamber, maintaining the organosilicon flow rate to deposit an initiation layer, flowing a porogen compound from a bulk storage container through a digital liquid flow meter at a porogen flow rate to a vaporization injection valve, vaporizing the porogen compound and flowing the porogen compound and a carrier gas into the processing chamber, increasing the organosilicon flow rate and the porogen flow rate while depositing a transition layer, and maintaining a second organosilicon flow rate and a second porogen flow rate to deposit a porogen containing organosilicate dielectric layer.

Abstract translation: 一种通过使氧化气体流入处理室来沉积低介电常数膜的方法，使有机硅化合物从大容量储存容器通过数字液体流量计以有机硅流速流动到汽化喷射阀，汽化有机硅化合物和 使有机硅化合物和载气流入处理室，保持有机硅流速沉积起始层，使致孔剂化合物从大容量储存容器通过数字液体流量计以致孔剂流速流动到蒸发喷射阀， 蒸发致孔剂化合物并使致孔剂化合物和载气流入处理室，同时沉积过渡层而增加有机硅流速和致孔剂流速，并保持第二有机硅流速和第二致孔剂流速以沉积 含致孔剂的有机硅酸盐介电层。

公开(公告)号：US20090093112A1

公开(公告)日：2009-04-09

申请号：US11869396

申请日：2007-10-09

Applicant: AMIR AL-BAYATI ,  Alexandros T. Demos ,  Kang Sub Yim ,  Mehul Naik ,  Zhenjiang 'David' Cui ,  Mihaela Balseanu ,  Meiyee (Maggie Le) Shek ,  Li-Qun Xia

Inventor： AMIR AL-BAYATI ,  Alexandros T. Demos ,  Kang Sub Yim ,  Mehul Naik ,  Zhenjiang 'David' Cui ,  Mihaela Balseanu ,  Meiyee (Maggie Le) Shek ,  Li-Qun Xia

IPC: H01L21/4763

CPC classification number: H01L21/7682 ,  H01L21/3105 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/76825 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76885

Abstract: A method and apparatus for generating air gaps in a dielectric material of an interconnect structure. One embodiment provides a method for forming a semiconductor structure comprising depositing a first dielectric layer on a substrate, forming trenches in the first dielectric layer, filling the trenches with a conductive material, planarizing the conductive material to expose the first dielectric layer, depositing a dielectric barrier film on the conductive material and exposed first dielectric layer, depositing a hard mask layer over the dielectric barrier film, forming a pattern in the dielectric barrier film and the hard mask layer to expose selected regions of the substrate, oxidizing at least a portion of the first dielectric layer in the selected region of the substrate, removing oxidized portion of the first dielectric layer to form reversed trenches around the conductive material, and forming air gaps in the reversed trenches while depositing a second dielectric material in the reversed trenches.

Abstract translation: 一种用于在互连结构的电介质材料中产生气隙的方法和装置。 一个实施例提供了一种用于形成半导体结构的方法，包括在衬底上沉积第一介电层，在第一介电层中形成沟槽，用导电材料填充沟槽，平坦化导电材料以暴露第一介电层， 在导电材料和暴露的第一电介质层上的阻挡膜，在介电阻挡膜上沉积硬掩模层，在介电阻挡膜和硬掩模层中形成图案，以暴露衬底的选定区域，氧化至少一部分 在衬底的选定区域中的第一介电层，去除第一电介质层的氧化部分以在导电材料周围形成反向沟槽，以及在反向沟槽中形成气隙，同时在反向沟槽中沉积第二电介质材料。